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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-12 23:33:55 +08:00

dmaengine: Use sg_dma_address instead of sg_phys

dmaengine drivers should always use sg_dma_address instead of sg_phys to get the
addresses for the transfer from a sg element.

To quote Russel King:
	sg_phys(sg) of course has nothing to do with DMA addresses. It's the
	physical address _to the CPU_ of the memory associated with the scatterlist
	entry. That may, or may not have the same value for the DMA engine,
	particularly if IOMMUs are involved.

	And if these drivers are used on ARM, they must be fixed, sooner rather
	than later.  There's patches in the works which will mean we will end up
	with IOMMU support in the DMA mapping later, which means everything I've
	said above will become reality.

The patch has been generated using the following coccinelle patch:
<smpl>
@@
struct scatterlist *sg;
@@
-sg_phys(sg)
+sg_dma_address(sg)
</smpl>

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
This commit is contained in:
Lars-Peter Clausen 2012-04-25 20:50:51 +02:00 committed by Vinod Koul
parent 12366ad91a
commit cbb796ccd8
5 changed files with 8 additions and 8 deletions

View File

@ -1382,11 +1382,11 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
dsg->len = sg_dma_len(sg);
if (direction == DMA_MEM_TO_DEV) {
dsg->src_addr = sg_phys(sg);
dsg->src_addr = sg_dma_address(sg);
dsg->dst_addr = slave_addr;
} else {
dsg->src_addr = slave_addr;
dsg->dst_addr = sg_phys(sg);
dsg->dst_addr = sg_dma_address(sg);
}
}

View File

@ -270,10 +270,10 @@ coh901318_lli_fill_sg(struct coh901318_pool *pool,
if (dir == DMA_MEM_TO_DEV)
/* increment source address */
src = sg_phys(sg);
src = sg_dma_address(sg);
else
/* increment destination address */
dst = sg_phys(sg);
dst = sg_dma_address(sg);
bytes_to_transfer = sg_dma_len(sg);

View File

@ -743,7 +743,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
struct dw_desc *desc;
u32 len, dlen, mem;
mem = sg_phys(sg);
mem = sg_dma_address(sg);
len = sg_dma_len(sg);
if (!((mem | len) & 7))
@ -810,7 +810,7 @@ slave_sg_todev_fill_desc:
struct dw_desc *desc;
u32 len, dlen, mem;
mem = sg_phys(sg);
mem = sg_dma_address(sg);
len = sg_dma_len(sg);
if (!((mem | len) & 7))

View File

@ -398,7 +398,7 @@ static int midc_lli_fill_sg(struct intel_mid_dma_chan *midc,
desc->width,
midc->dma->block_size);
/*Populate SAR and DAR values*/
sg_phy_addr = sg_phys(sg);
sg_phy_addr = sg_dma_address(sg);
if (desc->dirn == DMA_MEM_TO_DEV) {
lli_bloc_desc->sar = sg_phy_addr;
lli_bloc_desc->dar = mids->dma_slave.dst_addr;

View File

@ -621,7 +621,7 @@ static struct dma_async_tx_descriptor *pd_prep_slave_sg(struct dma_chan *chan,
goto err_desc_get;
desc->regs.dev_addr = reg;
desc->regs.mem_addr = sg_phys(sg);
desc->regs.mem_addr = sg_dma_address(sg);
desc->regs.size = sg_dma_len(sg);
desc->regs.next = DMA_DESC_FOLLOW_WITHOUT_IRQ;