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https://github.com/edk2-porting/linux-next.git
synced 2024-12-25 21:54:06 +08:00
drm/msm: fix locking inconsistency for gpu->hw_init()
Most, but not all, paths where calling the with struct_mutex held. The fast-path in msm_gem_get_iova() (plus some sub-code-paths that only run the first time) was masking this issue. So lets just always hold struct_mutex for hw_init(). And sprinkle some WARN_ON()'s and might_lock() to avoid this sort of problem in the future. Signed-off-by: Rob Clark <robdclark@gmail.com>
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@ -297,31 +297,28 @@ static struct drm_gem_object *a5xx_ucode_load_bo(struct msm_gpu *gpu,
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struct drm_gem_object *bo;
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void *ptr;
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mutex_lock(&drm->struct_mutex);
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bo = msm_gem_new(drm, fw->size - 4, MSM_BO_UNCACHED);
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mutex_unlock(&drm->struct_mutex);
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if (IS_ERR(bo))
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return bo;
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ptr = msm_gem_get_vaddr(bo);
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ptr = msm_gem_get_vaddr_locked(bo);
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if (!ptr) {
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drm_gem_object_unreference_unlocked(bo);
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drm_gem_object_unreference(bo);
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return ERR_PTR(-ENOMEM);
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}
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if (iova) {
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int ret = msm_gem_get_iova(bo, gpu->id, iova);
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int ret = msm_gem_get_iova_locked(bo, gpu->id, iova);
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if (ret) {
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drm_gem_object_unreference_unlocked(bo);
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drm_gem_object_unreference(bo);
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return ERR_PTR(ret);
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}
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}
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memcpy(ptr, &fw->data[4], fw->size - 4);
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msm_gem_put_vaddr(bo);
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msm_gem_put_vaddr_locked(bo);
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return bo;
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}
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@ -294,17 +294,14 @@ void a5xx_gpmu_ucode_init(struct msm_gpu *gpu)
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*/
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bosize = (cmds_size + (cmds_size / TYPE4_MAX_PAYLOAD) + 1) << 2;
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mutex_lock(&drm->struct_mutex);
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a5xx_gpu->gpmu_bo = msm_gem_new(drm, bosize, MSM_BO_UNCACHED);
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mutex_unlock(&drm->struct_mutex);
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if (IS_ERR(a5xx_gpu->gpmu_bo))
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goto err;
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if (msm_gem_get_iova(a5xx_gpu->gpmu_bo, gpu->id, &a5xx_gpu->gpmu_iova))
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if (msm_gem_get_iova_locked(a5xx_gpu->gpmu_bo, gpu->id, &a5xx_gpu->gpmu_iova))
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goto err;
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ptr = msm_gem_get_vaddr(a5xx_gpu->gpmu_bo);
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ptr = msm_gem_get_vaddr_locked(a5xx_gpu->gpmu_bo);
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if (!ptr)
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goto err;
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@ -323,7 +320,7 @@ void a5xx_gpmu_ucode_init(struct msm_gpu *gpu)
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cmds_size -= _size;
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}
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msm_gem_put_vaddr(a5xx_gpu->gpmu_bo);
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msm_gem_put_vaddr_locked(a5xx_gpu->gpmu_bo);
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a5xx_gpu->gpmu_dwords = dwords;
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goto out;
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@ -332,7 +329,7 @@ err:
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if (a5xx_gpu->gpmu_iova)
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msm_gem_put_iova(a5xx_gpu->gpmu_bo, gpu->id);
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if (a5xx_gpu->gpmu_bo)
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drm_gem_object_unreference_unlocked(a5xx_gpu->gpmu_bo);
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drm_gem_object_unreference(a5xx_gpu->gpmu_bo);
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a5xx_gpu->gpmu_bo = NULL;
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a5xx_gpu->gpmu_iova = 0;
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@ -159,7 +159,9 @@ struct msm_gpu *adreno_load_gpu(struct drm_device *dev)
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int ret;
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pm_runtime_get_sync(&pdev->dev);
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mutex_lock(&dev->struct_mutex);
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ret = msm_gpu_hw_init(gpu);
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mutex_unlock(&dev->struct_mutex);
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pm_runtime_put_sync(&pdev->dev);
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if (ret) {
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dev_err(dev->dev, "gpu hw init failed: %d\n", ret);
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@ -64,7 +64,7 @@ int adreno_hw_init(struct msm_gpu *gpu)
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DBG("%s", gpu->name);
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ret = msm_gem_get_iova(gpu->rb->bo, gpu->id, &gpu->rb_iova);
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ret = msm_gem_get_iova_locked(gpu->rb->bo, gpu->id, &gpu->rb_iova);
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if (ret) {
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gpu->rb_iova = 0;
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dev_err(gpu->dev->dev, "could not map ringbuffer: %d\n", ret);
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@ -314,6 +314,8 @@ int msm_gem_get_iova_locked(struct drm_gem_object *obj, int id,
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struct msm_gem_object *msm_obj = to_msm_bo(obj);
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int ret = 0;
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WARN_ON(!mutex_is_locked(&obj->dev->struct_mutex));
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if (!msm_obj->domain[id].iova) {
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struct msm_drm_private *priv = obj->dev->dev_private;
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struct page **pages = get_pages(obj);
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@ -345,6 +347,7 @@ int msm_gem_get_iova(struct drm_gem_object *obj, int id, uint64_t *iova)
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* bo is deleted:
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*/
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if (msm_obj->domain[id].iova) {
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might_lock(&obj->dev->struct_mutex);
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*iova = msm_obj->domain[id].iova;
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return 0;
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}
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@ -203,6 +203,8 @@ int msm_gpu_hw_init(struct msm_gpu *gpu)
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{
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int ret;
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WARN_ON(!mutex_is_locked(&gpu->dev->struct_mutex));
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if (!gpu->needs_hw_init)
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return 0;
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