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KVM: VMX: Move VMCS definitions to dedicated file
This isn't intended to be a pure reflection of hardware, e.g. struct loaded_vmcs and struct vmcs_host_state are KVM-defined constructs. Similar to capabilities.h, this is a standalone file to avoid circular dependencies between yet-to-be-created vmx.h and nested.h files. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Sean Christopherson
Paolo Bonzini
parent
2c4fd91d26
commit
cb1d474b32
132
arch/x86/kvm/vmx/vmcs.h
Normal file
132
arch/x86/kvm/vmx/vmcs.h
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@ -0,0 +1,132 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __KVM_X86_VMX_VMCS_H
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#define __KVM_X86_VMX_VMCS_H
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#include <linux/list.h>
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#include <linux/ktime.h>
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#include <asm/vmx.h>
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#include "capabilities.h"
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struct vmcs_hdr {
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u32 revision_id:31;
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u32 shadow_vmcs:1;
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};
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struct vmcs {
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struct vmcs_hdr hdr;
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u32 abort;
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char data[0];
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};
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/*
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* vmcs_host_state tracks registers that are loaded from the VMCS on VMEXIT
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* and whose values change infrequently, but are not constant. I.e. this is
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* used as a write-through cache of the corresponding VMCS fields.
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*/
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struct vmcs_host_state {
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unsigned long cr3; /* May not match real cr3 */
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unsigned long cr4; /* May not match real cr4 */
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unsigned long gs_base;
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unsigned long fs_base;
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u16 fs_sel, gs_sel, ldt_sel;
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#ifdef CONFIG_X86_64
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u16 ds_sel, es_sel;
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#endif
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};
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/*
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* Track a VMCS that may be loaded on a certain CPU. If it is (cpu!=-1), also
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* remember whether it was VMLAUNCHed, and maintain a linked list of all VMCSs
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* loaded on this CPU (so we can clear them if the CPU goes down).
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*/
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struct loaded_vmcs {
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struct vmcs *vmcs;
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struct vmcs *shadow_vmcs;
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int cpu;
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bool launched;
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bool nmi_known_unmasked;
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bool hv_timer_armed;
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/* Support for vnmi-less CPUs */
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int soft_vnmi_blocked;
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ktime_t entry_time;
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s64 vnmi_blocked_time;
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unsigned long *msr_bitmap;
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struct list_head loaded_vmcss_on_cpu_link;
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struct vmcs_host_state host_state;
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};
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static inline bool is_exception_n(u32 intr_info, u8 vector)
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{
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return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
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INTR_INFO_VALID_MASK)) ==
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(INTR_TYPE_HARD_EXCEPTION | vector | INTR_INFO_VALID_MASK);
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}
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static inline bool is_debug(u32 intr_info)
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{
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return is_exception_n(intr_info, DB_VECTOR);
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}
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static inline bool is_breakpoint(u32 intr_info)
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{
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return is_exception_n(intr_info, BP_VECTOR);
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}
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static inline bool is_page_fault(u32 intr_info)
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{
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return is_exception_n(intr_info, PF_VECTOR);
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}
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static inline bool is_invalid_opcode(u32 intr_info)
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{
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return is_exception_n(intr_info, UD_VECTOR);
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}
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static inline bool is_gp_fault(u32 intr_info)
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{
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return is_exception_n(intr_info, GP_VECTOR);
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}
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static inline bool is_machine_check(u32 intr_info)
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{
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return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
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INTR_INFO_VALID_MASK)) ==
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(INTR_TYPE_HARD_EXCEPTION | MC_VECTOR | INTR_INFO_VALID_MASK);
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}
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/* Undocumented: icebp/int1 */
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static inline bool is_icebp(u32 intr_info)
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{
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return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
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== (INTR_TYPE_PRIV_SW_EXCEPTION | INTR_INFO_VALID_MASK);
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}
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static inline bool is_nmi(u32 intr_info)
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{
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return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
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== (INTR_TYPE_NMI_INTR | INTR_INFO_VALID_MASK);
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}
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enum vmcs_field_width {
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VMCS_FIELD_WIDTH_U16 = 0,
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VMCS_FIELD_WIDTH_U64 = 1,
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VMCS_FIELD_WIDTH_U32 = 2,
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VMCS_FIELD_WIDTH_NATURAL_WIDTH = 3
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};
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static inline int vmcs_field_width(unsigned long field)
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{
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if (0x1 & field) /* the *_HIGH fields are all 32 bit */
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return VMCS_FIELD_WIDTH_U32;
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return (field >> 13) & 0x3;
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}
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static inline int vmcs_field_readonly(unsigned long field)
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{
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return (((field >> 10) & 0x3) == 1);
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}
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#endif /* __KVM_X86_VMX_VMCS_H */
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@ -58,6 +58,7 @@
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#include "mmu.h"
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#include "pmu.h"
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#include "trace.h"
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#include "vmcs.h"
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#include "x86.h"
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#define __ex(x) __kvm_handle_fault_on_reboot(x)
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@ -361,57 +362,6 @@ struct kvm_vmx {
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spinlock_t ept_pointer_lock;
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};
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#define NR_AUTOLOAD_MSRS 8
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struct vmcs_hdr {
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u32 revision_id:31;
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u32 shadow_vmcs:1;
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};
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struct vmcs {
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struct vmcs_hdr hdr;
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u32 abort;
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char data[0];
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};
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/*
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* vmcs_host_state tracks registers that are loaded from the VMCS on VMEXIT
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* and whose values change infrequently, but are not constant. I.e. this is
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* used as a write-through cache of the corresponding VMCS fields.
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*/
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struct vmcs_host_state {
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unsigned long cr3; /* May not match real cr3 */
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unsigned long cr4; /* May not match real cr4 */
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unsigned long gs_base;
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unsigned long fs_base;
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u16 fs_sel, gs_sel, ldt_sel;
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#ifdef CONFIG_X86_64
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u16 ds_sel, es_sel;
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#endif
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};
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/*
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* Track a VMCS that may be loaded on a certain CPU. If it is (cpu!=-1), also
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* remember whether it was VMLAUNCHed, and maintain a linked list of all VMCSs
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* loaded on this CPU (so we can clear them if the CPU goes down).
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*/
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struct loaded_vmcs {
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struct vmcs *vmcs;
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struct vmcs *shadow_vmcs;
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int cpu;
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bool launched;
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bool nmi_known_unmasked;
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bool hv_timer_armed;
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/* Support for vnmi-less CPUs */
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int soft_vnmi_blocked;
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ktime_t entry_time;
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s64 vnmi_blocked_time;
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unsigned long *msr_bitmap;
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struct list_head loaded_vmcss_on_cpu_link;
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struct vmcs_host_state host_state;
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};
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struct shared_msr_entry {
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unsigned index;
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u64 data;
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@ -940,6 +890,8 @@ static inline int pi_test_sn(struct pi_desc *pi_desc)
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(unsigned long *)&pi_desc->control);
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}
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#define NR_AUTOLOAD_MSRS 8
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struct vmx_msrs {
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unsigned int nr;
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struct vmx_msr_entry val[NR_AUTOLOAD_MSRS];
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@ -1588,52 +1540,6 @@ static int nested_enable_evmcs(struct kvm_vcpu *vcpu,
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return 0;
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}
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static inline bool is_exception_n(u32 intr_info, u8 vector)
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{
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return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
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INTR_INFO_VALID_MASK)) ==
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(INTR_TYPE_HARD_EXCEPTION | vector | INTR_INFO_VALID_MASK);
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}
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static inline bool is_debug(u32 intr_info)
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{
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return is_exception_n(intr_info, DB_VECTOR);
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}
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static inline bool is_breakpoint(u32 intr_info)
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{
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return is_exception_n(intr_info, BP_VECTOR);
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}
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static inline bool is_page_fault(u32 intr_info)
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{
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return is_exception_n(intr_info, PF_VECTOR);
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}
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static inline bool is_invalid_opcode(u32 intr_info)
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{
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return is_exception_n(intr_info, UD_VECTOR);
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}
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static inline bool is_gp_fault(u32 intr_info)
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{
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return is_exception_n(intr_info, GP_VECTOR);
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}
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static inline bool is_machine_check(u32 intr_info)
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{
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return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
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INTR_INFO_VALID_MASK)) ==
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(INTR_TYPE_HARD_EXCEPTION | MC_VECTOR | INTR_INFO_VALID_MASK);
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}
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/* Undocumented: icebp/int1 */
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static inline bool is_icebp(u32 intr_info)
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{
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return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
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== (INTR_TYPE_PRIV_SW_EXCEPTION | INTR_INFO_VALID_MASK);
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}
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/*
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* Comment's format: document - errata name - stepping - processor name.
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* Refer from
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@ -1814,12 +1720,6 @@ static inline bool nested_cpu_has_save_preemption_timer(struct vmcs12 *vmcs12)
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VM_EXIT_SAVE_VMX_PREEMPTION_TIMER;
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}
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static inline bool is_nmi(u32 intr_info)
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{
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return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
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== (INTR_TYPE_NMI_INTR | INTR_INFO_VALID_MASK);
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}
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static void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 exit_reason,
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u32 exit_intr_info,
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unsigned long exit_qualification);
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@ -4542,25 +4442,6 @@ static void free_kvm_area(void)
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}
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}
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enum vmcs_field_width {
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VMCS_FIELD_WIDTH_U16 = 0,
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VMCS_FIELD_WIDTH_U64 = 1,
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VMCS_FIELD_WIDTH_U32 = 2,
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VMCS_FIELD_WIDTH_NATURAL_WIDTH = 3
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};
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static inline int vmcs_field_width(unsigned long field)
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{
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if (0x1 & field) /* the *_HIGH fields are all 32 bit */
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return VMCS_FIELD_WIDTH_U32;
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return (field >> 13) & 0x3 ;
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}
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static inline int vmcs_field_readonly(unsigned long field)
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{
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return (((field >> 10) & 0x3) == 1);
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}
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static void init_vmcs_shadow_fields(void)
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{
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int i, j;
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