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arm64 fixes for -rc1
- Fix an incorrect mask in the CXL PMU driver - Fix a regression in early parsing of the kernel command line - Fix an IP checksum OoB access reported by syzbot -----BEGIN PGP SIGNATURE----- iQFEBAABCgAuFiEEPxTL6PPUbjXGY88ct6xw3ITBYzQFAmT6/MgQHHdpbGxAa2Vy bmVsLm9yZwAKCRC3rHDchMFjNABnB/0XsQEfl+cjE1BJnYuwiZyMbraSAL2i5oy9 3LUKHOQblZpSnf+OCxr2otBoRVpM2hmXcGQymUzcI8SmLtgNt8RFmwVtyuj3X6ZX JTrdxLIMK2TQi/dqQ9ssJCejW4Y2fXDfJ2hZSpTG40TVyU8mL9BzI61HGQYcMA4T 0HFzvfDFoDDwslJgeKyVnaEU03o81HaRTOgL4OHAT9AhWlIzaWmVtJf+y/metd7U ccE1yA0LG9teAgN3wC2yWWR4iBG0/Fe1UHV8ouvtXXAuLLySIObYKSa3hhOWz5N0 QDNQH12El+I7pKoA6N/D8orgXVk9xt3Q+9DSI0wcyGn+HsbLNprC =9Une -----END PGP SIGNATURE----- Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Will Deacon: "The main one is a fix for a broken strscpy() conversion that landed in the merge window and broke early parsing of the kernel command line. - Fix an incorrect mask in the CXL PMU driver - Fix a regression in early parsing of the kernel command line - Fix an IP checksum OoB access reported by syzbot" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: csum: Fix OoB access in IP checksum code for negative lengths arm64/sysreg: Fix broken strncpy() -> strscpy() conversion perf: CXL: fix mismatched number of counters mask
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ca9c7abf95
@ -262,9 +262,9 @@ static __init void __parse_cmdline(const char *cmdline, bool parse_aliases)
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if (!len)
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return;
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len = strscpy(buf, cmdline, ARRAY_SIZE(buf));
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if (len == -E2BIG)
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len = ARRAY_SIZE(buf) - 1;
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len = min(len, ARRAY_SIZE(buf) - 1);
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memcpy(buf, cmdline, len);
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buf[len] = '\0';
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if (strcmp(buf, "--") == 0)
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return;
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@ -24,7 +24,7 @@ unsigned int __no_sanitize_address do_csum(const unsigned char *buff, int len)
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const u64 *ptr;
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u64 data, sum64 = 0;
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if (unlikely(len == 0))
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if (unlikely(len <= 0))
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return 0;
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offset = (unsigned long)buff & 7;
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@ -25,7 +25,7 @@
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#include "../cxl/pmu.h"
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#define CXL_PMU_CAP_REG 0x0
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#define CXL_PMU_CAP_NUM_COUNTERS_MSK GENMASK_ULL(4, 0)
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#define CXL_PMU_CAP_NUM_COUNTERS_MSK GENMASK_ULL(5, 0)
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#define CXL_PMU_CAP_COUNTER_WIDTH_MSK GENMASK_ULL(15, 8)
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#define CXL_PMU_CAP_NUM_EVN_CAP_REG_SUP_MSK GENMASK_ULL(24, 20)
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#define CXL_PMU_CAP_FILTERS_SUP_MSK GENMASK_ULL(39, 32)
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