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- exynos4415 and exynos audio subsystem clk driver (build
with PM_SLEEP disabled, resource release) fixes - minor cleanups in drivers/clk/samsung/clk.c (spelling, includes) - modification of the exynos4 HDMI PHY clock definition to model dependency of "sclk_hdmiphy" on the "hdmi" clock -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABCAAGBQJUgZiKAAoJEE1bIKeAnHqL5AUP/2X0OnwWJYLskaNuFH622OQ5 4AoKqdHxvVQIZZg9zlgxnxeegms5GzDDq/FEgUvzNQ4rIJWQTxkx14fBiLBLg4MI fljJ4IQ08sPKSrydmHVwrEVijoCH725o44pkaqn3xHjBWizOrdj9lnXEGlwUuZ4x uDoJ3LLwFav6OItI/abYHCuML4crMl7hJW4ltko4/7H4s1HIRlTKxRVPvCyYohdA gkA+4bFWjGELe0mnxO0Hlh48+tnsjjUUuAjWxfiOIcW2mOQS6ugCj7pLEIqbpEHu 6d8Od1EH2GLTTqcMLPwiwqhze85802jTPBw3UL3XNQc1XBa+vUtEzapUDP6mRE6D KUvtqDStkUsjM1rflcd6P4MA5Z1PT9yuzW03mjuLl4J+sfHaYSaw1FfIE5GuUw/J w6ICdsuiEM2NZvp7OAzyWeT/skAYmhcFYy31yCulPBaRIGKCw0qJijBLT/4GVqoK TiLqbqOSuNvv2Dvbo+pQ6qvx8EZUK5zZBUks/wDvKyVXnkm6w5pOdSEELF6bbtN/ 7pOkjdY/3soWStRBcKV9cyGvpwc3FD3tn0hptfqxXzbJlyitYVwcwpacTdJATjK8 6hMi3YlRYFGG8uqpg1IcKH/NooIhDW1eK7maRdq9ZsEWoJd+vr5pa7z+2urjV104 8dZ9Bq/L6HcD7IrQsRV6 =Q2e2 -----END PGP SIGNATURE----- Merge tag 'for-v3.19-exynos-clk-2' of git://linuxtv.org/snawrocki/samsung into clk-next - exynos4415 and exynos audio subsystem clk driver (build with PM_SLEEP disabled, resource release) fixes - minor cleanups in drivers/clk/samsung/clk.c (spelling, includes) - modification of the exynos4 HDMI PHY clock definition to model dependency of "sclk_hdmiphy" on the "hdmi" clock
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commit
c9b928148e
@ -210,6 +210,10 @@ static int exynos_audss_clk_remove(struct platform_device *pdev)
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{
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int i;
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#ifdef CONFIG_PM_SLEEP
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unregister_syscore_ops(&exynos_audss_clk_syscore_ops);
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#endif
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of_clk_del_provider(pdev->dev.of_node);
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for (i = 0; i < clk_data.clk_num; i++) {
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@ -505,7 +505,7 @@ static struct samsung_fixed_rate_clock exynos4_fixed_rate_ext_clks[] __initdata
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/* fixed rate clocks generated inside the soc */
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static struct samsung_fixed_rate_clock exynos4_fixed_rate_clks[] __initdata = {
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FRATE(0, "sclk_hdmi24m", NULL, CLK_IS_ROOT, 24000000),
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FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 27000000),
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FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", "hdmi", 0, 27000000),
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FRATE(0, "sclk_usbphy0", NULL, CLK_IS_ROOT, 48000000),
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};
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@ -118,12 +118,13 @@ enum exynos4415_plls {
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nr_plls,
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};
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static struct samsung_clk_provider *exynos4415_ctx;
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/*
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* Support for CMU save/restore across system suspends
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*/
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#ifdef CONFIG_PM_SLEEP
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static struct samsung_clk_reg_dump *exynos4415_clk_regs;
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static struct samsung_clk_provider *exynos4415_ctx;
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static unsigned long exynos4415_cmu_clk_regs[] __initdata = {
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SRC_LEFTBUS,
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@ -1031,9 +1032,10 @@ enum exynos4415_dmc_plls {
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nr_dmc_plls,
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};
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static struct samsung_clk_provider *exynos4415_dmc_ctx;
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#ifdef CONFIG_PM_SLEEP
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static struct samsung_clk_reg_dump *exynos4415_dmc_clk_regs;
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static struct samsung_clk_provider *exynos4415_dmc_ctx;
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static unsigned long exynos4415_cmu_dmc_clk_regs[] __initdata = {
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MPLL_LOCK,
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@ -11,7 +11,9 @@
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* clock framework for Samsung platforms.
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*/
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#include <linux/of_address.h>
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#include <linux/syscore_ops.h>
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#include "clk.h"
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static LIST_HEAD(clock_reg_cache_list);
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@ -283,7 +285,6 @@ void __init samsung_clk_register_gate(struct samsung_clk_provider *ctx,
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* obtain the clock speed of all external fixed clock sources from device
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* tree and register it
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*/
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#ifdef CONFIG_OF
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void __init samsung_clk_of_register_fixed_ext(struct samsung_clk_provider *ctx,
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struct samsung_fixed_rate_clock *fixed_rate_clk,
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unsigned int nr_fixed_rate_clk,
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@ -300,7 +301,6 @@ void __init samsung_clk_of_register_fixed_ext(struct samsung_clk_provider *ctx,
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}
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samsung_clk_register_fixed_rate(ctx, fixed_rate_clk, nr_fixed_rate_clk);
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}
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#endif
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/* utility function to get the rate of a specified clock */
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unsigned long _get_rate(const char *clk_name)
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@ -13,19 +13,15 @@
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#ifndef __SAMSUNG_CLK_H
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#define __SAMSUNG_CLK_H
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/io.h>
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#include <linux/clk-provider.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include "clk-pll.h"
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/**
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* struct samsung_clk_provider: information about clock provider
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* @reg_base: virtual address for the register base.
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* @clk_data: holds clock related data like clk* and number of clocks.
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* @lock: maintains exclusion bwtween callbacks for a given clock-provider.
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* @lock: maintains exclusion between callbacks for a given clock-provider.
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*/
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struct samsung_clk_provider {
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void __iomem *reg_base;
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