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https://github.com/edk2-porting/linux-next.git
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drm/nouveau/hwsq: remove some magic, give proper opcode names
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -57,9 +57,26 @@ hwsq_fini(struct hwsq_ucode *hwsq)
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}
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static inline void
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hwsq_unkn(struct hwsq_ucode *hwsq, u8 v0)
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hwsq_usec(struct hwsq_ucode *hwsq, u8 usec)
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{
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*hwsq->ptr.u08++ = v0;
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u32 shift = 0;
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while (usec & ~3) {
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usec >>= 2;
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shift++;
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}
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*hwsq->ptr.u08++ = (shift << 2) | usec;
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}
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static inline void
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hwsq_setf(struct hwsq_ucode *hwsq, u8 flag, int val)
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{
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flag += 0x80;
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if (val >= 0)
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flag += 0x20;
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if (val >= 1)
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flag += 0x20;
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*hwsq->ptr.u08++ = flag;
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}
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static inline void
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@ -459,7 +459,7 @@ calc_mclk(struct drm_device *dev, u32 freq, struct hwsq_ucode *hwsq)
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}
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if (dev_priv->chipset >= 0x92)
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hwsq_wr32(hwsq, 0x611200, 0x00003300); /* disable scanout */
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hwsq_unkn(hwsq, 0xb0); /* disable bus access */
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hwsq_setf(hwsq, 0x10, 0); /* disable bus access */
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hwsq_op5f(hwsq, 0x00, 0x01); /* no idea :s */
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/* prepare memory controller */
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@ -478,10 +478,10 @@ calc_mclk(struct drm_device *dev, u32 freq, struct hwsq_ucode *hwsq)
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hwsq_wr32(hwsq, 0x1002d4, 0x00000001); /* precharge banks and idle */
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hwsq_wr32(hwsq, 0x1002dc, 0x00000000); /* stop self refresh mode */
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hwsq_wr32(hwsq, 0x100210, 0x80000000); /* restart automatic refresh */
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hwsq_unkn(hwsq, 0x07); /* wait for the PLL to stabilize (12us) */
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hwsq_usec(hwsq, 12); /* wait for the PLL to stabilize */
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hwsq_unkn(hwsq, 0x0b); /* may be unnecessary: causes flickering */
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hwsq_unkn(hwsq, 0xd0); /* enable bus access again */
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hwsq_usec(hwsq, 48); /* may be unnecessary: causes flickering */
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hwsq_setf(hwsq, 0x10, 1); /* enable bus access */
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hwsq_op5f(hwsq, 0x00, 0x00); /* no idea, reverse of 0x00, 0x01? */
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if (dev_priv->chipset >= 0x92)
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hwsq_wr32(hwsq, 0x611200, 0x00003330); /* enable scanout */
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