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clk: qcom: gcc-sm8250: use ARRAY_SIZE instead of specifying num_parents
Use ARRAY_SIZE() instead of manually specifying num_parents. This makes adding/removing entries to/from parent_data easy and errorproof. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20210405224743.590029-33-dmitry.baryshkov@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
parent
60ca4670fd
commit
c864cd5f50
@ -199,7 +199,7 @@ static struct clk_rcg2 gcc_cpuss_ahb_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_cpuss_ahb_clk_src",
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.parent_data = gcc_parent_data_0_ao,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0_ao),
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.flags = CLK_SET_RATE_PARENT,
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.ops = &clk_rcg2_ops,
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},
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@ -223,7 +223,7 @@ static struct clk_rcg2 gcc_gp1_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_gp1_clk_src",
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.parent_data = gcc_parent_data_1,
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.num_parents = 4,
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.num_parents = ARRAY_SIZE(gcc_parent_data_1),
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.ops = &clk_rcg2_ops,
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},
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};
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@ -237,7 +237,7 @@ static struct clk_rcg2 gcc_gp2_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_gp2_clk_src",
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.parent_data = gcc_parent_data_1,
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.num_parents = 4,
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.num_parents = ARRAY_SIZE(gcc_parent_data_1),
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.ops = &clk_rcg2_ops,
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},
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};
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@ -251,7 +251,7 @@ static struct clk_rcg2 gcc_gp3_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_gp3_clk_src",
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.parent_data = gcc_parent_data_1,
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.num_parents = 4,
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.num_parents = ARRAY_SIZE(gcc_parent_data_1),
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.ops = &clk_rcg2_ops,
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},
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};
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@ -271,7 +271,7 @@ static struct clk_rcg2 gcc_pcie_0_aux_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_pcie_0_aux_clk_src",
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.parent_data = gcc_parent_data_2,
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.num_parents = 2,
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.num_parents = ARRAY_SIZE(gcc_parent_data_2),
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.ops = &clk_rcg2_ops,
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},
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};
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@ -285,7 +285,7 @@ static struct clk_rcg2 gcc_pcie_1_aux_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_pcie_1_aux_clk_src",
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.parent_data = gcc_parent_data_2,
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.num_parents = 2,
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.num_parents = ARRAY_SIZE(gcc_parent_data_2),
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.ops = &clk_rcg2_ops,
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},
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};
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@ -299,7 +299,7 @@ static struct clk_rcg2 gcc_pcie_2_aux_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_pcie_2_aux_clk_src",
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.parent_data = gcc_parent_data_2,
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.num_parents = 2,
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.num_parents = ARRAY_SIZE(gcc_parent_data_2),
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.ops = &clk_rcg2_ops,
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},
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};
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@ -319,7 +319,7 @@ static struct clk_rcg2 gcc_pcie_phy_refgen_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_pcie_phy_refgen_clk_src",
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.parent_data = gcc_parent_data_0_ao,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0_ao),
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.ops = &clk_rcg2_ops,
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},
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};
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@ -340,7 +340,7 @@ static struct clk_rcg2 gcc_pdm2_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_pdm2_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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},
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};
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@ -368,7 +368,7 @@ static const struct freq_tbl ftbl_gcc_qupv3_wrap0_s0_clk_src[] = {
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static struct clk_init_data gcc_qupv3_wrap0_s0_clk_src_init = {
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.name = "gcc_qupv3_wrap0_s0_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -384,7 +384,7 @@ static struct clk_rcg2 gcc_qupv3_wrap0_s0_clk_src = {
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static struct clk_init_data gcc_qupv3_wrap0_s1_clk_src_init = {
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.name = "gcc_qupv3_wrap0_s1_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -416,7 +416,7 @@ static const struct freq_tbl ftbl_gcc_qupv3_wrap0_s2_clk_src[] = {
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static struct clk_init_data gcc_qupv3_wrap0_s2_clk_src_init = {
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.name = "gcc_qupv3_wrap0_s2_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -432,7 +432,7 @@ static struct clk_rcg2 gcc_qupv3_wrap0_s2_clk_src = {
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static struct clk_init_data gcc_qupv3_wrap0_s3_clk_src_init = {
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.name = "gcc_qupv3_wrap0_s3_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -448,7 +448,7 @@ static struct clk_rcg2 gcc_qupv3_wrap0_s3_clk_src = {
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static struct clk_init_data gcc_qupv3_wrap0_s4_clk_src_init = {
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.name = "gcc_qupv3_wrap0_s4_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -464,7 +464,7 @@ static struct clk_rcg2 gcc_qupv3_wrap0_s4_clk_src = {
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static struct clk_init_data gcc_qupv3_wrap0_s5_clk_src_init = {
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.name = "gcc_qupv3_wrap0_s5_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -480,7 +480,7 @@ static struct clk_rcg2 gcc_qupv3_wrap0_s5_clk_src = {
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static struct clk_init_data gcc_qupv3_wrap0_s6_clk_src_init = {
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.name = "gcc_qupv3_wrap0_s6_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -496,7 +496,7 @@ static struct clk_rcg2 gcc_qupv3_wrap0_s6_clk_src = {
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static struct clk_init_data gcc_qupv3_wrap0_s7_clk_src_init = {
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.name = "gcc_qupv3_wrap0_s7_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -512,7 +512,7 @@ static struct clk_rcg2 gcc_qupv3_wrap0_s7_clk_src = {
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static struct clk_init_data gcc_qupv3_wrap1_s0_clk_src_init = {
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.name = "gcc_qupv3_wrap1_s0_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -528,7 +528,7 @@ static struct clk_rcg2 gcc_qupv3_wrap1_s0_clk_src = {
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static struct clk_init_data gcc_qupv3_wrap1_s1_clk_src_init = {
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.name = "gcc_qupv3_wrap1_s1_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -544,7 +544,7 @@ static struct clk_rcg2 gcc_qupv3_wrap1_s1_clk_src = {
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static struct clk_init_data gcc_qupv3_wrap1_s2_clk_src_init = {
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.name = "gcc_qupv3_wrap1_s2_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -560,7 +560,7 @@ static struct clk_rcg2 gcc_qupv3_wrap1_s2_clk_src = {
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static struct clk_init_data gcc_qupv3_wrap1_s3_clk_src_init = {
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.name = "gcc_qupv3_wrap1_s3_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -576,7 +576,7 @@ static struct clk_rcg2 gcc_qupv3_wrap1_s3_clk_src = {
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static struct clk_init_data gcc_qupv3_wrap1_s4_clk_src_init = {
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.name = "gcc_qupv3_wrap1_s4_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -592,7 +592,7 @@ static struct clk_rcg2 gcc_qupv3_wrap1_s4_clk_src = {
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static struct clk_init_data gcc_qupv3_wrap1_s5_clk_src_init = {
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.name = "gcc_qupv3_wrap1_s5_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -608,7 +608,7 @@ static struct clk_rcg2 gcc_qupv3_wrap1_s5_clk_src = {
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static struct clk_init_data gcc_qupv3_wrap2_s0_clk_src_init = {
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.name = "gcc_qupv3_wrap2_s0_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -624,7 +624,7 @@ static struct clk_rcg2 gcc_qupv3_wrap2_s0_clk_src = {
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static struct clk_init_data gcc_qupv3_wrap2_s1_clk_src_init = {
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.name = "gcc_qupv3_wrap2_s1_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -640,7 +640,7 @@ static struct clk_rcg2 gcc_qupv3_wrap2_s1_clk_src = {
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static struct clk_init_data gcc_qupv3_wrap2_s2_clk_src_init = {
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.name = "gcc_qupv3_wrap2_s2_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -656,7 +656,7 @@ static struct clk_rcg2 gcc_qupv3_wrap2_s2_clk_src = {
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static struct clk_init_data gcc_qupv3_wrap2_s3_clk_src_init = {
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.name = "gcc_qupv3_wrap2_s3_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -672,7 +672,7 @@ static struct clk_rcg2 gcc_qupv3_wrap2_s3_clk_src = {
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static struct clk_init_data gcc_qupv3_wrap2_s4_clk_src_init = {
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.name = "gcc_qupv3_wrap2_s4_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -688,7 +688,7 @@ static struct clk_rcg2 gcc_qupv3_wrap2_s4_clk_src = {
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static struct clk_init_data gcc_qupv3_wrap2_s5_clk_src_init = {
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.name = "gcc_qupv3_wrap2_s5_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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};
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@ -720,7 +720,7 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_sdcc2_apps_clk_src",
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.parent_data = gcc_parent_data_4,
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.num_parents = 5,
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.num_parents = ARRAY_SIZE(gcc_parent_data_4),
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.ops = &clk_rcg2_floor_ops,
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},
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};
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@ -743,7 +743,7 @@ static struct clk_rcg2 gcc_sdcc4_apps_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_sdcc4_apps_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_floor_ops,
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},
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};
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@ -762,7 +762,7 @@ static struct clk_rcg2 gcc_tsif_ref_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_tsif_ref_clk_src",
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.parent_data = gcc_parent_data_5,
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.num_parents = 4,
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.num_parents = ARRAY_SIZE(gcc_parent_data_5),
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.ops = &clk_rcg2_ops,
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},
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};
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@ -784,7 +784,7 @@ static struct clk_rcg2 gcc_ufs_card_axi_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_ufs_card_axi_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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},
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};
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@ -806,7 +806,7 @@ static struct clk_rcg2 gcc_ufs_card_ice_core_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_ufs_card_ice_core_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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},
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};
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@ -825,7 +825,7 @@ static struct clk_rcg2 gcc_ufs_card_phy_aux_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_ufs_card_phy_aux_clk_src",
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.parent_data = gcc_parent_data_3,
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.num_parents = 1,
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.num_parents = ARRAY_SIZE(gcc_parent_data_3),
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.ops = &clk_rcg2_ops,
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},
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};
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@ -846,7 +846,7 @@ static struct clk_rcg2 gcc_ufs_card_unipro_core_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_ufs_card_unipro_core_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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},
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};
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@ -869,7 +869,7 @@ static struct clk_rcg2 gcc_ufs_phy_axi_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_ufs_phy_axi_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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},
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};
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@ -883,7 +883,7 @@ static struct clk_rcg2 gcc_ufs_phy_ice_core_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_ufs_phy_ice_core_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_ops,
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},
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};
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@ -897,7 +897,7 @@ static struct clk_rcg2 gcc_ufs_phy_phy_aux_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_ufs_phy_phy_aux_clk_src",
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.parent_data = gcc_parent_data_3,
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.num_parents = 1,
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.num_parents = ARRAY_SIZE(gcc_parent_data_3),
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.ops = &clk_rcg2_ops,
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},
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||||
};
|
||||
@ -911,7 +911,7 @@ static struct clk_rcg2 gcc_ufs_phy_unipro_core_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_ufs_phy_unipro_core_clk_src",
|
||||
.parent_data = gcc_parent_data_0,
|
||||
.num_parents = 3,
|
||||
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -934,7 +934,7 @@ static struct clk_rcg2 gcc_usb30_prim_master_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_usb30_prim_master_clk_src",
|
||||
.parent_data = gcc_parent_data_0,
|
||||
.num_parents = 3,
|
||||
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -948,7 +948,7 @@ static struct clk_rcg2 gcc_usb30_prim_mock_utmi_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_usb30_prim_mock_utmi_clk_src",
|
||||
.parent_data = gcc_parent_data_0,
|
||||
.num_parents = 3,
|
||||
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -962,7 +962,7 @@ static struct clk_rcg2 gcc_usb30_sec_master_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_usb30_sec_master_clk_src",
|
||||
.parent_data = gcc_parent_data_0,
|
||||
.num_parents = 3,
|
||||
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -976,7 +976,7 @@ static struct clk_rcg2 gcc_usb30_sec_mock_utmi_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_usb30_sec_mock_utmi_clk_src",
|
||||
.parent_data = gcc_parent_data_0,
|
||||
.num_parents = 3,
|
||||
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -990,7 +990,7 @@ static struct clk_rcg2 gcc_usb3_prim_phy_aux_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_usb3_prim_phy_aux_clk_src",
|
||||
.parent_data = gcc_parent_data_2,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_parent_data_2),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@ -1004,7 +1004,7 @@ static struct clk_rcg2 gcc_usb3_sec_phy_aux_clk_src = {
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_usb3_sec_phy_aux_clk_src",
|
||||
.parent_data = gcc_parent_data_2,
|
||||
.num_parents = 2,
|
||||
.num_parents = ARRAY_SIZE(gcc_parent_data_2),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
|
Loading…
Reference in New Issue
Block a user