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ARM: shmobile: r8a7794: Add USB clocks to device tree
Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com> [horms: resolved conflicts] Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -504,16 +504,19 @@
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mstp7_clks: mstp7_clks@e615014c {
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mstp7_clks: mstp7_clks@e615014c {
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compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
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compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
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reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
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clocks = <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
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clocks = <&mp_clk>, <&mp_clk>,
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<&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
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<&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
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<&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
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#clock-cells = <1>;
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#clock-cells = <1>;
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clock-indices = <
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clock-indices = <
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R8A7794_CLK_EHCI R8A7794_CLK_HSUSB
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R8A7794_CLK_HSCIF2 R8A7794_CLK_SCIF5
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R8A7794_CLK_HSCIF2 R8A7794_CLK_SCIF5
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R8A7794_CLK_SCIF4 R8A7794_CLK_HSCIF1 R8A7794_CLK_HSCIF0
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R8A7794_CLK_SCIF4 R8A7794_CLK_HSCIF1 R8A7794_CLK_HSCIF0
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R8A7794_CLK_SCIF3 R8A7794_CLK_SCIF2 R8A7794_CLK_SCIF1
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R8A7794_CLK_SCIF3 R8A7794_CLK_SCIF2 R8A7794_CLK_SCIF1
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R8A7794_CLK_SCIF0
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R8A7794_CLK_SCIF0
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>;
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>;
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clock-output-names =
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clock-output-names =
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"ehci", "hsusb",
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"hscif2", "scif5", "scif4", "hscif1", "hscif0",
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"hscif2", "scif5", "scif4", "hscif1", "hscif0",
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"scif3", "scif2", "scif1", "scif0";
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"scif3", "scif2", "scif1", "scif0";
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};
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};
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@ -57,6 +57,8 @@
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#define R8A7794_CLK_PWM 23
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#define R8A7794_CLK_PWM 23
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/* MSTP7 */
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/* MSTP7 */
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#define R8A7794_CLK_EHCI 3
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#define R8A7794_CLK_HSUSB 4
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#define R8A7794_CLK_HSCIF2 13
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#define R8A7794_CLK_HSCIF2 13
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#define R8A7794_CLK_SCIF5 14
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#define R8A7794_CLK_SCIF5 14
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#define R8A7794_CLK_SCIF4 15
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#define R8A7794_CLK_SCIF4 15
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