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Renesas ARM Based SoC DT Bindings Updates for v4.14
* Document R-Car D3 (r8a77995) SoC and Draak board * Document reserved SRAM for the SMP jump stub on R-Car Gen2 and RZ/G1 SoCs Geert Uytterhoeven says, "+Renesas R-Car Gen2 and RZ/G1 SoCs need a small piece of SRAM for the jump stub +for secondary CPU bringup and CPU hotplug. +This memory is reserved by adding a child node to a "mmio-sram" node..." * Add a VSP channel index to DU vsps Laurent Pinchart says, "multiple LIF instances in the VSP. The current DT bindings don't support specifying that kind of SoC integration scheme. Extend them with a VSP channel index." * Add R-Car M3-W (r8a7796) HDMI TX DT bindings This is compatible with existing R-Car H3 (r8a7795) support -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZf0QmAAoJENfPZGlqN0++gJkQAIXHdjc1uH78obMTPopSMDQf 6XiakfmnTHpVR8weU4yuX/7fngrUvfGS9GritFOCI+LdAe1PcLBnNkr2mYZ3PHVh uBfm1MJS3CO8mMM0ayVDmP9qjiQP/WDykowuDjkq5T2CeYVO7NS2iu8qwJFg3oFj deHYm+NZpEnVuK/BVB42A67F5S0O6xbv0aqZ/BccFA1xPAUQaHl14Q9w83mK0Orz zMZvg0Z+W8cgByT2zDrbyiJ+TD6OlvCzoyYZU6v/UhRwoMV+rq3A/cRiV0wHAYrp KALIE4Z/RpGDQfYPBaD427j/+gzCAn/aaoJMcOt+G41foMzzYupvPAplXkCpIoKu 3gDJCvLu+8j8nILY3qxaFNOKS4V3nI8Q4SjTf/7Ndr3qqQSjIeCq89jnuE/cii9b Krbcfg4ZpZ9ZzG9wBlcp/VXxvYkX2ayeMjQzEGniOHoZu6lMO+zFG9Riz5kf+uGK kkZ6muaUBcrTce8J6LXBmwrjJnbEeawU/QdnDgROB887e/c0b6PEpLMRkTpNbfzc Z7X5codxU/n6Gf9D+kC+haWSl1tMPjkbMUc6jOs+drkrZCXBMeD387A9K1mv0wJE 3PSCIZmapXrGeT0p1hj8OoEF9qdgUlcY0ZIf0nlnUr5+GorUAvRQ4p4weKh+YvLR Z9MMGX63FoGISA9gTmY1 =TnO5 -----END PGP SIGNATURE----- Merge tag 'renesas-dt-bindings-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Pull "Renesas ARM Based SoC DT Bindings Updates for v4.14" from Simon Horman: * Document R-Car D3 (r8a77995) SoC and Draak board * Document reserved SRAM for the SMP jump stub on R-Car Gen2 and RZ/G1 SoCs Geert Uytterhoeven says, "+Renesas R-Car Gen2 and RZ/G1 SoCs need a small piece of SRAM for the jump stub +for secondary CPU bringup and CPU hotplug. +This memory is reserved by adding a child node to a "mmio-sram" node..." * Add a VSP channel index to DU vsps Laurent Pinchart says, "multiple LIF instances in the VSP. The current DT bindings don't support specifying that kind of SoC integration scheme. Extend them with a VSP channel index." * Add R-Car M3-W (r8a7796) HDMI TX DT bindings This is compatible with existing R-Car H3 (r8a7795) support * tag 'renesas-dt-bindings-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Document Renesas Draak board DT bindings ARM: shmobile: Document R-Car D3 SoC DT bindings dt-bindings: display: rcar-du: Add a VSP channel index to the vsps DT property dt-bindings: sram: Document renesas,smp-sram dt-bindings: display: renesas: Add R-Car M3-W HDMI TX DT bindings
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commit
c71fbbcde0
@ -39,6 +39,8 @@ SoCs:
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compatible = "renesas,r8a7795"
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- R-Car M3-W (R8A77960)
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compatible = "renesas,r8a7796"
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- R-Car D3 (R8A77995)
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compatible = "renesas,r8a77995"
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Boards:
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@ -53,6 +55,8 @@ Boards:
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compatible = "renesas,blanche", "renesas,r8a7792"
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- BOCK-W
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compatible = "renesas,bockw", "renesas,r8a7778"
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- Draak (RTP0RC77995SEB0010S)
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compatible = "renesas,draak", "renesas,r8a77995"
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- Genmai (RTK772100BC00000BR)
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compatible = "renesas,genmai", "renesas,r7s72100"
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- GR-Peach (X28A-M01-E/F)
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@ -13,6 +13,7 @@ Required properties:
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- compatible : Shall contain one or more of
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- "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX
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- "renesas,r8a7796-hdmi" for R8A7796 (R-Car M3-W) compatible HDMI TX
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- "renesas,rcar-gen3-hdmi" for the generic R-Car Gen3 compatible HDMI TX
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When compatible with generic versions, nodes must list the SoC-specific
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@ -36,8 +36,10 @@ Required Properties:
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When supplied they must be named "dclkin.x" with "x" being the input
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clock numerical index.
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- vsps: A list of phandles to the VSP nodes that handle the memory
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interfaces for the DU channels.
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- vsps: A list of phandle and channel index tuples to the VSPs that handle
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the memory interfaces for the DU channels. The phandle identifies the VSP
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instance that serves the DU channel, and the channel index identifies the
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LIF instance in that VSP.
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Required nodes:
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@ -59,24 +61,24 @@ corresponding to each DU output.
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R8A7796 (M3-W) DPAD HDMI LVDS -
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Example: R8A7790 (R-Car H2) DU
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Example: R8A7795 (R-Car H3) ES2.0 DU
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du: du@feb00000 {
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compatible = "renesas,du-r8a7790";
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reg = <0 0xfeb00000 0 0x70000>,
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<0 0xfeb90000 0 0x1c>,
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<0 0xfeb94000 0 0x1c>;
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reg-names = "du", "lvds.0", "lvds.1";
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interrupt-parent = <&gic>;
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interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>,
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<0 268 IRQ_TYPE_LEVEL_HIGH>,
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<0 269 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp7_clks R8A7790_CLK_DU0>,
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<&mstp7_clks R8A7790_CLK_DU1>,
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<&mstp7_clks R8A7790_CLK_DU2>,
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<&mstp7_clks R8A7790_CLK_LVDS0>,
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<&mstp7_clks R8A7790_CLK_LVDS1>;
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clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
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du: display@feb00000 {
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compatible = "renesas,du-r8a7795";
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reg = <0 0xfeb00000 0 0x80000>,
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<0 0xfeb90000 0 0x14>;
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reg-names = "du", "lvds.0";
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interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 724>,
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<&cpg CPG_MOD 723>,
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<&cpg CPG_MOD 722>,
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<&cpg CPG_MOD 721>,
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<&cpg CPG_MOD 727>;
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clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
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vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;
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ports {
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#address-cells = <1>;
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@ -89,12 +91,19 @@ Example: R8A7790 (R-Car H2) DU
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};
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port@1 {
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reg = <1>;
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du_out_lvds0: endpoint {
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du_out_hdmi0: endpoint {
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remote-endpoint = <&dw_hdmi0_in>;
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};
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};
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port@2 {
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reg = <2>;
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du_out_lvds1: endpoint {
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du_out_hdmi1: endpoint {
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remote-endpoint = <&dw_hdmi1_in>;
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};
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};
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port@3 {
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reg = <3>;
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du_out_lvds0: endpoint {
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};
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};
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};
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27
Documentation/devicetree/bindings/sram/renesas,smp-sram.txt
Normal file
27
Documentation/devicetree/bindings/sram/renesas,smp-sram.txt
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@ -0,0 +1,27 @@
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* Renesas SMP SRAM
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Renesas R-Car Gen2 and RZ/G1 SoCs need a small piece of SRAM for the jump stub
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for secondary CPU bringup and CPU hotplug.
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This memory is reserved by adding a child node to a "mmio-sram" node, cfr.
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Documentation/devicetree/bindings/sram/sram.txt.
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Required child node properties:
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- compatible: Must be "renesas,smp-sram",
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- reg: Address and length of the reserved SRAM.
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The full physical (bus) address must be aligned to a 256 KiB boundary.
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Example:
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icram1: sram@e63c0000 {
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compatible = "mmio-sram";
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reg = <0 0xe63c0000 0 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0 0xe63c0000 0x1000>;
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smp-sram@0 {
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compatible = "renesas,smp-sram";
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reg = <0 0x10>;
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};
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};
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