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KVM: vmx/pmu: Add PMU_CAP_LBR_FMT check when guest LBR is enabled
Usespace could set the bits [0, 5] of the IA32_PERF_CAPABILITIES MSR which tells about the record format stored in the LBR records. The LBR will be enabled on the guest if host perf supports LBR (checked via x86_perf_get_lbr()) and the vcpu model is compatible with the host one. Signed-off-by: Like Xu <like.xu@linux.intel.com> Message-Id: <20210201051039.255478-4-like.xu@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -387,7 +387,12 @@ static inline u64 vmx_get_perf_capabilities(void)
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static inline u64 vmx_supported_debugctl(void)
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static inline u64 vmx_supported_debugctl(void)
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{
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{
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return 0;
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u64 debugctl = 0;
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if (vmx_get_perf_capabilities() & PMU_CAP_LBR_FMT)
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debugctl |= DEBUGCTLMSR_LBR;
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return debugctl;
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}
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}
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#endif /* __KVM_X86_VMX_CAPS_H */
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#endif /* __KVM_X86_VMX_CAPS_H */
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@ -183,6 +183,13 @@ bool intel_pmu_lbr_is_compatible(struct kvm_vcpu *vcpu)
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return boot_cpu_data.x86_model == guest_cpuid_model(vcpu);
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return boot_cpu_data.x86_model == guest_cpuid_model(vcpu);
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}
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}
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bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu)
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{
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struct x86_pmu_lbr *lbr = vcpu_to_lbr_records(vcpu);
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return lbr->nr && (vcpu_get_perf_capabilities(vcpu) & PMU_CAP_LBR_FMT);
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}
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static bool intel_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr)
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static bool intel_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr)
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{
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{
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struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
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struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
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@ -1950,6 +1950,16 @@ static u64 nested_vmx_truncate_sysenter_addr(struct kvm_vcpu *vcpu,
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return (unsigned long)data;
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return (unsigned long)data;
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}
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}
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static u64 vcpu_supported_debugctl(struct kvm_vcpu *vcpu)
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{
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u64 debugctl = vmx_supported_debugctl();
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if (!intel_pmu_lbr_is_enabled(vcpu))
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debugctl &= ~DEBUGCTLMSR_LBR;
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return debugctl;
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}
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/*
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/*
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* Writes msr value into the appropriate "register".
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* Writes msr value into the appropriate "register".
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* Returns 0 on success, non-0 otherwise.
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* Returns 0 on success, non-0 otherwise.
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@ -2001,7 +2011,7 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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vmcs_writel(GUEST_SYSENTER_ESP, data);
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vmcs_writel(GUEST_SYSENTER_ESP, data);
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break;
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break;
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case MSR_IA32_DEBUGCTLMSR: {
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case MSR_IA32_DEBUGCTLMSR: {
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u64 invalid = data & ~vmx_supported_debugctl();
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u64 invalid = data & ~vcpu_supported_debugctl(vcpu);
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if (invalid & (DEBUGCTLMSR_BTF|DEBUGCTLMSR_LBR)) {
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if (invalid & (DEBUGCTLMSR_BTF|DEBUGCTLMSR_LBR)) {
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if (report_ignored_msrs)
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if (report_ignored_msrs)
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vcpu_unimpl(vcpu, "%s: BTF|LBR in IA32_DEBUGCTLMSR 0x%llx, nop\n",
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vcpu_unimpl(vcpu, "%s: BTF|LBR in IA32_DEBUGCTLMSR 0x%llx, nop\n",
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@ -97,6 +97,7 @@ union vmx_exit_reason {
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#define vcpu_to_lbr_records(vcpu) (&to_vmx(vcpu)->lbr_desc.records)
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#define vcpu_to_lbr_records(vcpu) (&to_vmx(vcpu)->lbr_desc.records)
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bool intel_pmu_lbr_is_compatible(struct kvm_vcpu *vcpu);
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bool intel_pmu_lbr_is_compatible(struct kvm_vcpu *vcpu);
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bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu);
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struct lbr_desc {
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struct lbr_desc {
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/* Basic info about guest LBR records. */
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/* Basic info about guest LBR records. */
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