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sh: Add SCIF2 support for SH7763.
SH7763 has 3 SCIF device. Current code supports SCIF0 and 1. SCIF0 and 1 are same register constitution, but only SCIF2 is different. I added support of SCIF2. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -3,6 +3,7 @@
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*
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* Copyright (C) 2006 Paul Mundt
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* Copyright (C) 2007 Yoshihiro Shimoda
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* Copyright (C) 2008 Nobuhiro Iwamatsu
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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@ -55,6 +56,11 @@ static struct plat_sci_port sci_platform_data[] = {
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_SCIF,
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.irqs = { 76, 77, 79, 78 },
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}, {
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.mapbase = 0xffe10000,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_SCIF,
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.irqs = { 104, 105, 107, 106 },
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}, {
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.flags = 0,
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}
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@ -208,8 +214,8 @@ static struct intc_vect vectors[] __initdata = {
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INTC_VECT(TMU5, 0xe40), INTC_VECT(ADC, 0xe60),
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INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0),
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INTC_VECT(SSI2, 0xec0), INTC_VECT(SSI3, 0xee0),
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INTC_VECT(SCIF1_ERI, 0xf00), INTC_VECT(SCIF1_RXI, 0xf20),
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INTC_VECT(SCIF1_BRI, 0xf40), INTC_VECT(SCIF1_TXI, 0xf60),
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INTC_VECT(SCIF2_ERI, 0xf00), INTC_VECT(SCIF2_RXI, 0xf20),
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INTC_VECT(SCIF2_BRI, 0xf40), INTC_VECT(SCIF2_TXI, 0xf60),
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INTC_VECT(GPIO_CH0, 0xf80), INTC_VECT(GPIO_CH1, 0xfa0),
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INTC_VECT(GPIO_CH2, 0xfc0), INTC_VECT(GPIO_CH3, 0xfe0),
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};
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@ -410,7 +410,6 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
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#endif
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#if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
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defined(CONFIG_CPU_SUBTYPE_SH7763) || \
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defined(CONFIG_CPU_SUBTYPE_SH7780) || \
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defined(CONFIG_CPU_SUBTYPE_SH7785)
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static inline int scif_txroom(struct uart_port *port)
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@ -422,6 +421,22 @@ static inline int scif_rxroom(struct uart_port *port)
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{
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return sci_in(port, SCRFDR) & 0xff;
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}
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#elif defined(CONFIG_CPU_SUBTYPE_SH7763)
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static inline int scif_txroom(struct uart_port *port)
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{
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if((port->mapbase == 0xffe00000) || (port->mapbase == 0xffe08000)) /* SCIF0/1*/
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return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff);
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else /* SCIF2 */
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return SCIF2_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
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}
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static inline int scif_rxroom(struct uart_port *port)
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{
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if((port->mapbase == 0xffe00000) || (port->mapbase == 0xffe08000)) /* SCIF0/1*/
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return sci_in(port, SCRFDR) & 0xff;
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else /* SCIF2 */
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return sci_in(port, SCFDR) & SCIF2_RFDC_MASK;
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}
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#else
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static inline int scif_txroom(struct uart_port *port)
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{
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@ -123,8 +123,9 @@
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#elif defined(CONFIG_CPU_SUBTYPE_SH7763)
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# define SCSPTR0 0xffe00024 /* 16 bit SCIF */
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# define SCSPTR1 0xffe08024 /* 16 bit SCIF */
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# define SCSPTR2 0xffe10020 /* 16 bit SCIF/IRDA */
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# define SCIF_ORER 0x0001 /* overrun error bit */
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# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
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# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
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# define SCIF_ONLY
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#elif defined(CONFIG_CPU_SUBTYPE_SH7770)
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# define SCSPTR0 0xff923020 /* 16 bit SCIF */
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@ -188,6 +189,7 @@
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defined(CONFIG_CPU_SUBTYPE_SH7750S) || \
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defined(CONFIG_CPU_SUBTYPE_SH7751) || \
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defined(CONFIG_CPU_SUBTYPE_SH7751R) || \
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defined(CONFIG_CPU_SUBTYPE_SH7763) || \
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defined(CONFIG_CPU_SUBTYPE_SH7780) || \
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defined(CONFIG_CPU_SUBTYPE_SH7785) || \
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defined(CONFIG_CPU_SUBTYPE_SHX3)
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@ -225,14 +227,21 @@
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#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
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defined(CONFIG_CPU_SUBTYPE_SH7720) || \
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defined(CONFIG_CPU_SUBTYPE_SH7721)
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#define SCIF_ORER 0x0200
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#define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER)
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#define SCIF_RFDC_MASK 0x007f
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#define SCIF_TXROOM_MAX 64
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# define SCIF_ORER 0x0200
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# define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER)
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# define SCIF_RFDC_MASK 0x007f
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# define SCIF_TXROOM_MAX 64
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#elif defined(CONFIG_CPU_SUBTYPE_SH7763)
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# define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK )
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# define SCIF_RFDC_MASK 0x007f
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# define SCIF_TXROOM_MAX 64
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/* SH7763 SCIF2 support */
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# define SCIF2_RFDC_MASK 0x001f
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# define SCIF2_TXROOM_MAX 16
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#else
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#define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
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#define SCIF_RFDC_MASK 0x001f
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#define SCIF_TXROOM_MAX 16
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# define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
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# define SCIF_RFDC_MASK 0x001f
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# define SCIF_TXROOM_MAX 16
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#endif
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#if defined(SCI_ONLY)
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@ -445,11 +454,16 @@ SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16)
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defined(CONFIG_CPU_SUBTYPE_SH7763) || \
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defined(CONFIG_CPU_SUBTYPE_SH7780) || \
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defined(CONFIG_CPU_SUBTYPE_SH7785)
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SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16)
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SCIF_FNS(SCTFDR, 0x0e, 16, 0x1C, 16)
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SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16)
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SCIF_FNS(SCSPTR, 0, 0, 0x24, 16)
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SCIF_FNS(SCLSR, 0, 0, 0x28, 16)
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#if defined(CONFIG_CPU_SUBTYPE_SH7763)
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/* SH7763 SCIF2 */
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SCIF_FNS(SCFDR, 0, 0, 0x1C, 16)
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SCIF_FNS(SCSPTR2, 0, 0, 0x20, 16)
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SCIF_FNS(SCLSR2, 0, 0, 0x24, 16)
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#endif /* CONFIG_CPU_SUBTYPE_SH7763 */
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#else
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SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16)
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#if defined(CONFIG_CPU_SUBTYPE_SH7722)
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@ -652,6 +666,9 @@ static inline int sci_rxd_in(struct uart_port *port)
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return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
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if (port->mapbase == 0xffe08000)
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return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
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if (port->mapbase == 0xffe10000)
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return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF/IRDA */
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return 1;
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}
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#elif defined(CONFIG_CPU_SUBTYPE_SH7770)
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@ -764,8 +781,7 @@ static inline int sci_rxd_in(struct uart_port *port)
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* -- Mitch Davis - 15 Jul 2000
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*/
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#if defined(CONFIG_CPU_SUBTYPE_SH7763) || \
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defined(CONFIG_CPU_SUBTYPE_SH7780) || \
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#if defined(CONFIG_CPU_SUBTYPE_SH7780) || \
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defined(CONFIG_CPU_SUBTYPE_SH7785)
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#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1)
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#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
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