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i2c: designware: Add support for an interface clock
The Synopsys I2C Controller has an interface clock, but most SoCs hide this away. However, on some SoCs you need to explicitly enable the interface clock in order to access the registers. Therefore, add support for an optional interface clock. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Gareth Williams <gareth.williams.jx@renesas.com> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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@ -251,13 +251,27 @@ unsigned long i2c_dw_clk_rate(struct dw_i2c_dev *dev)
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int i2c_dw_prepare_clk(struct dw_i2c_dev *dev, bool prepare)
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{
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int ret;
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if (IS_ERR(dev->clk))
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return PTR_ERR(dev->clk);
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if (prepare)
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return clk_prepare_enable(dev->clk);
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if (prepare) {
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/* Optional interface clock */
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ret = clk_prepare_enable(dev->pclk);
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if (ret)
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return ret;
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ret = clk_prepare_enable(dev->clk);
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if (ret)
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clk_disable_unprepare(dev->pclk);
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return ret;
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}
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clk_disable_unprepare(dev->clk);
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clk_disable_unprepare(dev->pclk);
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return 0;
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}
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EXPORT_SYMBOL_GPL(i2c_dw_prepare_clk);
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@ -177,6 +177,7 @@
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* @base: IO registers pointer
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* @cmd_complete: tx completion indicator
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* @clk: input reference clock
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* @pclk: clock required to access the registers
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* @slave: represent an I2C slave device
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* @cmd_err: run time hadware error code
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* @msgs: points to an array of messages currently being transferred
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@ -227,6 +228,7 @@ struct dw_i2c_dev {
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void __iomem *ext;
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struct completion cmd_complete;
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struct clk *clk;
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struct clk *pclk;
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struct reset_control *rst;
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struct i2c_client *slave;
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u32 (*get_clk_rate_khz) (struct dw_i2c_dev *dev);
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@ -344,6 +344,11 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
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else
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i2c_dw_configure_master(dev);
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/* Optional interface clock */
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dev->pclk = devm_clk_get_optional(&pdev->dev, "pclk");
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if (IS_ERR(dev->pclk))
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return PTR_ERR(dev->pclk);
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dev->clk = devm_clk_get(&pdev->dev, NULL);
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if (!i2c_dw_prepare_clk(dev, true)) {
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u64 clk_khz;
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