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drm/i915: We implement WaDisableL3Bank2xClockGate:vlv
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -4981,6 +4981,7 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
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GEN6_RCPBUNIT_CLOCK_GATE_DISABLE |
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GEN6_RCCUNIT_CLOCK_GATE_DISABLE);
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/* WaDisableL3Bank2xClockGate:vlv */
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I915_WRITE(GEN7_UCGCTL4, GEN7_L3BANK2X_CLOCK_GATE_DISABLE);
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I915_WRITE(MI_ARB_VLV, MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE);
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