renegade-project/linux-next
2
0
Fork 0
mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-24 13:13:57 +08:00
Code

ARM: l2c: ux500: don't try to change the L2 cache auxiliary control register

Browse Source 
ux500 can't change the auxiliary control register, so there's no point
passing values to try and modify it to the l2x0 init functions.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2014-03-19 12:47:58 +00:00
parent c4a202c8ae
commit c59917f877
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/mach-ux500/cache-l2x0.c
View File

@ -57,9 +57,9 @@ static int __init ux500_l2x0_init(void)
outer_cache.write_sec = ux500_l2c310_write_sec;
if (of_have_populated_dt())
l2x0_of_init(0x3e000000, 0xc00f0fff);
l2x0_of_init(0, ~0);
else
l2x0_init(l2x0_base, 0x3e000000, 0xc00f0fff);
l2x0_init(l2x0_base, 0, ~0);
return 0;
}