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amd8111e: add GRO support
Use napi_complete_done() instead of __napi_complete() to : 1) Get support of gro_flush_timeout if opt-in 2) Not rearm interrupts for busy-polling users. 3) use standard NAPI API. 4) get rid of baroque code and ease maintenance. Signed-off-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Eric Dumazet
David S. Miller
parent
1fa8c5f33a
commit
c46e9907d4
@ -695,125 +695,105 @@ static int amd8111e_rx_poll(struct napi_struct *napi, int budget)
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void __iomem *mmio = lp->mmio;
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struct sk_buff *skb,*new_skb;
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int min_pkt_len, status;
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unsigned int intr0;
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int num_rx_pkt = 0;
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short pkt_len;
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#if AMD8111E_VLAN_TAG_USED
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short vtag;
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#endif
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int rx_pkt_limit = budget;
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unsigned long flags;
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if (rx_pkt_limit <= 0)
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goto rx_not_empty;
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while (num_rx_pkt < budget) {
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status = le16_to_cpu(lp->rx_ring[rx_index].rx_flags);
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if (status & OWN_BIT)
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break;
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do{
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/* process receive packets until we use the quota.
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* If we own the next entry, it's a new packet. Send it up.
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/* There is a tricky error noted by John Murphy,
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* <murf@perftech.com> to Russ Nelson: Even with
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* full-sized * buffers it's possible for a
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* jabber packet to use two buffers, with only
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* the last correctly noting the error.
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*/
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while(1) {
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status = le16_to_cpu(lp->rx_ring[rx_index].rx_flags);
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if (status & OWN_BIT)
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break;
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/* There is a tricky error noted by John Murphy,
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* <murf@perftech.com> to Russ Nelson: Even with
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* full-sized * buffers it's possible for a
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* jabber packet to use two buffers, with only
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* the last correctly noting the error.
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*/
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if(status & ERR_BIT) {
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/* resetting flags */
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lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS;
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goto err_next_pkt;
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}
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/* check for STP and ENP */
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if(!((status & STP_BIT) && (status & ENP_BIT))){
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/* resetting flags */
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lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS;
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goto err_next_pkt;
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}
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pkt_len = le16_to_cpu(lp->rx_ring[rx_index].msg_count) - 4;
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if (status & ERR_BIT) {
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/* resetting flags */
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lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS;
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goto err_next_pkt;
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}
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/* check for STP and ENP */
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if (!((status & STP_BIT) && (status & ENP_BIT))){
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/* resetting flags */
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lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS;
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goto err_next_pkt;
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}
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pkt_len = le16_to_cpu(lp->rx_ring[rx_index].msg_count) - 4;
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#if AMD8111E_VLAN_TAG_USED
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vtag = status & TT_MASK;
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/*MAC will strip vlan tag*/
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if (vtag != 0)
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min_pkt_len =MIN_PKT_LEN - 4;
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vtag = status & TT_MASK;
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/* MAC will strip vlan tag */
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if (vtag != 0)
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min_pkt_len = MIN_PKT_LEN - 4;
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else
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#endif
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min_pkt_len =MIN_PKT_LEN;
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min_pkt_len = MIN_PKT_LEN;
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if (pkt_len < min_pkt_len) {
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lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS;
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lp->drv_rx_errors++;
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goto err_next_pkt;
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}
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if(--rx_pkt_limit < 0)
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goto rx_not_empty;
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new_skb = netdev_alloc_skb(dev, lp->rx_buff_len);
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if (!new_skb) {
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/* if allocation fail,
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* ignore that pkt and go to next one
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*/
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lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS;
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lp->drv_rx_errors++;
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goto err_next_pkt;
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}
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if (pkt_len < min_pkt_len) {
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lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS;
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lp->drv_rx_errors++;
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goto err_next_pkt;
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}
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new_skb = netdev_alloc_skb(dev, lp->rx_buff_len);
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if (!new_skb) {
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/* if allocation fail,
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* ignore that pkt and go to next one
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*/
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lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS;
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lp->drv_rx_errors++;
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goto err_next_pkt;
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}
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skb_reserve(new_skb, 2);
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skb = lp->rx_skbuff[rx_index];
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pci_unmap_single(lp->pci_dev,lp->rx_dma_addr[rx_index],
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lp->rx_buff_len-2, PCI_DMA_FROMDEVICE);
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skb_put(skb, pkt_len);
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lp->rx_skbuff[rx_index] = new_skb;
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lp->rx_dma_addr[rx_index] = pci_map_single(lp->pci_dev,
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new_skb->data,
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lp->rx_buff_len-2,
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PCI_DMA_FROMDEVICE);
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skb_reserve(new_skb, 2);
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skb = lp->rx_skbuff[rx_index];
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pci_unmap_single(lp->pci_dev,lp->rx_dma_addr[rx_index],
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lp->rx_buff_len-2, PCI_DMA_FROMDEVICE);
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skb_put(skb, pkt_len);
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lp->rx_skbuff[rx_index] = new_skb;
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lp->rx_dma_addr[rx_index] = pci_map_single(lp->pci_dev,
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new_skb->data,
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lp->rx_buff_len-2,
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PCI_DMA_FROMDEVICE);
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skb->protocol = eth_type_trans(skb, dev);
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skb->protocol = eth_type_trans(skb, dev);
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#if AMD8111E_VLAN_TAG_USED
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if (vtag == TT_VLAN_TAGGED){
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u16 vlan_tag = le16_to_cpu(lp->rx_ring[rx_index].tag_ctrl_info);
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__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
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}
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#endif
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netif_receive_skb(skb);
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/*COAL update rx coalescing parameters*/
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lp->coal_conf.rx_packets++;
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lp->coal_conf.rx_bytes += pkt_len;
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num_rx_pkt++;
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err_next_pkt:
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lp->rx_ring[rx_index].buff_phy_addr
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= cpu_to_le32(lp->rx_dma_addr[rx_index]);
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lp->rx_ring[rx_index].buff_count =
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cpu_to_le16(lp->rx_buff_len-2);
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wmb();
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lp->rx_ring[rx_index].rx_flags |= cpu_to_le16(OWN_BIT);
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rx_index = (++lp->rx_idx) & RX_RING_DR_MOD_MASK;
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if (vtag == TT_VLAN_TAGGED){
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u16 vlan_tag = le16_to_cpu(lp->rx_ring[rx_index].tag_ctrl_info);
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__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
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}
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/* Check the interrupt status register for more packets in the
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* mean time. Process them since we have not used up our quota.
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*/
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intr0 = readl(mmio + INT0);
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/*Ack receive packets */
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writel(intr0 & RINT0,mmio + INT0);
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#endif
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napi_gro_receive(napi, skb);
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/* COAL update rx coalescing parameters */
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lp->coal_conf.rx_packets++;
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lp->coal_conf.rx_bytes += pkt_len;
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num_rx_pkt++;
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} while(intr0 & RINT0);
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err_next_pkt:
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lp->rx_ring[rx_index].buff_phy_addr
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= cpu_to_le32(lp->rx_dma_addr[rx_index]);
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lp->rx_ring[rx_index].buff_count =
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cpu_to_le16(lp->rx_buff_len-2);
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wmb();
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lp->rx_ring[rx_index].rx_flags |= cpu_to_le16(OWN_BIT);
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rx_index = (++lp->rx_idx) & RX_RING_DR_MOD_MASK;
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}
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if (num_rx_pkt < budget && napi_complete_done(napi, num_rx_pkt)) {
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unsigned long flags;
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if (rx_pkt_limit > 0) {
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/* Receive descriptor is empty now */
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spin_lock_irqsave(&lp->lock, flags);
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__napi_complete(napi);
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writel(VAL0|RINTEN0, mmio + INTEN0);
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writel(VAL2 | RDMD0, mmio + CMD0);
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spin_unlock_irqrestore(&lp->lock, flags);
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}
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rx_not_empty:
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return num_rx_pkt;
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}
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