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xHCI: Implement AMD PLL quirk
This patch disable the optional PM feature inside the Hudson3 platform under the following conditions: 1. If an isochronous device is connected to xHCI port and is active; 2. Optional PM feature that powers down the internal Bus PLL when the link is in low power state is enabled. The PM feature needs to be disabled to eliminate PLL startup delays when the link comes out of low power state. The performance of DMA data transfer could be impacted if system delay were encountered and in addition to the PLL start up delays. Disabling the PM would leave room for unpredictable system delays in order to guarantee uninterrupted data transfer to isochronous audio or video stream devices that require time sensitive information. If data in an audio/video stream was interrupted then erratic audio or video performance may be encountered. AMD PLL quirk is already implemented in OHCI/EHCI driver. After moving the quirk code to pci-quirks.c and export them, xHCI driver can call it directly without having the quirk implementation in itself. Signed-off-by: Andiry Xu <andiry.xu@amd.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
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@ -114,6 +114,10 @@ static int xhci_pci_setup(struct usb_hcd *hcd)
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if (pdev->vendor == PCI_VENDOR_ID_NEC)
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xhci->quirks |= XHCI_NEC_HOST;
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/* AMD PLL quirk */
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if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
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xhci->quirks |= XHCI_AMD_PLL_FIX;
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/* Make sure the HC is halted. */
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retval = xhci_halt(xhci);
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if (retval)
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@ -619,6 +619,13 @@ static void xhci_giveback_urb_in_irq(struct xhci_hcd *xhci,
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/* Only giveback urb when this is the last td in urb */
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if (urb_priv->td_cnt == urb_priv->length) {
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if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
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xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
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if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
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if (xhci->quirks & XHCI_AMD_PLL_FIX)
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usb_amd_quirk_pll_enable();
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}
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}
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usb_hcd_unlink_urb_from_ep(hcd, urb);
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xhci_dbg(xhci, "Giveback %s URB %p\n", adjective, urb);
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@ -1565,8 +1572,17 @@ td_cleanup:
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urb_priv->td_cnt++;
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/* Giveback the urb when all the tds are completed */
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if (urb_priv->td_cnt == urb_priv->length)
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if (urb_priv->td_cnt == urb_priv->length) {
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ret = 1;
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if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
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xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
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if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs
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== 0) {
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if (xhci->quirks & XHCI_AMD_PLL_FIX)
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usb_amd_quirk_pll_enable();
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}
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}
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}
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}
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return ret;
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@ -3153,6 +3169,12 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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}
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}
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if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
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if (xhci->quirks & XHCI_AMD_PLL_FIX)
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usb_amd_quirk_pll_disable();
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}
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xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs++;
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giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
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start_cycle, start_trb);
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return 0;
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@ -550,6 +550,9 @@ void xhci_stop(struct usb_hcd *hcd)
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del_timer_sync(&xhci->event_ring_timer);
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#endif
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if (xhci->quirks & XHCI_AMD_PLL_FIX)
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usb_amd_dev_put();
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xhci_dbg(xhci, "// Disabling event ring interrupts\n");
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temp = xhci_readl(xhci, &xhci->op_regs->status);
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xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
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@ -30,6 +30,7 @@
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/* Code sharing between pci-quirks and xhci hcd */
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#include "xhci-ext-caps.h"
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#include "pci-quirks.h"
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/* xHCI PCI Configuration Registers */
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#define XHCI_SBRN_OFFSET (0x60)
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@ -1279,6 +1280,7 @@ struct xhci_hcd {
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#define XHCI_LINK_TRB_QUIRK (1 << 0)
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#define XHCI_RESET_EP_QUIRK (1 << 1)
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#define XHCI_NEC_HOST (1 << 2)
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#define XHCI_AMD_PLL_FIX (1 << 3)
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/* There are two roothubs to keep track of bus suspend info for */
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struct xhci_bus_state bus_state[2];
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/* Is each xHCI roothub port a USB 3.0, USB 2.0, or USB 1.1 port? */
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