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mfd: db8500: Provide cpufreq table as platform data
The cpufreq table needs dynamically update due to what the PRCMU firmware is supporting. The table is then provided through to the mfd child device as platform data. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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@ -31,6 +31,7 @@
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#include <linux/mfd/abx500/ab8500.h>
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#include <linux/mfd/abx500/ab8500.h>
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#include <linux/regulator/db8500-prcmu.h>
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#include <linux/regulator/db8500-prcmu.h>
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#include <linux/regulator/machine.h>
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#include <linux/regulator/machine.h>
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#include <linux/cpufreq.h>
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#include <asm/hardware/gic.h>
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#include <asm/hardware/gic.h>
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#include <mach/hardware.h>
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#include <mach/hardware.h>
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#include <mach/irqs.h>
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#include <mach/irqs.h>
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@ -3002,6 +3003,15 @@ static struct regulator_init_data db8500_regulators[DB8500_NUM_REGULATORS] = {
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},
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},
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};
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};
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/* CPU FREQ table, may be changed due to if MAX_OPP is supported. */
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static struct cpufreq_frequency_table db8500_cpufreq_table[] = {
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{ .frequency = 200000, .index = ARM_EXTCLK,},
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{ .frequency = 400000, .index = ARM_50_OPP,},
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{ .frequency = 800000, .index = ARM_100_OPP,},
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{ .frequency = CPUFREQ_TABLE_END,}, /* To be used for MAX_OPP. */
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{ .frequency = CPUFREQ_TABLE_END,},
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};
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static struct resource ab8500_resources[] = {
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static struct resource ab8500_resources[] = {
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[0] = {
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[0] = {
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.start = IRQ_DB8500_AB8500,
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.start = IRQ_DB8500_AB8500,
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@ -3020,6 +3030,8 @@ static struct mfd_cell db8500_prcmu_devs[] = {
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{
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{
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.name = "cpufreq-u8500",
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.name = "cpufreq-u8500",
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.of_compatible = "stericsson,cpufreq-u8500",
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.of_compatible = "stericsson,cpufreq-u8500",
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.platform_data = &db8500_cpufreq_table,
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.pdata_size = sizeof(db8500_cpufreq_table),
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},
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},
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{
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{
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.name = "ab8500-core",
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.name = "ab8500-core",
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@ -3030,6 +3042,14 @@ static struct mfd_cell db8500_prcmu_devs[] = {
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},
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},
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};
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};
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static void db8500_prcmu_update_cpufreq(void)
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{
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if (prcmu_has_arm_maxopp()) {
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db8500_cpufreq_table[3].frequency = 1000000;
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db8500_cpufreq_table[3].index = ARM_MAX_OPP;
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}
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}
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/**
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/**
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* prcmu_fw_init - arch init call for the Linux PRCMU fw init logic
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* prcmu_fw_init - arch init call for the Linux PRCMU fw init logic
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*
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*
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@ -3074,6 +3094,8 @@ static int __devinit db8500_prcmu_probe(struct platform_device *pdev)
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if (cpu_is_u8500v20_or_later())
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if (cpu_is_u8500v20_or_later())
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prcmu_config_esram0_deep_sleep(ESRAM0_DEEP_SLEEP_STATE_RET);
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prcmu_config_esram0_deep_sleep(ESRAM0_DEEP_SLEEP_STATE_RET);
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db8500_prcmu_update_cpufreq();
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err = mfd_add_devices(&pdev->dev, 0, db8500_prcmu_devs,
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err = mfd_add_devices(&pdev->dev, 0, db8500_prcmu_devs,
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ARRAY_SIZE(db8500_prcmu_devs), NULL, 0, NULL);
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ARRAY_SIZE(db8500_prcmu_devs), NULL, 0, NULL);
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if (err) {
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if (err) {
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