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Berlin64 DT changes for v4.9
- enable dw wdt nodes unconditionally, driver supports multiple instances now - switch to Cortex-A53 pmu compatible - add L2 cache topology -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJX7C9QAAoJEN2kpao7fSL4HZ4P/1iBSTQHNdlYBAGTg+kane01 WM1d9ZjklytnSqdlON9TI9TTX8P/cX8MvNpeoA5KTDj3zDp+7mnEhKI2qe2j7zaL aMs0cVvTCOyZlTK6G/GDo6o2kTz4dZQhynFnxiYxNxTedV2kBxPSkHSbFTLnxNZ6 XjG2wWLfMBTXZGv5659IwaUlcDJNDKX7Muh3benV2pjrgo26bDhwhb60THLTTqqB s4w54cmnj3BzhJ8TJrQRtPsBwvRmkdKt0dKpQyAJm8MSRCWKJCVKKF+bz9NUlGRC ypgz932rgM+a6BbyDCNBCH6uqYtle7itkWB2hcuKhT6R/qgodbYO315+OAVlr7n7 T5/sWSA405qgdzyS1hjZyasWGkpr9qpC8i/az0WFn7na1dd4zqQRCimsCytGLc2i VWuXFXdaqtkWPqpSzcMRpvgnmz1WlrNaJmZxeQhCdzE/JkEEE3JpYWimqqO5anUU 0I26IUCUqAlkhw+FZP7mKvSd5MWthPdyr8iryAhGegkP5dJWLIOV1/6/cG7AcrNl J3eK6qc8mybJ500zRN0X9lOeoh7VE60gYr8+CtrGJ708iFgh50mTb4N9HQcGCeqp bAhTXnzNmMij1KfXxmNpa94NuPJzJPlZeC+VJGqzccBVgnhpijipKUwH7L1Qfm6O VBH33G7ydO4fEwECmeLj =DbPd -----END PGP SIGNATURE----- Merge tag 'berlin64-dt-for-v4.9-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt64 Berlin64 DT changes for v4.9 - enable dw wdt nodes unconditionally, driver supports multiple instances now - switch to Cortex-A53 pmu compatible - add L2 cache topology * tag 'berlin64-dt-for-v4.9-1' of git://git.infradead.org/users/hesselba/linux-berlin: arm64: dts: berlin4ct: Add L2 cache topology arm64: dts: berlin4ct: enable all wdt nodes unconditionally arm64: dts: berlin4ct: switch to Cortex-A53 specific pmu nodes Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
c1fd2794a4
@ -68,6 +68,7 @@
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device_type = "cpu";
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reg = <0x0>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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cpu-idle-states = <&CPU_SLEEP_0>;
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};
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@ -76,6 +77,7 @@
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device_type = "cpu";
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reg = <0x1>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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cpu-idle-states = <&CPU_SLEEP_0>;
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};
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@ -84,6 +86,7 @@
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device_type = "cpu";
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reg = <0x2>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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cpu-idle-states = <&CPU_SLEEP_0>;
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};
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@ -92,9 +95,14 @@
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device_type = "cpu";
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reg = <0x3>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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cpu-idle-states = <&CPU_SLEEP_0>;
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};
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l2: cache {
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compatible = "cache";
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};
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idle-states {
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entry-method = "psci";
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CPU_SLEEP_0: cpu-sleep-0 {
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@ -115,7 +123,7 @@
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};
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pmu {
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compatible = "arm,armv8-pmuv3";
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compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3";
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interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
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@ -279,7 +287,6 @@
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reg = <0x4000 0x100>;
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clocks = <&osc>;
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interrupts = <1>;
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status = "disabled";
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};
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wdt2: watchdog@5000 {
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@ -287,7 +294,6 @@
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reg = <0x5000 0x100>;
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clocks = <&osc>;
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interrupts = <2>;
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status = "disabled";
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};
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sm_gpio0: gpio@8000 {
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