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drm/amd/powerplay: make mmhub pg bit configured by pg_flags
The mmhub pg features enabling should be indicated by pg_flags. Reported-by: Lijo Lazar <Lijo.Lazar@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -508,7 +508,8 @@ static int nv_common_early_init(void *handle)
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AMD_CG_SUPPORT_BIF_MGCG |
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AMD_CG_SUPPORT_BIF_LS;
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adev->pg_flags = AMD_PG_SUPPORT_VCN |
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AMD_PG_SUPPORT_VCN_DPG;
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AMD_PG_SUPPORT_VCN_DPG |
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AMD_PG_SUPPORT_MMHUB;
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adev->external_rev_id = adev->rev_id + 0x1;
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break;
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default:
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@ -325,7 +325,6 @@ navi10_get_allowed_feature_mask(struct smu_context *smu,
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| FEATURE_MASK(FEATURE_FAN_CONTROL_BIT)
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| FEATURE_MASK(FEATURE_THERMAL_BIT)
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| FEATURE_MASK(FEATURE_LED_DISPLAY_BIT)
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| FEATURE_MASK(FEATURE_MMHUB_PG_BIT)
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| FEATURE_MASK(FEATURE_ATHUB_PG_BIT)
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| FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT)
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| FEATURE_MASK(FEATURE_DS_GFXCLK_BIT)
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@ -346,6 +345,9 @@ navi10_get_allowed_feature_mask(struct smu_context *smu,
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*(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_FW_DSTATE_BIT);
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}
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if (smu->adev->pg_flags & AMD_PG_SUPPORT_MMHUB)
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*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MMHUB_PG_BIT);
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if (smu->adev->pg_flags & AMD_PG_SUPPORT_VCN)
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*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VCN_PG_BIT);
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