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arm64: KVM: Propagate full Spectre v2 workaround state to KVM guests
Recent commits added the explicit notion of "workaround not required" to the state of the Spectre v2 (aka. BP_HARDENING) workaround, where we just had "needed" and "unknown" before. Export this knowledge to the rest of the kernel and enhance the existing kvm_arm_harden_branch_predictor() to report this new state as well. Export this new state to guests when they use KVM's firmware interface emulation. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Steven Price <steven.price@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -362,7 +362,11 @@ static inline void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu) {}
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static inline void kvm_arm_vhe_guest_enter(void) {}
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static inline void kvm_arm_vhe_guest_exit(void) {}
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static inline bool kvm_arm_harden_branch_predictor(void)
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#define KVM_BP_HARDEN_UNKNOWN -1
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#define KVM_BP_HARDEN_WA_NEEDED 0
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#define KVM_BP_HARDEN_NOT_REQUIRED 1
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static inline int kvm_arm_harden_branch_predictor(void)
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{
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switch(read_cpuid_part()) {
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#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
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@ -370,10 +374,12 @@ static inline bool kvm_arm_harden_branch_predictor(void)
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case ARM_CPU_PART_CORTEX_A12:
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case ARM_CPU_PART_CORTEX_A15:
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case ARM_CPU_PART_CORTEX_A17:
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return true;
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return KVM_BP_HARDEN_WA_NEEDED;
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#endif
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case ARM_CPU_PART_CORTEX_A7:
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return KVM_BP_HARDEN_NOT_REQUIRED;
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default:
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return false;
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return KVM_BP_HARDEN_UNKNOWN;
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}
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}
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@ -614,6 +614,12 @@ static inline bool system_uses_irq_prio_masking(void)
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cpus_have_const_cap(ARM64_HAS_IRQ_PRIO_MASKING);
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}
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#define ARM64_BP_HARDEN_UNKNOWN -1
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#define ARM64_BP_HARDEN_WA_NEEDED 0
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#define ARM64_BP_HARDEN_NOT_REQUIRED 1
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int get_spectre_v2_workaround_state(void);
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#define ARM64_SSBD_UNKNOWN -1
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#define ARM64_SSBD_FORCE_DISABLE 0
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#define ARM64_SSBD_KERNEL 1
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@ -620,9 +620,21 @@ static inline void kvm_arm_vhe_guest_exit(void)
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isb();
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}
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static inline bool kvm_arm_harden_branch_predictor(void)
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#define KVM_BP_HARDEN_UNKNOWN -1
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#define KVM_BP_HARDEN_WA_NEEDED 0
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#define KVM_BP_HARDEN_NOT_REQUIRED 1
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static inline int kvm_arm_harden_branch_predictor(void)
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{
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return cpus_have_const_cap(ARM64_HARDEN_BRANCH_PREDICTOR);
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switch (get_spectre_v2_workaround_state()) {
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case ARM64_BP_HARDEN_WA_NEEDED:
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return KVM_BP_HARDEN_WA_NEEDED;
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case ARM64_BP_HARDEN_NOT_REQUIRED:
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return KVM_BP_HARDEN_NOT_REQUIRED;
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case ARM64_BP_HARDEN_UNKNOWN:
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default:
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return KVM_BP_HARDEN_UNKNOWN;
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}
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}
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#define KVM_SSBD_UNKNOWN -1
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@ -554,6 +554,17 @@ cpu_enable_cache_maint_trap(const struct arm64_cpu_capabilities *__unused)
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static bool __hardenbp_enab = true;
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static bool __spectrev2_safe = true;
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int get_spectre_v2_workaround_state(void)
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{
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if (__spectrev2_safe)
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return ARM64_BP_HARDEN_NOT_REQUIRED;
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if (!__hardenbp_enab)
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return ARM64_BP_HARDEN_UNKNOWN;
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return ARM64_BP_HARDEN_WA_NEEDED;
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}
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/*
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* List of CPUs that do not need any Spectre-v2 mitigation at all.
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*/
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@ -854,14 +865,16 @@ ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr,
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ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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if (__spectrev2_safe)
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switch (get_spectre_v2_workaround_state()) {
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case ARM64_BP_HARDEN_NOT_REQUIRED:
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return sprintf(buf, "Not affected\n");
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if (__hardenbp_enab)
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case ARM64_BP_HARDEN_WA_NEEDED:
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return sprintf(buf, "Mitigation: Branch predictor hardening\n");
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case ARM64_BP_HARDEN_UNKNOWN:
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default:
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return sprintf(buf, "Vulnerable\n");
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}
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}
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ssize_t cpu_show_spec_store_bypass(struct device *dev,
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struct device_attribute *attr, char *buf)
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@ -401,9 +401,17 @@ int kvm_hvc_call_handler(struct kvm_vcpu *vcpu)
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feature = smccc_get_arg1(vcpu);
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switch(feature) {
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case ARM_SMCCC_ARCH_WORKAROUND_1:
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if (kvm_arm_harden_branch_predictor())
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switch (kvm_arm_harden_branch_predictor()) {
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case KVM_BP_HARDEN_UNKNOWN:
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break;
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case KVM_BP_HARDEN_WA_NEEDED:
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val = SMCCC_RET_SUCCESS;
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break;
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case KVM_BP_HARDEN_NOT_REQUIRED:
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val = SMCCC_RET_NOT_REQUIRED;
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break;
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}
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break;
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case ARM_SMCCC_ARCH_WORKAROUND_2:
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switch (kvm_arm_have_ssbd()) {
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case KVM_SSBD_FORCE_DISABLE:
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