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selftests: bpf: update testcases for BPF_ALU | BPF_ARSH
"arsh32 on imm" and "arsh32 on reg" now are accepted. Also added two new testcases to make sure arsh32 won't be treated as arsh64 during interpretation or JIT code-gen for which case the high bits will be moved into low halve that the testcases could catch them. Reviewed-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: Jiong Wang <jiong.wang@netronome.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org>
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@ -721,8 +721,18 @@ static struct bpf_test tests[] = {
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BPF_ALU32_IMM(BPF_ARSH, BPF_REG_0, 5),
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BPF_EXIT_INSN(),
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},
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.result = REJECT,
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.errstr = "unknown opcode c4",
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.result = ACCEPT,
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.retval = 0,
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},
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{
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"arsh32 on imm 2",
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.insns = {
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BPF_LD_IMM64(BPF_REG_0, 0x1122334485667788),
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BPF_ALU32_IMM(BPF_ARSH, BPF_REG_0, 7),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = -16069393,
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},
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{
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"arsh32 on reg",
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@ -732,8 +742,19 @@ static struct bpf_test tests[] = {
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BPF_ALU32_REG(BPF_ARSH, BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = REJECT,
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.errstr = "unknown opcode cc",
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.result = ACCEPT,
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.retval = 0,
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},
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{
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"arsh32 on reg 2",
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.insns = {
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BPF_LD_IMM64(BPF_REG_0, 0xffff55667788),
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BPF_MOV64_IMM(BPF_REG_1, 15),
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BPF_ALU32_REG(BPF_ARSH, BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 43724,
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},
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{
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"arsh64 on imm",
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