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dt-bindings: Add documentation for GP10B GPU
GP10B's definition is mostly similar to GK20A's and GM20B's. The only noticeable difference is the use of power domains instead of a regulator for power supply. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -5,6 +5,7 @@ Required properties:
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Currently recognized values:
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- nvidia,gk20a
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- nvidia,gm20b
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- nvidia,gp10b
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- reg: Physical base address and length of the controller's registers.
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Must contain two entries:
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- first entry for bar0
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@ -14,7 +15,8 @@ Required properties:
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- interrupt-names: Must include the following entries:
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- stall
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- nonstall
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- vdd-supply: regulator for supply voltage.
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- vdd-supply: regulator for supply voltage. Only required for GPUs not using
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power domains.
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- clocks: Must contain an entry for each entry in clock-names.
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See ../clocks/clock-bindings.txt for details.
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- clock-names: Must include the following entries:
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@ -27,6 +29,8 @@ is also required:
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See ../reset/reset.txt for details.
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- reset-names: Must include the following entries:
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- gpu
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- power-domains: GPUs that make use of power domains can define this property
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instead of vdd-supply. Currently "nvidia,gp10b" makes use of this.
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Optional properties:
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- iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details.
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@ -68,3 +72,22 @@ Example for GM20B:
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iommus = <&mc TEGRA_SWGROUP_GPU>;
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status = "disabled";
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};
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Example for GP10B:
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gpu@17000000 {
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compatible = "nvidia,gp10b";
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reg = <0x0 0x17000000 0x0 0x1000000>,
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<0x0 0x18000000 0x0 0x1000000>;
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interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "stall", "nonstall";
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clocks = <&bpmp TEGRA186_CLK_GPCCLK>,
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<&bpmp TEGRA186_CLK_GPU>;
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clock-names = "gpu", "pwr";
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resets = <&bpmp TEGRA186_RESET_GPU>;
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reset-names = "gpu";
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power-domains = <&bpmp TEGRA186_POWER_DOMAIN_GPU>;
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iommus = <&smmu TEGRA186_SID_GPU>;
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status = "disabled";
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};
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