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Merge branch 'parisc-4.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux into uaccess.parisc

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Al Viro 2017-04-02 10:33:48 -04:00
commit bee3f412d6
1124 changed files with 16598 additions and 8178 deletions
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9
Documentation/admin-guide/kernel-parameters.txt
View File

@ -653,6 +653,9 @@
cpuidle.off=1 [CPU_IDLE] cpuidle.off=1 [CPU_IDLE]
disable the cpuidle sub-system disable the cpuidle sub-system
cpufreq.off=1 [CPU_FREQ]
disable the cpufreq sub-system
cpu_init_udelay=N cpu_init_udelay=N
[X86] Delay for N microsec between assert and de-assert [X86] Delay for N microsec between assert and de-assert
of APIC INIT to start processors. This delay occurs of APIC INIT to start processors. This delay occurs
@ -1183,6 +1186,12 @@
functions that can be changed at run time by the functions that can be changed at run time by the
set_graph_notrace file in the debugfs tracing directory. set_graph_notrace file in the debugfs tracing directory.
ftrace_graph_max_depth=<uint>
[FTRACE] Used with the function graph tracer. This is
the max depth it will trace into a function. This value
can be changed at run time by the max_graph_depth file
in the tracefs tracing directory. default: 0 (no limit)
gamecon.map[2|3]= gamecon.map[2|3]=
[HW,JOY] Multisystem joystick and NES/SNES/PSX pad [HW,JOY] Multisystem joystick and NES/SNES/PSX pad
support via parallel port (up to 5 devices per port) support via parallel port (up to 5 devices per port)

1
Documentation/arm64/silicon-errata.txt
View File

@ -68,3 +68,4 @@ stable kernels.
| | | | | | | | | |
| Qualcomm Tech. | Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 | | Qualcomm Tech. | Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
| Qualcomm Tech. | Falkor v1 | E1009 | QCOM_FALKOR_ERRATUM_1009 | | Qualcomm Tech. | Falkor v1 | E1009 | QCOM_FALKOR_ERRATUM_1009 |
| Qualcomm Tech. | QDF2400 ITS | E0065 | QCOM_QDF2400_ERRATUM_0065 |

11
Documentation/cgroup-v2.txt
View File

@ -1142,16 +1142,17 @@ used by the kernel.
pids.max pids.max
A read-write single value file which exists on non-root cgroups. The A read-write single value file which exists on non-root
default is "max". cgroups. The default is "max".
Hard limit of number of processes. Hard limit of number of processes.
pids.current pids.current
A read-only single value file which exists on all cgroups. A read-only single value file which exists on all cgroups.
The number of processes currently in the cgroup and its descendants. The number of processes currently in the cgroup and its
descendants.
Organisational operations are not blocked by cgroup policies, so it is Organisational operations are not blocked by cgroup policies, so it is
possible to have pids.current > pids.max. This can be done by either possible to have pids.current > pids.max. This can be done by either

2
Documentation/dev-tools/kcov.rst
View File

@ -10,7 +10,7 @@ Note that kcov does not aim to collect as much coverage as possible. It aims
to collect more or less stable coverage that is function of syscall inputs. to collect more or less stable coverage that is function of syscall inputs.
To achieve this goal it does not collect coverage in soft/hard interrupts To achieve this goal it does not collect coverage in soft/hard interrupts
and instrumentation of some inherently non-deterministic parts of kernel is and instrumentation of some inherently non-deterministic parts of kernel is
disbled (e.g. scheduler, locking). disabled (e.g. scheduler, locking).
Usage Usage
----- -----

6
Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt
View File

@ -45,7 +45,7 @@ The following clocks are available:
- 1 15 SATA - 1 15 SATA
- 1 16 SATA USB - 1 16 SATA USB
- 1 17 Main - 1 17 Main
- 1 18 SD/MMC - 1 18 SD/MMC/GOP
- 1 21 Slow IO (SPI, NOR, BootROM, I2C, UART) - 1 21 Slow IO (SPI, NOR, BootROM, I2C, UART)
- 1 22 USB3H0 - 1 22 USB3H0
- 1 23 USB3H1 - 1 23 USB3H1
@ -65,7 +65,7 @@ Required properties:
"cpm-audio", "cpm-communit", "cpm-nand", "cpm-ppv2", "cpm-sdio", "cpm-audio", "cpm-communit", "cpm-nand", "cpm-ppv2", "cpm-sdio",
"cpm-mg-domain", "cpm-mg-core", "cpm-xor1", "cpm-xor0", "cpm-gop-dp", "none", "cpm-mg-domain", "cpm-mg-core", "cpm-xor1", "cpm-xor0", "cpm-gop-dp", "none",
"cpm-pcie_x10", "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor", "cpm-sata", "cpm-pcie_x10", "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor", "cpm-sata",
"cpm-sata-usb", "cpm-main", "cpm-sd-mmc", "none", "none", "cpm-slow-io", "cpm-sata-usb", "cpm-main", "cpm-sd-mmc-gop", "none", "none", "cpm-slow-io",
"cpm-usb3h0", "cpm-usb3h1", "cpm-usb3dev", "cpm-eip150", "cpm-eip197"; "cpm-usb3h0", "cpm-usb3h1", "cpm-usb3dev", "cpm-eip150", "cpm-eip197";
Example: Example:
@ -78,6 +78,6 @@ Example:
gate-clock-output-names = "cpm-audio", "cpm-communit", "cpm-nand", "cpm-ppv2", "cpm-sdio", gate-clock-output-names = "cpm-audio", "cpm-communit", "cpm-nand", "cpm-ppv2", "cpm-sdio",
"cpm-mg-domain", "cpm-mg-core", "cpm-xor1", "cpm-xor0", "cpm-gop-dp", "none", "cpm-mg-domain", "cpm-mg-core", "cpm-xor1", "cpm-xor0", "cpm-gop-dp", "none",
"cpm-pcie_x10", "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor", "cpm-sata", "cpm-pcie_x10", "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor", "cpm-sata",
"cpm-sata-usb", "cpm-main", "cpm-sd-mmc", "none", "none", "cpm-slow-io", "cpm-sata-usb", "cpm-main", "cpm-sd-mmc-gop", "none", "none", "cpm-slow-io",
"cpm-usb3h0", "cpm-usb3h1", "cpm-usb3dev", "cpm-eip150", "cpm-eip197"; "cpm-usb3h0", "cpm-usb3h1", "cpm-usb3dev", "cpm-eip150", "cpm-eip197";
}; };

1
Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt
View File

@ -4,7 +4,6 @@ Required properties:
- compatible: value should be one of the following - compatible: value should be one of the following
"samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */ "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */
"samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */ "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
"samsung,exynos4415-mipi-dsi" /* for Exynos4415 SoC */
"samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */ "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */
"samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */ "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */
"samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */ "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */

1
Documentation/devicetree/bindings/display/exynos/samsung-fimd.txt
View File

@ -11,7 +11,6 @@ Required properties:
"samsung,s5pv210-fimd"; /* for S5PV210 SoC */ "samsung,s5pv210-fimd"; /* for S5PV210 SoC */
"samsung,exynos3250-fimd"; /* for Exynos3250/3472 SoCs */ "samsung,exynos3250-fimd"; /* for Exynos3250/3472 SoCs */
"samsung,exynos4210-fimd"; /* for Exynos4 SoCs */ "samsung,exynos4210-fimd"; /* for Exynos4 SoCs */
"samsung,exynos4415-fimd"; /* for Exynos4415 SoC */
"samsung,exynos5250-fimd"; /* for Exynos5250 SoCs */ "samsung,exynos5250-fimd"; /* for Exynos5250 SoCs */
"samsung,exynos5420-fimd"; /* for Exynos5420/5422/5800 SoCs */ "samsung,exynos5420-fimd"; /* for Exynos5420/5422/5800 SoCs */

2
Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
View File

@ -13,7 +13,7 @@ Required Properties:
- "rockchip,rk2928-dw-mshc": for Rockchip RK2928 and following, - "rockchip,rk2928-dw-mshc": for Rockchip RK2928 and following,
before RK3288 before RK3288
- "rockchip,rk3288-dw-mshc": for Rockchip RK3288 - "rockchip,rk3288-dw-mshc": for Rockchip RK3288
- "rockchip,rk1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK1108 - "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RV1108
- "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036 - "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036
- "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3368 - "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3368
- "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3399 - "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3399

39
Documentation/devicetree/bindings/phy/brcm,nsp-usb3-phy.txt
View File

@ -1,39 +0,0 @@
Broadcom USB3 phy binding for northstar plus SoC
The USB3 phy is internal to the SoC and is accessed using mdio interface.
Required mdio bus properties:
- reg: Should be 0x0 for SoC internal USB3 phy
- #address-cells: must be 1
- #size-cells: must be 0
Required USB3 PHY properties:
- compatible: should be "brcm,nsp-usb3-phy"
- reg: USB3 Phy address on SoC internal MDIO bus and it should be 0x10.
- usb3-ctrl-syscon: handler of syscon node defining physical address
of usb3 control register.
- #phy-cells: must be 0
Required usb3 control properties:
- compatible: should be "brcm,nsp-usb3-ctrl"
- reg: offset and length of the control registers
Example:
mdio@0 {
reg = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
usb3_phy: usb-phy@10 {
compatible = "brcm,nsp-usb3-phy";
reg = <0x10>;
usb3-ctrl-syscon = <&usb3_ctrl>;
#phy-cells = <0>;
status = "disabled";
};
};
usb3_ctrl: syscon@104408 {
compatible = "brcm,nsp-usb3-ctrl", "syscon";
reg = <0x104408 0x3fc>;
};

62
Documentation/devicetree/bindings/powerpc/4xx/emac.txt
View File

@ -71,6 +71,9 @@
For Axon it can be absent, though my current driver For Axon it can be absent, though my current driver
doesn't handle phy-address yet so for now, keep doesn't handle phy-address yet so for now, keep
0x00ffffff in it. 0x00ffffff in it.
- phy-handle : Used to describe configurations where a external PHY
is used. Please refer to:
Documentation/devicetree/bindings/net/ethernet.txt
- rx-fifo-size-gige : 1 cell, Rx fifo size in bytes for 1000 Mb/sec - rx-fifo-size-gige : 1 cell, Rx fifo size in bytes for 1000 Mb/sec
operations (if absent the value is the same as operations (if absent the value is the same as
rx-fifo-size). For Axon, either absent or 2048. rx-fifo-size). For Axon, either absent or 2048.
@ -81,8 +84,22 @@
offload, phandle of the TAH device node. offload, phandle of the TAH device node.
- tah-channel : 1 cell, optional. If appropriate, channel used on the - tah-channel : 1 cell, optional. If appropriate, channel used on the
TAH engine. TAH engine.
- fixed-link : Fixed-link subnode describing a link to a non-MDIO
managed entity. See
Documentation/devicetree/bindings/net/fixed-link.txt
for details.
- mdio subnode : When the EMAC has a phy connected to its local
mdio, which us supported by the kernel's network
PHY library in drivers/net/phy, there must be device
tree subnode with the following required properties:
- #address-cells: Must be <1>.
- #size-cells: Must be <0>.
Example: For PHY definitions: Please refer to
Documentation/devicetree/bindings/net/phy.txt and
Documentation/devicetree/bindings/net/ethernet.txt
Examples:
EMAC0: ethernet@40000800 { EMAC0: ethernet@40000800 {
device_type = "network"; device_type = "network";
@ -104,6 +121,48 @@
zmii-channel = <0>; zmii-channel = <0>;
}; };
EMAC1: ethernet@ef600c00 {
device_type = "network";
compatible = "ibm,emac-apm821xx", "ibm,emac4sync";
interrupt-parent = <&EMAC1>;
interrupts = <0 1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = <0 &UIC2 0x10 IRQ_TYPE_LEVEL_HIGH /* Status */
1 &UIC2 0x14 IRQ_TYPE_LEVEL_HIGH /* Wake */>;
reg = <0xef600c00 0x000000c4>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <9000>;
rx-fifo-size = <16384>;
tx-fifo-size = <2048>;
fifo-entry-size = <10>;
phy-mode = "rgmii";
phy-handle = <&phy0>;
phy-map = <0x00000000>;
rgmii-device = <&RGMII0>;
rgmii-channel = <0>;
tah-device = <&TAH0>;
tah-channel = <0>;
has-inverted-stacr-oc;
has-new-stacr-staopc;
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
};
};
ii) McMAL node ii) McMAL node
Required properties: Required properties:
@ -145,4 +204,3 @@
- revision : as provided by the RGMII new version register if - revision : as provided by the RGMII new version register if
available. available.
For Axon: 0x0000012a For Axon: 0x0000012a

2
Documentation/devicetree/bindings/regulator/ti-abb-regulator.txt
View File

@ -45,7 +45,7 @@ Required Properties:
Optional Properties: Optional Properties:
- reg-names: In addition to the required properties, the following are optional - reg-names: In addition to the required properties, the following are optional
- "efuse-address" - Contains efuse base address used to pick up ABB info. - "efuse-address" - Contains efuse base address used to pick up ABB info.
- "ldo-address" - Contains address of ABB LDO overide register address. - "ldo-address" - Contains address of ABB LDO override register.
"efuse-address" is required for this. "efuse-address" is required for this.
- ti,ldovbb-vset-mask - Required if ldo-address is set, mask for LDO override - ti,ldovbb-vset-mask - Required if ldo-address is set, mask for LDO override
register to provide override vset value. register to provide override vset value.

53
Documentation/devicetree/bindings/usb/usb251xb.txt
View File

@ -7,18 +7,18 @@ Required properties :
- compatible : Should be "microchip,usb251xb" or one of the specific types: - compatible : Should be "microchip,usb251xb" or one of the specific types:
"microchip,usb2512b", "microchip,usb2512bi", "microchip,usb2513b", "microchip,usb2512b", "microchip,usb2512bi", "microchip,usb2513b",
"microchip,usb2513bi", "microchip,usb2514b", "microchip,usb2514bi" "microchip,usb2513bi", "microchip,usb2514b", "microchip,usb2514bi"
- hub-reset-gpios : Should specify the gpio for hub reset - reset-gpios : Should specify the gpio for hub reset
- reg : I2C address on the selected bus (default is <0x2C>)
Optional properties : Optional properties :
- reg : I2C address on the selected bus (default is <0x2C>)
- skip-config : Skip Hub configuration, but only send the USB-Attach command - skip-config : Skip Hub configuration, but only send the USB-Attach command
- vendor-id : USB Vendor ID of the hub (16 bit, default is 0x0424) - vendor-id : Set USB Vendor ID of the hub (16 bit, default is 0x0424)
- product-id : USB Product ID of the hub (16 bit, default depends on type) - product-id : Set USB Product ID of the hub (16 bit, default depends on type)
- device-id : USB Device ID of the hub (16 bit, default is 0x0bb3) - device-id : Set USB Device ID of the hub (16 bit, default is 0x0bb3)
- language-id : USB Language ID (16 bit, default is 0x0000) - language-id : Set USB Language ID (16 bit, default is 0x0000)
- manufacturer : USB Manufacturer string (max 31 characters long) - manufacturer : Set USB Manufacturer string (max 31 characters long)
- product : USB Product string (max 31 characters long) - product : Set USB Product string (max 31 characters long)
- serial : USB Serial string (max 31 characters long) - serial : Set USB Serial string (max 31 characters long)
- {bus,self}-powered : selects between self- and bus-powered operation (default - {bus,self}-powered : selects between self- and bus-powered operation (default
is self-powered) is self-powered)
- disable-hi-speed : disable USB Hi-Speed support - disable-hi-speed : disable USB Hi-Speed support
@ -31,8 +31,10 @@ Optional properties :
(default is individual) (default is individual)
- dynamic-power-switching : enable auto-switching from self- to bus-powered - dynamic-power-switching : enable auto-switching from self- to bus-powered
operation if the local power source is removed or unavailable operation if the local power source is removed or unavailable
- oc-delay-{100us,4ms,8ms,16ms} : set over current timer delay (default is 8ms) - oc-delay-us : Delay time (in microseconds) for filtering the over-current
- compound-device : indicated the hub is part of a compound device sense inputs. Valid values are 100, 4000, 8000 (default) and 16000. If
an invalid value is given, the default is used instead.
- compound-device : indicate the hub is part of a compound device
- port-mapping-mode : enable port mapping mode - port-mapping-mode : enable port mapping mode
- string-support : enable string descriptor support (required for manufacturer, - string-support : enable string descriptor support (required for manufacturer,
product and serial string configuration) product and serial string configuration)
@ -40,34 +42,15 @@ Optional properties :
device connected. device connected.
- sp-disabled-ports : Specifies the ports which will be self-power disabled - sp-disabled-ports : Specifies the ports which will be self-power disabled
- bp-disabled-ports : Specifies the ports which will be bus-power disabled - bp-disabled-ports : Specifies the ports which will be bus-power disabled
- max-sp-power : Specifies the maximum current the hub consumes from an - power-on-time-ms : Specifies the time it takes from the time the host
upstream port when operating as self-powered hub including the power initiates the power-on sequence to a port until the port has adequate
consumption of a permanently attached peripheral if the hub is power. The value is given in ms in a 0 - 510 range (default is 100ms).
configured as a compound device. The value is given in mA in a 0 - 500
range (default is 2).
- max-bp-power : Specifies the maximum current the hub consumes from an
upstream port when operating as bus-powered hub including the power
consumption of a permanently attached peripheral if the hub is
configured as a compound device. The value is given in mA in a 0 - 500
range (default is 100).
- max-sp-current : Specifies the maximum current the hub consumes from an
upstream port when operating as self-powered hub EXCLUDING the power
consumption of a permanently attached peripheral if the hub is
configured as a compound device. The value is given in mA in a 0 - 500
range (default is 2).
- max-bp-current : Specifies the maximum current the hub consumes from an
upstream port when operating as bus-powered hub EXCLUDING the power
consumption of a permanently attached peripheral if the hub is
configured as a compound device. The value is given in mA in a 0 - 500
range (default is 100).
- power-on-time : Specifies the time it takes from the time the host initiates
the power-on sequence to a port until the port has adequate power. The
value is given in ms in a 0 - 510 range (default is 100ms).
Examples: Examples:
usb2512b@2c { usb2512b@2c {
compatible = "microchip,usb2512b"; compatible = "microchip,usb2512b";
hub-reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; reg = <0x2c>;
reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
}; };
usb2514b@2c { usb2514b@2c {

5
Documentation/extcon/intel-int3496.txt
View File

@ -20,3 +20,8 @@ Index 1: The output gpio for enabling Vbus output from the device to the otg
Index 2: The output gpio for muxing of the data pins between the USB host and Index 2: The output gpio for muxing of the data pins between the USB host and
the USB peripheral controller, write 1 to mux to the peripheral the USB peripheral controller, write 1 to mux to the peripheral
controller controller
There is a mapping between indices and GPIO connection IDs as follows
id index 0
vbus index 1
mux index 2

4
Documentation/gcc-plugins.txt
View File

@ -18,8 +18,8 @@ because gcc versions 4.5 and 4.6 are compiled by a C compiler,
gcc-4.7 can be compiled by a C or a C++ compiler, gcc-4.7 can be compiled by a C or a C++ compiler,
and versions 4.8+ can only be compiled by a C++ compiler. and versions 4.8+ can only be compiled by a C++ compiler.
Currently the GCC plugin infrastructure supports only the x86, arm and arm64 Currently the GCC plugin infrastructure supports only the x86, arm, arm64 and
architectures. powerpc architectures.
This infrastructure was ported from grsecurity [6] and PaX [7]. This infrastructure was ported from grsecurity [6] and PaX [7].

3
Documentation/networking/ip-sysctl.txt
View File

@ -1006,7 +1006,8 @@ accept_redirects - BOOLEAN
FALSE (router) FALSE (router)
forwarding - BOOLEAN forwarding - BOOLEAN
Enable IP forwarding on this interface. Enable IP forwarding on this interface. This controls whether packets
received _on_ this interface can be forwarded.
mc_forwarding - BOOLEAN mc_forwarding - BOOLEAN
Do multicast routing. The kernel needs to be compiled with CONFIG_MROUTE Do multicast routing. The kernel needs to be compiled with CONFIG_MROUTE

2
Documentation/trace/kprobetrace.txt
View File

@ -12,7 +12,7 @@ kprobes can probe (this means, all functions body except for __kprobes
functions). Unlike the Tracepoint based event, this can be added and removed functions). Unlike the Tracepoint based event, this can be added and removed
dynamically, on the fly. dynamically, on the fly.
To enable this feature, build your kernel with CONFIG_KPROBE_EVENT=y. To enable this feature, build your kernel with CONFIG_KPROBE_EVENTS=y.
Similar to the events tracer, this doesn't need to be activated via Similar to the events tracer, this doesn't need to be activated via
current_tracer. Instead of that, add probe points via current_tracer. Instead of that, add probe points via

2
Documentation/trace/uprobetracer.txt
View File

@ -7,7 +7,7 @@
Overview Overview
-------- --------
Uprobe based trace events are similar to kprobe based trace events. Uprobe based trace events are similar to kprobe based trace events.
To enable this feature, build your kernel with CONFIG_UPROBE_EVENT=y. To enable this feature, build your kernel with CONFIG_UPROBE_EVENTS=y.
Similar to the kprobe-event tracer, this doesn't need to be activated via Similar to the kprobe-event tracer, this doesn't need to be activated via
current_tracer. Instead of that, add probe points via current_tracer. Instead of that, add probe points via

67
Documentation/virtual/kvm/api.txt
View File

@ -951,6 +951,10 @@ This ioctl allows the user to create or modify a guest physical memory
slot. When changing an existing slot, it may be moved in the guest slot. When changing an existing slot, it may be moved in the guest
physical memory space, or its flags may be modified. It may not be physical memory space, or its flags may be modified. It may not be
resized. Slots may not overlap in guest physical address space. resized. Slots may not overlap in guest physical address space.
Bits 0-15 of "slot" specifies the slot id and this value should be
less than the maximum number of user memory slots supported per VM.
The maximum allowed slots can be queried using KVM_CAP_NR_MEMSLOTS,
if this capability is supported by the architecture.
If KVM_CAP_MULTI_ADDRESS_SPACE is available, bits 16-31 of "slot" If KVM_CAP_MULTI_ADDRESS_SPACE is available, bits 16-31 of "slot"
specifies the address space which is being modified. They must be specifies the address space which is being modified. They must be
@ -3373,6 +3377,69 @@ struct kvm_ppc_resize_hpt {
__u32 pad; __u32 pad;
}; };
4.104 KVM_X86_GET_MCE_CAP_SUPPORTED
Capability: KVM_CAP_MCE
Architectures: x86
Type: system ioctl
Parameters: u64 mce_cap (out)
Returns: 0 on success, -1 on error
Returns supported MCE capabilities. The u64 mce_cap parameter
has the same format as the MSR_IA32_MCG_CAP register. Supported
capabilities will have the corresponding bits set.
4.105 KVM_X86_SETUP_MCE
Capability: KVM_CAP_MCE
Architectures: x86
Type: vcpu ioctl
Parameters: u64 mcg_cap (in)
Returns: 0 on success,
-EFAULT if u64 mcg_cap cannot be read,
-EINVAL if the requested number of banks is invalid,
-EINVAL if requested MCE capability is not supported.
Initializes MCE support for use. The u64 mcg_cap parameter
has the same format as the MSR_IA32_MCG_CAP register and
specifies which capabilities should be enabled. The maximum
supported number of error-reporting banks can be retrieved when
checking for KVM_CAP_MCE. The supported capabilities can be
retrieved with KVM_X86_GET_MCE_CAP_SUPPORTED.
4.106 KVM_X86_SET_MCE
Capability: KVM_CAP_MCE
Architectures: x86
Type: vcpu ioctl
Parameters: struct kvm_x86_mce (in)
Returns: 0 on success,
-EFAULT if struct kvm_x86_mce cannot be read,
-EINVAL if the bank number is invalid,
-EINVAL if VAL bit is not set in status field.
Inject a machine check error (MCE) into the guest. The input
parameter is:
struct kvm_x86_mce {
__u64 status;
__u64 addr;
__u64 misc;
__u64 mcg_status;
__u8 bank;
__u8 pad1[7];
__u64 pad2[3];
};
If the MCE being reported is an uncorrected error, KVM will
inject it as an MCE exception into the guest. If the guest
MCG_STATUS register reports that an MCE is in progress, KVM
causes an KVM_EXIT_SHUTDOWN vmexit.
Otherwise, if the MCE is a corrected error, KVM will just
store it in the corresponding bank (provided this bank is
not holding a previously reported uncorrected error).
5. The kvm_run structure 5. The kvm_run structure
------------------------ ------------------------

4
Documentation/vm/userfaultfd.txt
View File

@ -172,10 +172,6 @@ the same read(2) protocol as for the page fault notifications. The
manager has to explicitly enable these events by setting appropriate manager has to explicitly enable these events by setting appropriate
bits in uffdio_api.features passed to UFFDIO_API ioctl: bits in uffdio_api.features passed to UFFDIO_API ioctl:
UFFD_FEATURE_EVENT_EXIT - enable notification about exit() of the
non-cooperative process. When the monitored process exits, the uffd
manager will get UFFD_EVENT_EXIT.
UFFD_FEATURE_EVENT_FORK - enable userfaultfd hooks for fork(). When UFFD_FEATURE_EVENT_FORK - enable userfaultfd hooks for fork(). When
this feature is enabled, the userfaultfd context of the parent process this feature is enabled, the userfaultfd context of the parent process
is duplicated into the newly created process. The manager receives is duplicated into the newly created process. The manager receives

25
MAINTAINERS
View File

@ -3216,7 +3216,6 @@ F: drivers/platform/chrome/
CISCO VIC ETHERNET NIC DRIVER CISCO VIC ETHERNET NIC DRIVER
M: Christian Benvenuti <benve@cisco.com> M: Christian Benvenuti <benve@cisco.com>
M: Sujith Sankar <ssujith@cisco.com>
M: Govindarajulu Varadarajan <_govind@gmx.com> M: Govindarajulu Varadarajan <_govind@gmx.com>
M: Neel Patel <neepatel@cisco.com> M: Neel Patel <neepatel@cisco.com>
S: Supported S: Supported
@ -4776,6 +4775,12 @@ L: linux-edac@vger.kernel.org
S: Maintained S: Maintained
F: drivers/edac/mpc85xx_edac.[ch] F: drivers/edac/mpc85xx_edac.[ch]
EDAC-PND2
M: Tony Luck <tony.luck@intel.com>
L: linux-edac@vger.kernel.org
S: Maintained
F: drivers/edac/pnd2_edac.[ch]
EDAC-PASEMI EDAC-PASEMI
M: Egor Martovetsky <egor@pasemi.com> M: Egor Martovetsky <egor@pasemi.com>
L: linux-edac@vger.kernel.org L: linux-edac@vger.kernel.org
@ -7774,13 +7779,6 @@ F: include/net/mac80211.h
F: net/mac80211/ F: net/mac80211/
F: drivers/net/wireless/mac80211_hwsim.[ch] F: drivers/net/wireless/mac80211_hwsim.[ch]
MACVLAN DRIVER
M: Patrick McHardy <kaber@trash.net>
L: netdev@vger.kernel.org
S: Maintained
F: drivers/net/macvlan.c
F: include/linux/if_macvlan.h
MAILBOX API MAILBOX API
M: Jassi Brar <jassisinghbrar@gmail.com> M: Jassi Brar <jassisinghbrar@gmail.com>
L: linux-kernel@vger.kernel.org L: linux-kernel@vger.kernel.org
@ -7853,6 +7851,8 @@ F: drivers/net/ethernet/marvell/mvneta.*
MARVELL MWIFIEX WIRELESS DRIVER MARVELL MWIFIEX WIRELESS DRIVER
M: Amitkumar Karwar <akarwar@marvell.com> M: Amitkumar Karwar <akarwar@marvell.com>
M: Nishant Sarmukadam <nishants@marvell.com> M: Nishant Sarmukadam <nishants@marvell.com>
M: Ganapathi Bhat <gbhat@marvell.com>
M: Xinming Hu <huxm@marvell.com>
L: linux-wireless@vger.kernel.org L: linux-wireless@vger.kernel.org
S: Maintained S: Maintained
F: drivers/net/wireless/marvell/mwifiex/ F: drivers/net/wireless/marvell/mwifiex/
@ -8307,7 +8307,6 @@ M: Richard Leitner <richard.leitner@skidata.com>
L: linux-usb@vger.kernel.org L: linux-usb@vger.kernel.org
S: Maintained S: Maintained
F: drivers/usb/misc/usb251xb.c F: drivers/usb/misc/usb251xb.c
F: include/linux/platform_data/usb251xb.h
F: Documentation/devicetree/bindings/usb/usb251xb.txt F: Documentation/devicetree/bindings/usb/usb251xb.txt
MICROSOFT SURFACE PRO 3 BUTTON DRIVER MICROSOFT SURFACE PRO 3 BUTTON DRIVER
@ -13384,14 +13383,6 @@ W: https://linuxtv.org
S: Maintained S: Maintained
F: drivers/media/platform/vivid/* F: drivers/media/platform/vivid/*
VLAN (802.1Q)
M: Patrick McHardy <kaber@trash.net>
L: netdev@vger.kernel.org
S: Maintained
F: drivers/net/macvlan.c
F: include/linux/if_*vlan.h
F: net/8021q/
VLYNQ BUS VLYNQ BUS
M: Florian Fainelli <f.fainelli@gmail.com> M: Florian Fainelli <f.fainelli@gmail.com>
L: openwrt-devel@lists.openwrt.org (subscribers-only) L: openwrt-devel@lists.openwrt.org (subscribers-only)

2
Makefile
View File

@ -1,7 +1,7 @@
VERSION = 4 VERSION = 4
PATCHLEVEL = 11 PATCHLEVEL = 11
SUBLEVEL = 0 SUBLEVEL = 0
EXTRAVERSION = -rc1 EXTRAVERSION = -rc4
NAME = Fearless Coyote NAME = Fearless Coyote
# *DOCUMENTATION* # *DOCUMENTATION*

1
arch/arc/include/asm/hugepage.h
View File

@ -11,6 +11,7 @@
#define _ASM_ARC_HUGEPAGE_H #define _ASM_ARC_HUGEPAGE_H
#include <linux/types.h> #include <linux/types.h>
#define __ARCH_USE_5LEVEL_HACK
#include <asm-generic/pgtable-nopmd.h> #include <asm-generic/pgtable-nopmd.h>
static inline pte_t pmd_pte(pmd_t pmd) static inline pte_t pmd_pte(pmd_t pmd)

1
arch/arc/include/asm/pgtable.h
View File

@ -37,6 +37,7 @@
#include <asm/page.h> #include <asm/page.h>
#include <asm/mmu.h> #include <asm/mmu.h>
#define __ARCH_USE_5LEVEL_HACK
#include <asm-generic/pgtable-nopmd.h> #include <asm-generic/pgtable-nopmd.h>
#include <linux/const.h> #include <linux/const.h>

4
arch/arm/boot/dts/am335x-pcm-953.dtsi
View File

@ -63,14 +63,14 @@
label = "home"; label = "home";
linux,code = <KEY_HOME>; linux,code = <KEY_HOME>;
gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>; gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
gpio-key,wakeup; wakeup-source;
}; };
button@1 { button@1 {
label = "menu"; label = "menu";
linux,code = <KEY_MENU>; linux,code = <KEY_MENU>;
gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>; gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
gpio-key,wakeup; wakeup-source;
}; };
}; };

14
arch/arm/boot/dts/am57xx-idk-common.dtsi
View File

@ -315,6 +315,13 @@
/* ID & VBUS GPIOs provided in board dts */ /* ID & VBUS GPIOs provided in board dts */
}; };
}; };
tpic2810: tpic2810@60 {
compatible = "ti,tpic2810";
reg = <0x60>;
gpio-controller;
#gpio-cells = <2>;
};
}; };
&mcspi3 { &mcspi3 {
@ -330,13 +337,6 @@
spi-max-frequency = <1000000>; spi-max-frequency = <1000000>;
spi-cpol; spi-cpol;
}; };
tpic2810: tpic2810@60 {
compatible = "ti,tpic2810";
reg = <0x60>;
gpio-controller;
#gpio-cells = <2>;
};
}; };
&uart3 { &uart3 {

4
arch/arm/boot/dts/bcm5301x.dtsi
View File

@ -66,14 +66,14 @@
timer@20200 { timer@20200 {
compatible = "arm,cortex-a9-global-timer"; compatible = "arm,cortex-a9-global-timer";
reg = <0x20200 0x100>; reg = <0x20200 0x100>;
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
clocks = <&periph_clk>; clocks = <&periph_clk>;
}; };
local-timer@20600 { local-timer@20600 {
compatible = "arm,cortex-a9-twd-timer"; compatible = "arm,cortex-a9-twd-timer";
reg = <0x20600 0x100>; reg = <0x20600 0x100>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
clocks = <&periph_clk>; clocks = <&periph_clk>;
}; };

5
arch/arm/boot/dts/bcm953012k.dts
View File

@ -48,15 +48,14 @@
}; };
memory { memory {
reg = <0x00000000 0x10000000>; reg = <0x80000000 0x10000000>;
}; };
}; };
&uart0 { &uart0 {
clock-frequency = <62499840>; status = "okay";
}; };
&uart1 { &uart1 {
clock-frequency = <62499840>;
status = "okay"; status = "okay";
}; };

1
arch/arm/boot/dts/bcm958522er.dts
View File

@ -55,6 +55,7 @@
gpio-restart { gpio-restart {
compatible = "gpio-restart"; compatible = "gpio-restart";
gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
open-source;
priority = <200>; priority = <200>;
}; };
}; };

1
arch/arm/boot/dts/bcm958525er.dts
View File

@ -55,6 +55,7 @@
gpio-restart { gpio-restart {
compatible = "gpio-restart"; compatible = "gpio-restart";
gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
open-source;
priority = <200>; priority = <200>;
}; };
}; };

1
arch/arm/boot/dts/bcm958525xmc.dts
View File

@ -55,6 +55,7 @@
gpio-restart { gpio-restart {
compatible = "gpio-restart"; compatible = "gpio-restart";
gpios = <&gpioa 31 GPIO_ACTIVE_LOW>; gpios = <&gpioa 31 GPIO_ACTIVE_LOW>;
open-source;
priority = <200>; priority = <200>;
}; };
}; };

1
arch/arm/boot/dts/bcm958622hr.dts
View File

@ -55,6 +55,7 @@
gpio-restart { gpio-restart {
compatible = "gpio-restart"; compatible = "gpio-restart";
gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
open-source;
priority = <200>; priority = <200>;
}; };
}; };

1
arch/arm/boot/dts/bcm958623hr.dts
View File

@ -55,6 +55,7 @@
gpio-restart { gpio-restart {
compatible = "gpio-restart"; compatible = "gpio-restart";
gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
open-source;
priority = <200>; priority = <200>;
}; };
}; };

1
arch/arm/boot/dts/bcm958625hr.dts
View File

@ -55,6 +55,7 @@
gpio-restart { gpio-restart {
compatible = "gpio-restart"; compatible = "gpio-restart";
gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
open-source;
priority = <200>; priority = <200>;
}; };
}; };

1
arch/arm/boot/dts/bcm988312hr.dts
View File

@ -55,6 +55,7 @@
gpio-restart { gpio-restart {
compatible = "gpio-restart"; compatible = "gpio-restart";
gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
open-source;
priority = <200>; priority = <200>;
}; };
}; };

5
arch/arm/boot/dts/imx6sx-udoo-neo.dtsi
View File

@ -121,11 +121,6 @@
}; };
}; };
&cpu0 {
arm-supply = <&sw1a_reg>;
soc-supply = <&sw1c_reg>;
};
&fec1 { &fec1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>; pinctrl-0 = <&pinctrl_enet1>;

2
arch/arm/boot/dts/sama5d2.dtsi
View File

@ -266,7 +266,7 @@
}; };
usb1: ohci@00400000 { usb1: ohci@00400000 {
compatible = "atmel,sama5d2-ohci", "usb-ohci"; compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00400000 0x100000>; reg = <0x00400000 0x100000>;
interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>; interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;

19
arch/arm/boot/dts/ste-dbx5x0.dtsi
View File

@ -14,6 +14,7 @@
#include <dt-bindings/mfd/dbx500-prcmu.h> #include <dt-bindings/mfd/dbx500-prcmu.h>
#include <dt-bindings/arm/ux500_pm_domains.h> #include <dt-bindings/arm/ux500_pm_domains.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/ste-ab8500.h>
#include "skeleton.dtsi" #include "skeleton.dtsi"
/ { / {
@ -603,6 +604,11 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
ab8500_clock: clock-controller {
compatible = "stericsson,ab8500-clk";
#clock-cells = <1>;
};
ab8500_gpio: ab8500-gpio { ab8500_gpio: ab8500-gpio {
compatible = "stericsson,ab8500-gpio"; compatible = "stericsson,ab8500-gpio";
gpio-controller; gpio-controller;
@ -686,6 +692,8 @@
ab8500-pwm { ab8500-pwm {
compatible = "stericsson,ab8500-pwm"; compatible = "stericsson,ab8500-pwm";
clocks = <&ab8500_clock AB8500_SYSCLK_INT>;
clock-names = "intclk";
}; };
ab8500-debugfs { ab8500-debugfs {
@ -700,6 +708,9 @@
V-AMIC2-supply = <&ab8500_ldo_anamic2_reg>; V-AMIC2-supply = <&ab8500_ldo_anamic2_reg>;
V-DMIC-supply = <&ab8500_ldo_dmic_reg>; V-DMIC-supply = <&ab8500_ldo_dmic_reg>;
clocks = <&ab8500_clock AB8500_SYSCLK_AUDIO>;
clock-names = "audioclk";
stericsson,earpeice-cmv = <950>; /* Units in mV. */ stericsson,earpeice-cmv = <950>; /* Units in mV. */
}; };
@ -1095,6 +1106,14 @@
status = "disabled"; status = "disabled";
}; };
sound {
compatible = "stericsson,snd-soc-mop500";
stericsson,cpu-dai = <&msp1 &msp3>;
stericsson,audio-codec = <&codec>;
clocks = <&prcmu_clk PRCMU_SYSCLK>, <&ab8500_clock AB8500_SYSCLK_ULP>, <&ab8500_clock AB8500_SYSCLK_INT>;
clock-names = "sysclk", "ulpclk", "intclk";
};
msp0: msp@80123000 { msp0: msp@80123000 {
compatible = "stericsson,ux500-msp-i2s"; compatible = "stericsson,ux500-msp-i2s";
reg = <0x80123000 0x1000>; reg = <0x80123000 0x1000>;

9
arch/arm/boot/dts/ste-href.dtsi
View File

@ -186,15 +186,6 @@
status = "okay"; status = "okay";
}; };
sound {
compatible = "stericsson,snd-soc-mop500";
stericsson,cpu-dai = <&msp1 &msp3>;
stericsson,audio-codec = <&codec>;
clocks = <&prcmu_clk PRCMU_SYSCLK>;
clock-names = "sysclk";
};
msp0: msp@80123000 { msp0: msp@80123000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&msp0_default_mode>; pinctrl-0 = <&msp0_default_mode>;

9
arch/arm/boot/dts/ste-snowball.dts
View File

@ -159,15 +159,6 @@
"", "", "", "", "", "", "", ""; "", "", "", "", "", "", "", "";
}; };
sound {
compatible = "stericsson,snd-soc-mop500";
stericsson,cpu-dai = <&msp1 &msp3>;
stericsson,audio-codec = <&codec>;
clocks = <&prcmu_clk PRCMU_SYSCLK>;
clock-names = "sysclk";
};
msp0: msp@80123000 { msp0: msp@80123000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&msp0_default_mode>; pinctrl-0 = <&msp0_default_mode>;

2
arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
View File

@ -167,7 +167,7 @@
reg = <8>; reg = <8>;
label = "cpu"; label = "cpu";
ethernet = <&gmac>; ethernet = <&gmac>;
phy-mode = "rgmii"; phy-mode = "rgmii-txid";
fixed-link { fixed-link {
speed = <1000>; speed = <1000>;
full-duplex; full-duplex;

2
arch/arm/boot/dts/sun8i-a23-a33.dtsi
View File

@ -495,7 +495,7 @@
resets = <&ccu RST_BUS_GPU>; resets = <&ccu RST_BUS_GPU>;
assigned-clocks = <&ccu CLK_GPU>; assigned-clocks = <&ccu CLK_GPU>;
assigned-clock-rates = <408000000>; assigned-clock-rates = <384000000>;
}; };
gic: interrupt-controller@01c81000 { gic: interrupt-controller@01c81000 {

7
arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
View File

@ -50,8 +50,6 @@
backlight: backlight { backlight: backlight {
compatible = "pwm-backlight"; compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&bl_en_pin>;
pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
default-brightness-level = <8>; default-brightness-level = <8>;
@ -93,11 +91,6 @@
}; };
&pio { &pio {
bl_en_pin: bl_en_pin@0 {
pins = "PH6";
function = "gpio_in";
};
mmc0_cd_pin: mmc0_cd_pin@0 { mmc0_cd_pin: mmc0_cd_pin@0 {
pins = "PB4"; pins = "PB4";
function = "gpio_in"; function = "gpio_in";

1
arch/arm/configs/omap2plus_defconfig
View File

@ -188,6 +188,7 @@ CONFIG_WL12XX=m
CONFIG_WL18XX=m CONFIG_WL18XX=m
CONFIG_WLCORE_SPI=m CONFIG_WLCORE_SPI=m
CONFIG_WLCORE_SDIO=m CONFIG_WLCORE_SDIO=m
CONFIG_INPUT_MOUSEDEV=m
CONFIG_INPUT_JOYDEV=m CONFIG_INPUT_JOYDEV=m
CONFIG_INPUT_EVDEV=m CONFIG_INPUT_EVDEV=m
CONFIG_KEYBOARD_ATKBD=m CONFIG_KEYBOARD_ATKBD=m

1
arch/arm/include/asm/kvm_arm.h
View File

@ -209,6 +209,7 @@
#define HSR_EC_IABT_HYP (0x21) #define HSR_EC_IABT_HYP (0x21)
#define HSR_EC_DABT (0x24) #define HSR_EC_DABT (0x24)
#define HSR_EC_DABT_HYP (0x25) #define HSR_EC_DABT_HYP (0x25)
#define HSR_EC_MAX (0x3f)
#define HSR_WFI_IS_WFE (_AC(1, UL) << 0) #define HSR_WFI_IS_WFE (_AC(1, UL) << 0)

1
arch/arm/include/asm/kvm_host.h
View File

@ -30,7 +30,6 @@
#define __KVM_HAVE_ARCH_INTC_INITIALIZED #define __KVM_HAVE_ARCH_INTC_INITIALIZED
#define KVM_USER_MEM_SLOTS 32 #define KVM_USER_MEM_SLOTS 32
#define KVM_PRIVATE_MEM_SLOTS 4
#define KVM_COALESCED_MMIO_PAGE_OFFSET 1 #define KVM_COALESCED_MMIO_PAGE_OFFSET 1
#define KVM_HAVE_ONE_REG #define KVM_HAVE_ONE_REG
#define KVM_HALT_POLL_NS_DEFAULT 500000 #define KVM_HALT_POLL_NS_DEFAULT 500000

1
arch/arm/include/asm/pgtable.h
View File

@ -20,6 +20,7 @@
#else #else
#define __ARCH_USE_5LEVEL_HACK
#include <asm-generic/pgtable-nopud.h> #include <asm-generic/pgtable-nopud.h>
#include <asm/memory.h> #include <asm/memory.h>
#include <asm/pgtable-hwdef.h> #include <asm/pgtable-hwdef.h>

3
arch/arm/kvm/arm.c
View File

@ -221,6 +221,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
case KVM_CAP_MAX_VCPUS: case KVM_CAP_MAX_VCPUS:
r = KVM_MAX_VCPUS; r = KVM_MAX_VCPUS;
break; break;
case KVM_CAP_NR_MEMSLOTS:
r = KVM_USER_MEM_SLOTS;
break;
case KVM_CAP_MSI_DEVID: case KVM_CAP_MSI_DEVID:
if (!kvm) if (!kvm)
r = -EINVAL; r = -EINVAL;

19
arch/arm/kvm/handle_exit.c
View File

@ -79,7 +79,19 @@ static int kvm_handle_wfx(struct kvm_vcpu *vcpu, struct kvm_run *run)
return 1; return 1;
} }
static int kvm_handle_unknown_ec(struct kvm_vcpu *vcpu, struct kvm_run *run)
{
u32 hsr = kvm_vcpu_get_hsr(vcpu);
kvm_pr_unimpl("Unknown exception class: hsr: %#08x\n",
hsr);
kvm_inject_undefined(vcpu);
return 1;
}
static exit_handle_fn arm_exit_handlers[] = { static exit_handle_fn arm_exit_handlers[] = {
[0 ... HSR_EC_MAX] = kvm_handle_unknown_ec,
[HSR_EC_WFI] = kvm_handle_wfx, [HSR_EC_WFI] = kvm_handle_wfx,
[HSR_EC_CP15_32] = kvm_handle_cp15_32, [HSR_EC_CP15_32] = kvm_handle_cp15_32,
[HSR_EC_CP15_64] = kvm_handle_cp15_64, [HSR_EC_CP15_64] = kvm_handle_cp15_64,
@ -98,13 +110,6 @@ static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu)
{ {
u8 hsr_ec = kvm_vcpu_trap_get_class(vcpu); u8 hsr_ec = kvm_vcpu_trap_get_class(vcpu);
if (hsr_ec >= ARRAY_SIZE(arm_exit_handlers) ||
!arm_exit_handlers[hsr_ec]) {
kvm_err("Unknown exception class: hsr: %#08x\n",
(unsigned int)kvm_vcpu_get_hsr(vcpu));
BUG();
}
return arm_exit_handlers[hsr_ec]; return arm_exit_handlers[hsr_ec];
} }

18
arch/arm/mach-at91/pm.c
View File

@ -289,6 +289,22 @@ static void at91_ddr_standby(void)
at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
} }
static void sama5d3_ddr_standby(void)
{
u32 lpr0;
u32 saved_lpr0;
saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR);
lpr0 = saved_lpr0 & ~AT91_DDRSDRC_LPCB;
lpr0 |= AT91_DDRSDRC_LPCB_POWER_DOWN;
at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
cpu_do_idle();
at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
}
/* We manage both DDRAM/SDRAM controllers, we need more than one value to /* We manage both DDRAM/SDRAM controllers, we need more than one value to
* remember. * remember.
*/ */
@ -323,7 +339,7 @@ static const struct of_device_id const ramc_ids[] __initconst = {
{ .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby }, { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },
{ .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby }, { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },
{ .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby }, { .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby },
{ .compatible = "atmel,sama5d3-ddramc", .data = at91_ddr_standby }, { .compatible = "atmel,sama5d3-ddramc", .data = sama5d3_ddr_standby },
{ /*sentinel*/ } { /*sentinel*/ }
}; };

3
arch/arm/mach-omap2/Makefile
View File

@ -241,6 +241,3 @@ obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o
onenand-$(CONFIG_MTD_ONENAND_OMAP2) := gpmc-onenand.o onenand-$(CONFIG_MTD_ONENAND_OMAP2) := gpmc-onenand.o
obj-y += $(onenand-m) $(onenand-y) obj-y += $(onenand-m) $(onenand-y)
nand-$(CONFIG_MTD_NAND_OMAP2) := gpmc-nand.o
obj-y += $(nand-m) $(nand-y)

154
arch/arm/mach-omap2/gpmc-nand.c
View File

@ -1,154 +0,0 @@
/*
* gpmc-nand.c
*
* Copyright (C) 2009 Texas Instruments
* Vimal Singh <vimalsingh@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/omap-gpmc.h>
#include <linux/mtd/nand.h>
#include <linux/platform_data/mtd-nand-omap2.h>
#include <asm/mach/flash.h>
#include "soc.h"
/* minimum size for IO mapping */
#define NAND_IO_SIZE 4
static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
{
/* platforms which support all ECC schemes */
if (soc_is_am33xx() || soc_is_am43xx() || cpu_is_omap44xx() ||
soc_is_omap54xx() || soc_is_dra7xx())
return 1;
if (ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW ||
ecc_opt == OMAP_ECC_BCH8_CODE_HW_DETECTION_SW) {
if (cpu_is_omap24xx())
return 0;
else if (cpu_is_omap3630() && (GET_OMAP_REVISION() == 0))
return 0;
else
return 1;
}
/* OMAP3xxx do not have ELM engine, so cannot support ECC schemes
* which require H/W based ECC error detection */
if ((cpu_is_omap34xx() || cpu_is_omap3630()) &&
((ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
(ecc_opt == OMAP_ECC_BCH8_CODE_HW)))
return 0;
/* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */
if (ecc_opt == OMAP_ECC_HAM1_CODE_HW ||
ecc_opt == OMAP_ECC_HAM1_CODE_SW)
return 1;
else
return 0;
}
/* This function will go away once the device-tree convertion is complete */
static void gpmc_set_legacy(struct omap_nand_platform_data *gpmc_nand_data,
struct gpmc_settings *s)
{
/* Enable RD PIN Monitoring Reg */
if (gpmc_nand_data->dev_ready) {
s->wait_on_read = true;
s->wait_on_write = true;
}
if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16)
s->device_width = GPMC_DEVWIDTH_16BIT;
else
s->device_width = GPMC_DEVWIDTH_8BIT;
}
int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
struct gpmc_timings *gpmc_t)
{
int err = 0;
struct gpmc_settings s;
struct platform_device *pdev;
struct resource gpmc_nand_res[] = {
{ .flags = IORESOURCE_MEM, },
{ .flags = IORESOURCE_IRQ, },
{ .flags = IORESOURCE_IRQ, },
};
BUG_ON(gpmc_nand_data->cs >= GPMC_CS_NUM);
err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
(unsigned long *)&gpmc_nand_res[0].start);
if (err < 0) {
pr_err("omap2-gpmc: Cannot request GPMC CS %d, error %d\n",
gpmc_nand_data->cs, err);
return err;
}
gpmc_nand_res[0].end = gpmc_nand_res[0].start + NAND_IO_SIZE - 1;
gpmc_nand_res[1].start = gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE);
gpmc_nand_res[2].start = gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT);
memset(&s, 0, sizeof(struct gpmc_settings));
gpmc_set_legacy(gpmc_nand_data, &s);
s.device_nand = true;
if (gpmc_t) {
err = gpmc_cs_set_timings(gpmc_nand_data->cs, gpmc_t, &s);
if (err < 0) {
pr_err("omap2-gpmc: Unable to set gpmc timings: %d\n",
err);
return err;
}
}
err = gpmc_cs_program_settings(gpmc_nand_data->cs, &s);
if (err < 0)
goto out_free_cs;
err = gpmc_configure(GPMC_CONFIG_WP, 0);
if (err < 0)
goto out_free_cs;
if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt)) {
pr_err("omap2-nand: Unsupported NAND ECC scheme selected\n");
err = -EINVAL;
goto out_free_cs;
}
pdev = platform_device_alloc("omap2-nand", gpmc_nand_data->cs);
if (pdev) {
err = platform_device_add_resources(pdev, gpmc_nand_res,
ARRAY_SIZE(gpmc_nand_res));
if (!err)
pdev->dev.platform_data = gpmc_nand_data;
} else {
err = -ENOMEM;
}
if (err)
goto out_free_pdev;
err = platform_device_add(pdev);
if (err) {
dev_err(&pdev->dev, "Unable to register NAND device\n");
goto out_free_pdev;
}
return 0;
out_free_pdev:
platform_device_put(pdev);
out_free_cs:
gpmc_cs_free(gpmc_nand_data->cs);
return err;
}

10
arch/arm/mach-omap2/gpmc-onenand.c
View File

@ -367,7 +367,7 @@ static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr)
return ret; return ret;
} }
void gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data) int gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
{ {
int err; int err;
struct device *dev = &gpmc_onenand_device.dev; struct device *dev = &gpmc_onenand_device.dev;
@ -393,15 +393,17 @@ void gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
if (err < 0) { if (err < 0) {
dev_err(dev, "Cannot request GPMC CS %d, error %d\n", dev_err(dev, "Cannot request GPMC CS %d, error %d\n",
gpmc_onenand_data->cs, err); gpmc_onenand_data->cs, err);
return; return err;
} }
gpmc_onenand_resource.end = gpmc_onenand_resource.start + gpmc_onenand_resource.end = gpmc_onenand_resource.start +
ONENAND_IO_SIZE - 1; ONENAND_IO_SIZE - 1;
if (platform_device_register(&gpmc_onenand_device) < 0) { err = platform_device_register(&gpmc_onenand_device);
if (err) {
dev_err(dev, "Unable to register OneNAND device\n"); dev_err(dev, "Unable to register OneNAND device\n");
gpmc_cs_free(gpmc_onenand_data->cs); gpmc_cs_free(gpmc_onenand_data->cs);
return;
} }
return err;
} }

3
arch/arm/mach-omap2/omap-headsmp.S
View File

@ -17,6 +17,7 @@
#include <linux/linkage.h> #include <linux/linkage.h>
#include <linux/init.h> #include <linux/init.h>
#include <asm/assembler.h>
#include "omap44xx.h" #include "omap44xx.h"
@ -66,7 +67,7 @@ wait_2: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
cmp r0, r4 cmp r0, r4
bne wait_2 bne wait_2
ldr r12, =API_HYP_ENTRY ldr r12, =API_HYP_ENTRY
adr r0, hyp_boot badr r0, hyp_boot
smc #0 smc #0
hyp_boot: hyp_boot:
b omap_secondary_startup b omap_secondary_startup

45
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
View File

@ -2112,11 +2112,20 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = {
}; };
/* L4 CORE -> SR1 interface */ /* L4 CORE -> SR1 interface */
static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = {
{
.pa_start = OMAP34XX_SR1_BASE,
.pa_end = OMAP34XX_SR1_BASE + SZ_1K - 1,
.flags = ADDR_TYPE_RT,
},
{ },
};
static struct omap_hwmod_ocp_if omap34xx_l4_core__sr1 = { static struct omap_hwmod_ocp_if omap34xx_l4_core__sr1 = {
.master = &omap3xxx_l4_core_hwmod, .master = &omap3xxx_l4_core_hwmod,
.slave = &omap34xx_sr1_hwmod, .slave = &omap34xx_sr1_hwmod,
.clk = "sr_l4_ick", .clk = "sr_l4_ick",
.addr = omap3_sr1_addr_space,
.user = OCP_USER_MPU, .user = OCP_USER_MPU,
}; };
@ -2124,15 +2133,25 @@ static struct omap_hwmod_ocp_if omap36xx_l4_core__sr1 = {
.master = &omap3xxx_l4_core_hwmod, .master = &omap3xxx_l4_core_hwmod,
.slave = &omap36xx_sr1_hwmod, .slave = &omap36xx_sr1_hwmod,
.clk = "sr_l4_ick", .clk = "sr_l4_ick",
.addr = omap3_sr1_addr_space,
.user = OCP_USER_MPU, .user = OCP_USER_MPU,
}; };
/* L4 CORE -> SR1 interface */ /* L4 CORE -> SR1 interface */
static struct omap_hwmod_addr_space omap3_sr2_addr_space[] = {
{
.pa_start = OMAP34XX_SR2_BASE,
.pa_end = OMAP34XX_SR2_BASE + SZ_1K - 1,
.flags = ADDR_TYPE_RT,
},
{ },
};
static struct omap_hwmod_ocp_if omap34xx_l4_core__sr2 = { static struct omap_hwmod_ocp_if omap34xx_l4_core__sr2 = {
.master = &omap3xxx_l4_core_hwmod, .master = &omap3xxx_l4_core_hwmod,
.slave = &omap34xx_sr2_hwmod, .slave = &omap34xx_sr2_hwmod,
.clk = "sr_l4_ick", .clk = "sr_l4_ick",
.addr = omap3_sr2_addr_space,
.user = OCP_USER_MPU, .user = OCP_USER_MPU,
}; };
@ -2140,6 +2159,7 @@ static struct omap_hwmod_ocp_if omap36xx_l4_core__sr2 = {
.master = &omap3xxx_l4_core_hwmod, .master = &omap3xxx_l4_core_hwmod,
.slave = &omap36xx_sr2_hwmod, .slave = &omap36xx_sr2_hwmod,
.clk = "sr_l4_ick", .clk = "sr_l4_ick",
.addr = omap3_sr2_addr_space,
.user = OCP_USER_MPU, .user = OCP_USER_MPU,
}; };
@ -3111,16 +3131,20 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_hwmod_ocp_ifs[] __initdata = {
* Return: 0 if device named @dev_name is not likely to be accessible, * Return: 0 if device named @dev_name is not likely to be accessible,
* or 1 if it is likely to be accessible. * or 1 if it is likely to be accessible.
*/ */
static int __init omap3xxx_hwmod_is_hs_ip_block_usable(struct device_node *bus, static bool __init omap3xxx_hwmod_is_hs_ip_block_usable(struct device_node *bus,
const char *dev_name) const char *dev_name)
{ {
struct device_node *node;
bool available;
if (!bus) if (!bus)
return (omap_type() == OMAP2_DEVICE_TYPE_GP) ? 1 : 0; return omap_type() == OMAP2_DEVICE_TYPE_GP;
if (of_device_is_available(of_find_node_by_name(bus, dev_name))) node = of_get_child_by_name(bus, dev_name);
return 1; available = of_device_is_available(node);
of_node_put(node);
return 0; return available;
} }
int __init omap3xxx_hwmod_init(void) int __init omap3xxx_hwmod_init(void)
@ -3189,15 +3213,20 @@ int __init omap3xxx_hwmod_init(void)
if (h_sham && omap3xxx_hwmod_is_hs_ip_block_usable(bus, "sham")) { if (h_sham && omap3xxx_hwmod_is_hs_ip_block_usable(bus, "sham")) {
r = omap_hwmod_register_links(h_sham); r = omap_hwmod_register_links(h_sham);
if (r < 0) if (r < 0) {
of_node_put(bus);
return r; return r;
}
} }
if (h_aes && omap3xxx_hwmod_is_hs_ip_block_usable(bus, "aes")) { if (h_aes && omap3xxx_hwmod_is_hs_ip_block_usable(bus, "aes")) {
r = omap_hwmod_register_links(h_aes); r = omap_hwmod_register_links(h_aes);
if (r < 0) if (r < 0) {
of_node_put(bus);
return r; return r;
}
} }
of_node_put(bus);
/* /*
* Register hwmod links specific to certain ES levels of a * Register hwmod links specific to certain ES levels of a

1
arch/arm/tools/syscall.tbl
View File

@ -411,3 +411,4 @@
394 common pkey_mprotect sys_pkey_mprotect 394 common pkey_mprotect sys_pkey_mprotect
395 common pkey_alloc sys_pkey_alloc 395 common pkey_alloc sys_pkey_alloc
396 common pkey_free sys_pkey_free 396 common pkey_free sys_pkey_free
397 common statx sys_statx

2
arch/arm/xen/mm.c
View File

@ -198,6 +198,8 @@ static const struct dma_map_ops xen_swiotlb_dma_ops = {
.unmap_page = xen_swiotlb_unmap_page, .unmap_page = xen_swiotlb_unmap_page,
.dma_supported = xen_swiotlb_dma_supported, .dma_supported = xen_swiotlb_dma_supported,
.set_dma_mask = xen_swiotlb_set_dma_mask, .set_dma_mask = xen_swiotlb_set_dma_mask,
.mmap = xen_swiotlb_dma_mmap,
.get_sgtable = xen_swiotlb_get_sgtable,
}; };
int __init xen_mm_init(void) int __init xen_mm_init(void)

14
arch/arm64/Kconfig
View File

@ -508,6 +508,16 @@ config QCOM_FALKOR_ERRATUM_1009
If unsure, say Y. If unsure, say Y.
config QCOM_QDF2400_ERRATUM_0065
bool "QDF2400 E0065: Incorrect GITS_TYPER.ITT_Entry_size"
default y
help
On Qualcomm Datacenter Technologies QDF2400 SoC, ITS hardware reports
ITE size incorrectly. The GITS_TYPER.ITT_Entry_size field should have
been indicated as 16Bytes (0xf), not 8Bytes (0x7).
If unsure, say Y.
endmenu endmenu
@ -1063,6 +1073,10 @@ config SYSVIPC_COMPAT
def_bool y def_bool y
depends on COMPAT && SYSVIPC depends on COMPAT && SYSVIPC
config KEYS_COMPAT
def_bool y
depends on COMPAT && KEYS
endmenu endmenu
menu "Power management options" menu "Power management options"

11
arch/arm64/boot/dts/broadcom/ns2.dtsi
View File

@ -114,6 +114,7 @@
pcie0: pcie@20020000 { pcie0: pcie@20020000 {
compatible = "brcm,iproc-pcie"; compatible = "brcm,iproc-pcie";
reg = <0 0x20020000 0 0x1000>; reg = <0 0x20020000 0 0x1000>;
dma-coherent;
#interrupt-cells = <1>; #interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 0>;
@ -144,6 +145,7 @@
pcie4: pcie@50020000 { pcie4: pcie@50020000 {
compatible = "brcm,iproc-pcie"; compatible = "brcm,iproc-pcie";
reg = <0 0x50020000 0 0x1000>; reg = <0 0x50020000 0 0x1000>;
dma-coherent;
#interrupt-cells = <1>; #interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 0>;
@ -174,6 +176,7 @@
pcie8: pcie@60c00000 { pcie8: pcie@60c00000 {
compatible = "brcm,iproc-pcie-paxc"; compatible = "brcm,iproc-pcie-paxc";
reg = <0 0x60c00000 0 0x1000>; reg = <0 0x60c00000 0 0x1000>;
dma-coherent;
linux,pci-domain = <8>; linux,pci-domain = <8>;
bus-range = <0x0 0x1>; bus-range = <0x0 0x1>;
@ -203,6 +206,7 @@
<0x61030000 0x100>; <0x61030000 0x100>;
reg-names = "amac_base", "idm_base", "nicpm_base"; reg-names = "amac_base", "idm_base", "nicpm_base";
interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
dma-coherent;
phy-handle = <&gphy0>; phy-handle = <&gphy0>;
phy-mode = "rgmii"; phy-mode = "rgmii";
status = "disabled"; status = "disabled";
@ -213,6 +217,7 @@
reg = <0x612c0000 0x445>; /* PDC FS0 regs */ reg = <0x612c0000 0x445>; /* PDC FS0 regs */
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <1>; #mbox-cells = <1>;
dma-coherent;
brcm,rx-status-len = <32>; brcm,rx-status-len = <32>;
brcm,use-bcm-hdr; brcm,use-bcm-hdr;
}; };
@ -222,6 +227,7 @@
reg = <0x612e0000 0x445>; /* PDC FS1 regs */ reg = <0x612e0000 0x445>; /* PDC FS1 regs */
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <1>; #mbox-cells = <1>;
dma-coherent;
brcm,rx-status-len = <32>; brcm,rx-status-len = <32>;
brcm,use-bcm-hdr; brcm,use-bcm-hdr;
}; };
@ -231,6 +237,7 @@
reg = <0x61300000 0x445>; /* PDC FS2 regs */ reg = <0x61300000 0x445>; /* PDC FS2 regs */
interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <1>; #mbox-cells = <1>;
dma-coherent;
brcm,rx-status-len = <32>; brcm,rx-status-len = <32>;
brcm,use-bcm-hdr; brcm,use-bcm-hdr;
}; };
@ -240,6 +247,7 @@
reg = <0x61320000 0x445>; /* PDC FS3 regs */ reg = <0x61320000 0x445>; /* PDC FS3 regs */
interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <1>; #mbox-cells = <1>;
dma-coherent;
brcm,rx-status-len = <32>; brcm,rx-status-len = <32>;
brcm,use-bcm-hdr; brcm,use-bcm-hdr;
}; };
@ -644,6 +652,7 @@
sata: ahci@663f2000 { sata: ahci@663f2000 {
compatible = "brcm,iproc-ahci", "generic-ahci"; compatible = "brcm,iproc-ahci", "generic-ahci";
reg = <0x663f2000 0x1000>; reg = <0x663f2000 0x1000>;
dma-coherent;
reg-names = "ahci"; reg-names = "ahci";
interrupts = <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
@ -667,6 +676,7 @@
compatible = "brcm,sdhci-iproc-cygnus"; compatible = "brcm,sdhci-iproc-cygnus";
reg = <0x66420000 0x100>; reg = <0x66420000 0x100>;
interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>;
dma-coherent;
bus-width = <8>; bus-width = <8>;
clocks = <&genpll_sw BCM_NS2_GENPLL_SW_SDIO_CLK>; clocks = <&genpll_sw BCM_NS2_GENPLL_SW_SDIO_CLK>;
status = "disabled"; status = "disabled";
@ -676,6 +686,7 @@
compatible = "brcm,sdhci-iproc-cygnus"; compatible = "brcm,sdhci-iproc-cygnus";
reg = <0x66430000 0x100>; reg = <0x66430000 0x100>;
interrupts = <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
dma-coherent;
bus-width = <8>; bus-width = <8>;
clocks = <&genpll_sw BCM_NS2_GENPLL_SW_SDIO_CLK>; clocks = <&genpll_sw BCM_NS2_GENPLL_SW_SDIO_CLK>;
status = "disabled"; status = "disabled";

2
arch/arm64/include/asm/cpufeature.h
View File

@ -251,7 +251,7 @@ static inline bool system_supports_fpsimd(void)
static inline bool system_uses_ttbr0_pan(void) static inline bool system_uses_ttbr0_pan(void)
{ {
return IS_ENABLED(CONFIG_ARM64_SW_TTBR0_PAN) && return IS_ENABLED(CONFIG_ARM64_SW_TTBR0_PAN) &&
!cpus_have_cap(ARM64_HAS_PAN); !cpus_have_const_cap(ARM64_HAS_PAN);
} }
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */

3
arch/arm64/include/asm/kvm_host.h
View File

@ -30,8 +30,7 @@
#define __KVM_HAVE_ARCH_INTC_INITIALIZED #define __KVM_HAVE_ARCH_INTC_INITIALIZED
#define KVM_USER_MEM_SLOTS 32 #define KVM_USER_MEM_SLOTS 512
#define KVM_PRIVATE_MEM_SLOTS 4
#define KVM_COALESCED_MMIO_PAGE_OFFSET 1 #define KVM_COALESCED_MMIO_PAGE_OFFSET 1
#define KVM_HALT_POLL_NS_DEFAULT 500000 #define KVM_HALT_POLL_NS_DEFAULT 500000

4
arch/arm64/include/asm/pgtable-types.h
View File

@ -55,9 +55,13 @@ typedef struct { pteval_t pgprot; } pgprot_t;
#define __pgprot(x) ((pgprot_t) { (x) } ) #define __pgprot(x) ((pgprot_t) { (x) } )
#if CONFIG_PGTABLE_LEVELS == 2 #if CONFIG_PGTABLE_LEVELS == 2
#define __ARCH_USE_5LEVEL_HACK
#include <asm-generic/pgtable-nopmd.h> #include <asm-generic/pgtable-nopmd.h>
#elif CONFIG_PGTABLE_LEVELS == 3 #elif CONFIG_PGTABLE_LEVELS == 3
#define __ARCH_USE_5LEVEL_HACK
#include <asm-generic/pgtable-nopud.h> #include <asm-generic/pgtable-nopud.h>
#elif CONFIG_PGTABLE_LEVELS == 4
#include <asm-generic/5level-fixup.h>
#endif #endif
#endif /* __ASM_PGTABLE_TYPES_H */ #endif /* __ASM_PGTABLE_TYPES_H */

2
arch/arm64/include/asm/unistd.h
View File

@ -44,7 +44,7 @@
#define __ARM_NR_compat_cacheflush (__ARM_NR_COMPAT_BASE+2) #define __ARM_NR_compat_cacheflush (__ARM_NR_COMPAT_BASE+2)
#define __ARM_NR_compat_set_tls (__ARM_NR_COMPAT_BASE+5) #define __ARM_NR_compat_set_tls (__ARM_NR_COMPAT_BASE+5)
#define __NR_compat_syscalls 394 #define __NR_compat_syscalls 398
#endif #endif
#define __ARCH_WANT_SYS_CLONE #define __ARCH_WANT_SYS_CLONE

8
arch/arm64/include/asm/unistd32.h
View File

@ -809,6 +809,14 @@ __SYSCALL(__NR_copy_file_range, sys_copy_file_range)
__SYSCALL(__NR_preadv2, compat_sys_preadv2) __SYSCALL(__NR_preadv2, compat_sys_preadv2)
#define __NR_pwritev2 393 #define __NR_pwritev2 393
__SYSCALL(__NR_pwritev2, compat_sys_pwritev2) __SYSCALL(__NR_pwritev2, compat_sys_pwritev2)
#define __NR_pkey_mprotect 394
__SYSCALL(__NR_pkey_mprotect, sys_pkey_mprotect)
#define __NR_pkey_alloc 395
__SYSCALL(__NR_pkey_alloc, sys_pkey_alloc)
#define __NR_pkey_free 396
__SYSCALL(__NR_pkey_free, sys_pkey_free)
#define __NR_statx 397
__SYSCALL(__NR_statx, sys_statx)
/* /*
* Please add new compat syscalls above this comment and update * Please add new compat syscalls above this comment and update

2
arch/arm64/kernel/cpuidle.c
View File

@ -30,7 +30,7 @@ int arm_cpuidle_init(unsigned int cpu)
} }
/** /**
* cpu_suspend() - function to enter a low-power idle state * arm_cpuidle_suspend() - function to enter a low-power idle state
* @arg: argument to pass to CPU suspend operations * @arg: argument to pass to CPU suspend operations
* *
* Return: 0 on success, -EOPNOTSUPP if CPU suspend hook not initialized, CPU * Return: 0 on success, -EOPNOTSUPP if CPU suspend hook not initialized, CPU

10
arch/arm64/kernel/kaslr.c
View File

@ -131,11 +131,15 @@ u64 __init kaslr_early_init(u64 dt_phys, u64 modulo_offset)
/* /*
* The kernel Image should not extend across a 1GB/32MB/512MB alignment * The kernel Image should not extend across a 1GB/32MB/512MB alignment
* boundary (for 4KB/16KB/64KB granule kernels, respectively). If this * boundary (for 4KB/16KB/64KB granule kernels, respectively). If this
* happens, increase the KASLR offset by the size of the kernel image. * happens, increase the KASLR offset by the size of the kernel image
* rounded up by SWAPPER_BLOCK_SIZE.
*/ */
if ((((u64)_text + offset + modulo_offset) >> SWAPPER_TABLE_SHIFT) != if ((((u64)_text + offset + modulo_offset) >> SWAPPER_TABLE_SHIFT) !=
(((u64)_end + offset + modulo_offset) >> SWAPPER_TABLE_SHIFT)) (((u64)_end + offset + modulo_offset) >> SWAPPER_TABLE_SHIFT)) {
offset = (offset + (u64)(_end - _text)) & mask; u64 kimg_sz = _end - _text;
offset = (offset + round_up(kimg_sz, SWAPPER_BLOCK_SIZE))
& mask;
}
if (IS_ENABLED(CONFIG_KASAN)) if (IS_ENABLED(CONFIG_KASAN))
/* /*

6
arch/arm64/kernel/probes/kprobes.c
View File

@ -372,12 +372,6 @@ int __kprobes kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr)
return 0; return 0;
} }
int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
unsigned long val, void *data)
{
return NOTIFY_DONE;
}
static void __kprobes kprobe_handler(struct pt_regs *regs) static void __kprobes kprobe_handler(struct pt_regs *regs)
{ {
struct kprobe *p, *cur_kprobe; struct kprobe *p, *cur_kprobe;

19
arch/arm64/kvm/handle_exit.c
View File

@ -135,7 +135,19 @@ static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu, struct kvm_run *run)
return ret; return ret;
} }
static int kvm_handle_unknown_ec(struct kvm_vcpu *vcpu, struct kvm_run *run)
{
u32 hsr = kvm_vcpu_get_hsr(vcpu);
kvm_pr_unimpl("Unknown exception class: hsr: %#08x -- %s\n",
hsr, esr_get_class_string(hsr));
kvm_inject_undefined(vcpu);
return 1;
}
static exit_handle_fn arm_exit_handlers[] = { static exit_handle_fn arm_exit_handlers[] = {
[0 ... ESR_ELx_EC_MAX] = kvm_handle_unknown_ec,
[ESR_ELx_EC_WFx] = kvm_handle_wfx, [ESR_ELx_EC_WFx] = kvm_handle_wfx,
[ESR_ELx_EC_CP15_32] = kvm_handle_cp15_32, [ESR_ELx_EC_CP15_32] = kvm_handle_cp15_32,
[ESR_ELx_EC_CP15_64] = kvm_handle_cp15_64, [ESR_ELx_EC_CP15_64] = kvm_handle_cp15_64,
@ -162,13 +174,6 @@ static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu)
u32 hsr = kvm_vcpu_get_hsr(vcpu); u32 hsr = kvm_vcpu_get_hsr(vcpu);
u8 hsr_ec = ESR_ELx_EC(hsr); u8 hsr_ec = ESR_ELx_EC(hsr);
if (hsr_ec >= ARRAY_SIZE(arm_exit_handlers) ||
!arm_exit_handlers[hsr_ec]) {
kvm_err("Unknown exception class: hsr: %#08x -- %s\n",
hsr, esr_get_class_string(hsr));
BUG();
}
return arm_exit_handlers[hsr_ec]; return arm_exit_handlers[hsr_ec];
} }

64
arch/arm64/kvm/hyp/tlb.c
View File

@ -18,14 +18,62 @@
#include <asm/kvm_hyp.h> #include <asm/kvm_hyp.h>
#include <asm/tlbflush.h> #include <asm/tlbflush.h>
static void __hyp_text __tlb_switch_to_guest_vhe(struct kvm *kvm)
{
u64 val;
/*
* With VHE enabled, we have HCR_EL2.{E2H,TGE} = {1,1}, and
* most TLB operations target EL2/EL0. In order to affect the
* guest TLBs (EL1/EL0), we need to change one of these two
* bits. Changing E2H is impossible (goodbye TTBR1_EL2), so
* let's flip TGE before executing the TLB operation.
*/
write_sysreg(kvm->arch.vttbr, vttbr_el2);
val = read_sysreg(hcr_el2);
val &= ~HCR_TGE;
write_sysreg(val, hcr_el2);
isb();
}
static void __hyp_text __tlb_switch_to_guest_nvhe(struct kvm *kvm)
{
write_sysreg(kvm->arch.vttbr, vttbr_el2);
isb();
}
static hyp_alternate_select(__tlb_switch_to_guest,
__tlb_switch_to_guest_nvhe,
__tlb_switch_to_guest_vhe,
ARM64_HAS_VIRT_HOST_EXTN);
static void __hyp_text __tlb_switch_to_host_vhe(struct kvm *kvm)
{
/*
* We're done with the TLB operation, let's restore the host's
* view of HCR_EL2.
*/
write_sysreg(0, vttbr_el2);
write_sysreg(HCR_HOST_VHE_FLAGS, hcr_el2);
}
static void __hyp_text __tlb_switch_to_host_nvhe(struct kvm *kvm)
{
write_sysreg(0, vttbr_el2);
}
static hyp_alternate_select(__tlb_switch_to_host,
__tlb_switch_to_host_nvhe,
__tlb_switch_to_host_vhe,
ARM64_HAS_VIRT_HOST_EXTN);
void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
{ {
dsb(ishst); dsb(ishst);
/* Switch to requested VMID */ /* Switch to requested VMID */
kvm = kern_hyp_va(kvm); kvm = kern_hyp_va(kvm);
write_sysreg(kvm->arch.vttbr, vttbr_el2); __tlb_switch_to_guest()(kvm);
isb();
/* /*
* We could do so much better if we had the VA as well. * We could do so much better if we had the VA as well.
@ -46,7 +94,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
dsb(ish); dsb(ish);
isb(); isb();
write_sysreg(0, vttbr_el2); __tlb_switch_to_host()(kvm);
} }
void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm) void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm)
@ -55,14 +103,13 @@ void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm)
/* Switch to requested VMID */ /* Switch to requested VMID */
kvm = kern_hyp_va(kvm); kvm = kern_hyp_va(kvm);
write_sysreg(kvm->arch.vttbr, vttbr_el2); __tlb_switch_to_guest()(kvm);
isb();
__tlbi(vmalls12e1is); __tlbi(vmalls12e1is);
dsb(ish); dsb(ish);
isb(); isb();
write_sysreg(0, vttbr_el2); __tlb_switch_to_host()(kvm);
} }
void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu) void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu)
@ -70,14 +117,13 @@ void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu)
struct kvm *kvm = kern_hyp_va(kern_hyp_va(vcpu)->kvm); struct kvm *kvm = kern_hyp_va(kern_hyp_va(vcpu)->kvm);
/* Switch to requested VMID */ /* Switch to requested VMID */
write_sysreg(kvm->arch.vttbr, vttbr_el2); __tlb_switch_to_guest()(kvm);
isb();
__tlbi(vmalle1); __tlbi(vmalle1);
dsb(nsh); dsb(nsh);
isb(); isb();
write_sysreg(0, vttbr_el2); __tlb_switch_to_host()(kvm);
} }
void __hyp_text __kvm_flush_vm_context(void) void __hyp_text __kvm_flush_vm_context(void)

2
arch/arm64/mm/kasan_init.c
View File

@ -162,7 +162,7 @@ void __init kasan_init(void)
clear_pgds(KASAN_SHADOW_START, KASAN_SHADOW_END); clear_pgds(KASAN_SHADOW_START, KASAN_SHADOW_END);
vmemmap_populate(kimg_shadow_start, kimg_shadow_end, vmemmap_populate(kimg_shadow_start, kimg_shadow_end,
pfn_to_nid(virt_to_pfn(_text))); pfn_to_nid(virt_to_pfn(lm_alias(_text))));
/* /*
* vmemmap_populate() has populated the shadow region that covers the * vmemmap_populate() has populated the shadow region that covers the

1
arch/avr32/include/asm/pgtable-2level.h
View File

@ -8,6 +8,7 @@
#ifndef __ASM_AVR32_PGTABLE_2LEVEL_H #ifndef __ASM_AVR32_PGTABLE_2LEVEL_H
#define __ASM_AVR32_PGTABLE_2LEVEL_H #define __ASM_AVR32_PGTABLE_2LEVEL_H
#define __ARCH_USE_5LEVEL_HACK
#include <asm-generic/pgtable-nopmd.h> #include <asm-generic/pgtable-nopmd.h>
/* /*

2
arch/avr32/oprofile/backtrace.c
View File

@ -14,7 +14,7 @@
*/ */
#include <linux/oprofile.h> #include <linux/oprofile.h>
#include <linux/sched.h> #include <linux/ptrace.h>
#include <linux/uaccess.h> #include <linux/uaccess.h>
/* The first two words of each frame on the stack look like this if we have /* The first two words of each frame on the stack look like this if we have

2
arch/cris/arch-v32/drivers/cryptocop.c
View File

@ -2086,7 +2086,7 @@ static void cryptocop_job_queue_close(void)
dma_in_cfg.en = regk_dma_no; dma_in_cfg.en = regk_dma_no;
REG_WR(dma, IN_DMA_INST, rw_cfg, dma_in_cfg); REG_WR(dma, IN_DMA_INST, rw_cfg, dma_in_cfg);
/* Disble the cryptocop. */ /* Disable the cryptocop. */
rw_cfg = REG_RD(strcop, regi_strcop, rw_cfg); rw_cfg = REG_RD(strcop, regi_strcop, rw_cfg);
rw_cfg.en = 0; rw_cfg.en = 0;
REG_WR(strcop, regi_strcop, rw_cfg, rw_cfg); REG_WR(strcop, regi_strcop, rw_cfg, rw_cfg);

1
arch/cris/include/asm/pgtable.h
View File

@ -6,6 +6,7 @@
#define _CRIS_PGTABLE_H #define _CRIS_PGTABLE_H
#include <asm/page.h> #include <asm/page.h>
#define __ARCH_USE_5LEVEL_HACK
#include <asm-generic/pgtable-nopmd.h> #include <asm-generic/pgtable-nopmd.h>
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__

1
arch/frv/include/asm/pgtable.h
View File

@ -16,6 +16,7 @@
#ifndef _ASM_PGTABLE_H #ifndef _ASM_PGTABLE_H
#define _ASM_PGTABLE_H #define _ASM_PGTABLE_H
#include <asm-generic/5level-fixup.h>
#include <asm/mem-layout.h> #include <asm/mem-layout.h>
#include <asm/setup.h> #include <asm/setup.h>
#include <asm/processor.h> #include <asm/processor.h>

1
arch/h8300/include/asm/pgtable.h
View File

@ -1,5 +1,6 @@
#ifndef _H8300_PGTABLE_H #ifndef _H8300_PGTABLE_H
#define _H8300_PGTABLE_H #define _H8300_PGTABLE_H
#define __ARCH_USE_5LEVEL_HACK
#include <asm-generic/pgtable-nopud.h> #include <asm-generic/pgtable-nopud.h>
#include <asm-generic/pgtable.h> #include <asm-generic/pgtable.h>
#define pgtable_cache_init() do { } while (0) #define pgtable_cache_init() do { } while (0)

2
arch/h8300/kernel/ptrace_h.c
View File

@ -9,7 +9,7 @@
*/ */
#include <linux/linkage.h> #include <linux/linkage.h>
#include <linux/sched.h> #include <linux/sched/signal.h>
#include <asm/ptrace.h> #include <asm/ptrace.h>
#define BREAKINST 0x5730 /* trapa #3 */ #define BREAKINST 0x5730 /* trapa #3 */

1
arch/hexagon/include/asm/pgtable.h
View File

@ -26,6 +26,7 @@
*/ */
#include <linux/swap.h> #include <linux/swap.h>
#include <asm/page.h> #include <asm/page.h>
#define __ARCH_USE_5LEVEL_HACK
#include <asm-generic/pgtable-nopmd.h> #include <asm-generic/pgtable-nopmd.h>
/* A handy thing to have if one has the RAM. Declared in head.S */ /* A handy thing to have if one has the RAM. Declared in head.S */

2
arch/ia64/include/asm/pgtable.h
View File

@ -587,8 +587,10 @@ extern struct page *zero_page_memmap_ptr;
#if CONFIG_PGTABLE_LEVELS == 3 #if CONFIG_PGTABLE_LEVELS == 3
#define __ARCH_USE_5LEVEL_HACK
#include <asm-generic/pgtable-nopud.h> #include <asm-generic/pgtable-nopud.h>
#endif #endif
#include <asm-generic/5level-fixup.h>
#include <asm-generic/pgtable.h> #include <asm-generic/pgtable.h>
#endif /* _ASM_IA64_PGTABLE_H */ #endif /* _ASM_IA64_PGTABLE_H */

14
arch/m68k/configs/amiga_defconfig
View File

@ -25,6 +25,7 @@ CONFIG_SUN_PARTITION=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_SYSV68_PARTITION=y CONFIG_SYSV68_PARTITION=y
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68020=y CONFIG_M68020=y
@ -60,6 +61,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -71,6 +73,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -101,6 +104,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -298,6 +302,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -371,6 +377,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -383,6 +390,7 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
CONFIG_A2065=y CONFIG_A2065=y
CONFIG_ARIADNE=y CONFIG_ARIADNE=y
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -404,7 +412,6 @@ CONFIG_ZORRO8390=y
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_SMSC is not set # CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -564,6 +571,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -594,6 +603,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -605,6 +615,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -629,4 +640,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

14
arch/m68k/configs/apollo_defconfig
View File

@ -26,6 +26,7 @@ CONFIG_SUN_PARTITION=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_SYSV68_PARTITION=y CONFIG_SYSV68_PARTITION=y
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68020=y CONFIG_M68020=y
@ -58,6 +59,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -69,6 +71,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -99,6 +102,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -296,6 +300,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -353,6 +359,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -362,6 +369,7 @@ CONFIG_NETCONSOLE_DYNAMIC=y
CONFIG_VETH=m CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -378,7 +386,6 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -523,6 +530,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -553,6 +562,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -564,6 +574,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -588,4 +599,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

14
arch/m68k/configs/atari_defconfig
View File

@ -25,6 +25,7 @@ CONFIG_SUN_PARTITION=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_SYSV68_PARTITION=y CONFIG_SYSV68_PARTITION=y
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68020=y CONFIG_M68020=y
@ -58,6 +59,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -69,6 +71,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -99,6 +102,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -296,6 +300,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -362,6 +368,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -372,6 +379,7 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
CONFIG_ATARILANCE=y CONFIG_ATARILANCE=y
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -389,7 +397,6 @@ CONFIG_NE2000=y
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
CONFIG_SMC91X=y CONFIG_SMC91X=y
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -544,6 +551,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -574,6 +583,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -585,6 +595,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -609,4 +620,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

14
arch/m68k/configs/bvme6000_defconfig
View File

@ -25,6 +25,7 @@ CONFIG_UNIXWARE_DISKLABEL=y
CONFIG_SUN_PARTITION=y CONFIG_SUN_PARTITION=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68040=y CONFIG_M68040=y
@ -56,6 +57,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -67,6 +69,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -97,6 +100,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -294,6 +298,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -352,6 +358,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -361,6 +368,7 @@ CONFIG_NETCONSOLE_DYNAMIC=y
CONFIG_VETH=m CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -377,7 +385,6 @@ CONFIG_BVME6000_NET=y
# CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -515,6 +522,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -545,6 +554,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -556,6 +566,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -580,4 +591,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

14
arch/m68k/configs/hp300_defconfig
View File

@ -26,6 +26,7 @@ CONFIG_SUN_PARTITION=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_SYSV68_PARTITION=y CONFIG_SYSV68_PARTITION=y
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68020=y CONFIG_M68020=y
@ -58,6 +59,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -69,6 +71,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -99,6 +102,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -296,6 +300,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -353,6 +359,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -363,6 +370,7 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
CONFIG_HPLANCE=y CONFIG_HPLANCE=y
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -379,7 +387,6 @@ CONFIG_HPLANCE=y
# CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -525,6 +532,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -555,6 +564,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -566,6 +576,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -590,4 +601,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

14
arch/m68k/configs/mac_defconfig
View File

@ -25,6 +25,7 @@ CONFIG_SUN_PARTITION=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_SYSV68_PARTITION=y CONFIG_SYSV68_PARTITION=y
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68020=y CONFIG_M68020=y
@ -57,6 +58,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -68,6 +70,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -98,6 +101,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -298,6 +302,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -369,6 +375,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -379,6 +386,7 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
CONFIG_MACMACE=y CONFIG_MACMACE=y
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -398,7 +406,6 @@ CONFIG_MAC8390=y
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_SMSC is not set # CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -547,6 +554,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -577,6 +586,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -588,6 +598,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -612,4 +623,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

14
arch/m68k/configs/multi_defconfig
View File

@ -21,6 +21,7 @@ CONFIG_SOLARIS_X86_PARTITION=y
CONFIG_UNIXWARE_DISKLABEL=y CONFIG_UNIXWARE_DISKLABEL=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68020=y CONFIG_M68020=y
@ -67,6 +68,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -78,6 +80,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -108,6 +111,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -308,6 +312,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -402,6 +408,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -419,6 +426,7 @@ CONFIG_HPLANCE=y
CONFIG_MVME147_NET=y CONFIG_MVME147_NET=y
CONFIG_SUN3LANCE=y CONFIG_SUN3LANCE=y
CONFIG_MACMACE=y CONFIG_MACMACE=y
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -444,7 +452,6 @@ CONFIG_ZORRO8390=y
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
CONFIG_SMC91X=y CONFIG_SMC91X=y
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PLIP=m CONFIG_PLIP=m
@ -627,6 +634,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -657,6 +666,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -668,6 +678,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -692,4 +703,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

14
arch/m68k/configs/mvme147_defconfig
View File

@ -25,6 +25,7 @@ CONFIG_UNIXWARE_DISKLABEL=y
CONFIG_SUN_PARTITION=y CONFIG_SUN_PARTITION=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68030=y CONFIG_M68030=y
@ -55,6 +56,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -66,6 +68,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -96,6 +99,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -293,6 +297,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -351,6 +357,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -361,6 +368,7 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
CONFIG_MVME147_NET=y CONFIG_MVME147_NET=y
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -377,7 +385,6 @@ CONFIG_MVME147_NET=y
# CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -515,6 +522,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -545,6 +554,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -556,6 +566,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -580,4 +591,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

14
arch/m68k/configs/mvme16x_defconfig
View File

@ -25,6 +25,7 @@ CONFIG_UNIXWARE_DISKLABEL=y
CONFIG_SUN_PARTITION=y CONFIG_SUN_PARTITION=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68040=y CONFIG_M68040=y
@ -56,6 +57,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -67,6 +69,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -97,6 +100,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -294,6 +298,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -352,6 +358,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -361,6 +368,7 @@ CONFIG_NETCONSOLE_DYNAMIC=y
CONFIG_VETH=m CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -377,7 +385,6 @@ CONFIG_MVME16x_NET=y
# CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -515,6 +522,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -545,6 +554,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -556,6 +566,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -580,4 +591,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

14
arch/m68k/configs/q40_defconfig
View File

@ -26,6 +26,7 @@ CONFIG_SUN_PARTITION=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_SYSV68_PARTITION=y CONFIG_SYSV68_PARTITION=y
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68040=y CONFIG_M68040=y
@ -56,6 +57,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -67,6 +69,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -97,6 +100,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -294,6 +298,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -358,6 +364,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -369,6 +376,7 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
# CONFIG_NET_VENDOR_AMD is not set # CONFIG_NET_VENDOR_AMD is not set
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -388,7 +396,6 @@ CONFIG_NE2000=y
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_SMSC is not set # CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PLIP=m CONFIG_PLIP=m
@ -538,6 +545,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -568,6 +577,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -579,6 +589,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -603,4 +614,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

14
arch/m68k/configs/sun3_defconfig
View File

@ -25,6 +25,7 @@ CONFIG_UNIXWARE_DISKLABEL=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_SYSV68_PARTITION=y CONFIG_SYSV68_PARTITION=y
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_SUN3=y CONFIG_SUN3=y
@ -53,6 +54,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -64,6 +66,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -94,6 +97,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -291,6 +295,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -349,6 +355,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -359,6 +366,7 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
CONFIG_SUN3LANCE=y CONFIG_SUN3LANCE=y
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_EZCHIP is not set # CONFIG_NET_VENDOR_EZCHIP is not set
@ -375,7 +383,6 @@ CONFIG_SUN3_82586=y
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SUN is not set # CONFIG_NET_VENDOR_SUN is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -517,6 +524,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -546,6 +555,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -557,6 +567,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -581,4 +592,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

14
arch/m68k/configs/sun3x_defconfig
View File

@ -25,6 +25,7 @@ CONFIG_UNIXWARE_DISKLABEL=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_SYSV68_PARTITION=y CONFIG_SYSV68_PARTITION=y
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_SUN3X=y CONFIG_SUN3X=y
@ -53,6 +54,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -64,6 +66,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -94,6 +97,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -291,6 +295,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -349,6 +355,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -359,6 +366,7 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
CONFIG_SUN3LANCE=y CONFIG_SUN3LANCE=y
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -375,7 +383,6 @@ CONFIG_SUN3LANCE=y
# CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -517,6 +524,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -547,6 +556,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -558,6 +568,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -582,4 +593,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

2
arch/m68k/include/asm/bitops.h
View File

@ -148,7 +148,7 @@ static inline void bfchg_mem_change_bit(int nr, volatile unsigned long *vaddr)
#define __change_bit(nr, vaddr) change_bit(nr, vaddr) #define __change_bit(nr, vaddr) change_bit(nr, vaddr)
static inline int test_bit(int nr, const unsigned long *vaddr) static inline int test_bit(int nr, const volatile unsigned long *vaddr)
{ {
return (vaddr[nr >> 5] & (1UL << (nr & 31))) != 0; return (vaddr[nr >> 5] & (1UL << (nr & 31))) != 0;
} }

2
arch/m68k/include/asm/unistd.h
View File

@ -4,7 +4,7 @@
#include <uapi/asm/unistd.h> #include <uapi/asm/unistd.h>
#define NR_syscalls 379 #define NR_syscalls 380
#define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_OLD_READDIR
#define __ARCH_WANT_OLD_STAT #define __ARCH_WANT_OLD_STAT

1
arch/m68k/include/uapi/asm/unistd.h
View File

@ -384,5 +384,6 @@
#define __NR_copy_file_range 376 #define __NR_copy_file_range 376
#define __NR_preadv2 377 #define __NR_preadv2 377
#define __NR_pwritev2 378 #define __NR_pwritev2 378
#define __NR_statx 379
#endif /* _UAPI_ASM_M68K_UNISTD_H_ */ #endif /* _UAPI_ASM_M68K_UNISTD_H_ */

1
arch/m68k/kernel/syscalltable.S
View File

@ -399,3 +399,4 @@ ENTRY(sys_call_table)
.long sys_copy_file_range .long sys_copy_file_range
.long sys_preadv2 .long sys_preadv2
.long sys_pwritev2 .long sys_pwritev2
.long sys_statx

1
arch/metag/include/asm/pgtable.h
View File

@ -6,6 +6,7 @@
#define _METAG_PGTABLE_H #define _METAG_PGTABLE_H
#include <asm/pgtable-bits.h> #include <asm/pgtable-bits.h>
#define __ARCH_USE_5LEVEL_HACK
#include <asm-generic/pgtable-nopmd.h> #include <asm-generic/pgtable-nopmd.h>
/* Invalid regions on Meta: 0x00000000-0x001FFFFF and 0xFFFF0000-0xFFFFFFFF */ /* Invalid regions on Meta: 0x00000000-0x001FFFFF and 0xFFFF0000-0xFFFFFFFF */

3
arch/microblaze/include/asm/page.h
View File

@ -95,7 +95,8 @@ typedef struct { unsigned long pgd; } pgd_t;
# else /* CONFIG_MMU */ # else /* CONFIG_MMU */
typedef struct { unsigned long ste[64]; } pmd_t; typedef struct { unsigned long ste[64]; } pmd_t;
typedef struct { pmd_t pue[1]; } pud_t; typedef struct { pmd_t pue[1]; } pud_t;
typedef struct { pud_t pge[1]; } pgd_t; typedef struct { pud_t p4e[1]; } p4d_t;
typedef struct { p4d_t pge[1]; } pgd_t;
# endif /* CONFIG_MMU */ # endif /* CONFIG_MMU */
# define pte_val(x) ((x).pte) # define pte_val(x) ((x).pte)

2
arch/mips/cavium-octeon/cpu.c
View File

@ -10,7 +10,9 @@
#include <linux/irqflags.h> #include <linux/irqflags.h>
#include <linux/notifier.h> #include <linux/notifier.h>
#include <linux/prefetch.h> #include <linux/prefetch.h>
#include <linux/ptrace.h>
#include <linux/sched.h> #include <linux/sched.h>
#include <linux/sched/task_stack.h>
#include <asm/cop2.h> #include <asm/cop2.h>
#include <asm/current.h> #include <asm/current.h>

1
arch/mips/cavium-octeon/crypto/octeon-crypto.c
View File

@ -9,6 +9,7 @@
#include <asm/cop2.h> #include <asm/cop2.h>
#include <linux/export.h> #include <linux/export.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/sched/task_stack.h>
#include "octeon-crypto.h" #include "octeon-crypto.h"

1
arch/mips/cavium-octeon/smp.c
View File

@ -12,6 +12,7 @@
#include <linux/kernel_stat.h> #include <linux/kernel_stat.h>
#include <linux/sched.h> #include <linux/sched.h>
#include <linux/sched/hotplug.h> #include <linux/sched/hotplug.h>
#include <linux/sched/task_stack.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/export.h> #include <linux/export.h>

1
arch/mips/include/asm/fpu.h
View File

@ -12,6 +12,7 @@
#include <linux/sched.h> #include <linux/sched.h>
#include <linux/sched/task_stack.h> #include <linux/sched/task_stack.h>
#include <linux/ptrace.h>
#include <linux/thread_info.h> #include <linux/thread_info.h>
#include <linux/bitops.h> #include <linux/bitops.h>

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