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i40e/i40evf: Remove unused hardware receive descriptor code
The hardware supports a 16 byte descriptor for receive, but the driver was never using it in production. There was no performance benefit to the real driver of 16 byte descriptors, so drop a whole lot of complexity while getting rid of the code. Also since the previous patch made us use no-split mode all the time, drop any support in the driver for any other value in dtype and assume it is always zero (aka no-split). Hooray for code removal! Change-ID: I2257e902e4dad84a07b94db6d2e6f4ce69b27bc0 Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -122,10 +122,7 @@
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#define XSTRINGIFY(bar) STRINGIFY(bar)
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#define I40E_RX_DESC(R, i) \
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((ring_is_16byte_desc_enabled(R)) \
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? (union i40e_32byte_rx_desc *) \
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(&(((union i40e_16byte_rx_desc *)((R)->desc))[i])) \
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: (&(((union i40e_32byte_rx_desc *)((R)->desc))[i])))
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(&(((union i40e_32byte_rx_desc *)((R)->desc))[i]))
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#define I40E_TX_DESC(R, i) \
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(&(((struct i40e_tx_desc *)((R)->desc))[i]))
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#define I40E_TX_CTXTDESC(R, i) \
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@ -327,7 +324,6 @@ struct i40e_pf {
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#ifdef I40E_FCOE
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#define I40E_FLAG_FCOE_ENABLED BIT_ULL(11)
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#endif /* I40E_FCOE */
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#define I40E_FLAG_16BYTE_RX_DESC_ENABLED BIT_ULL(13)
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#define I40E_FLAG_CLEAN_ADMINQ BIT_ULL(14)
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#define I40E_FLAG_FILTER_SYNC BIT_ULL(15)
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#define I40E_FLAG_SERVICE_CLIENT_REQUESTED BIT_ULL(16)
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@ -532,7 +528,6 @@ struct i40e_vsi {
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u16 max_frame;
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u16 rx_buf_len;
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u8 dtype;
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/* List of q_vectors allocated to this VSI */
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struct i40e_q_vector **q_vectors;
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@ -361,7 +361,7 @@ static void i40e_dbg_dump_vsi_seid(struct i40e_pf *pf, int seid)
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vsi->work_limit);
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dev_info(&pf->pdev->dev,
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" max_frame = %d, rx_buf_len = %d dtype = %d\n",
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vsi->max_frame, vsi->rx_buf_len, vsi->dtype);
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vsi->max_frame, vsi->rx_buf_len, 0);
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dev_info(&pf->pdev->dev,
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" num_q_vectors = %i, base_vector = %i\n",
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vsi->num_q_vectors, vsi->base_vector);
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@ -586,13 +586,6 @@ static void i40e_dbg_dump_desc(int cnt, int vsi_seid, int ring_id, int desc_n,
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" d[%03x] = 0x%016llx 0x%016llx\n",
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i, txd->buffer_addr,
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txd->cmd_type_offset_bsz);
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} else if (sizeof(union i40e_rx_desc) ==
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sizeof(union i40e_16byte_rx_desc)) {
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rxd = I40E_RX_DESC(ring, i);
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dev_info(&pf->pdev->dev,
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" d[%03x] = 0x%016llx 0x%016llx\n",
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i, rxd->read.pkt_addr,
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rxd->read.hdr_addr);
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} else {
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rxd = I40E_RX_DESC(ring, i);
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dev_info(&pf->pdev->dev,
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@ -614,13 +607,6 @@ static void i40e_dbg_dump_desc(int cnt, int vsi_seid, int ring_id, int desc_n,
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"vsi = %02i tx ring = %02i d[%03x] = 0x%016llx 0x%016llx\n",
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vsi_seid, ring_id, desc_n,
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txd->buffer_addr, txd->cmd_type_offset_bsz);
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} else if (sizeof(union i40e_rx_desc) ==
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sizeof(union i40e_16byte_rx_desc)) {
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rxd = I40E_RX_DESC(ring, desc_n);
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dev_info(&pf->pdev->dev,
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"vsi = %02i rx ring = %02i d[%03x] = 0x%016llx 0x%016llx\n",
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vsi_seid, ring_id, desc_n,
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rxd->read.pkt_addr, rxd->read.hdr_addr);
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} else {
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rxd = I40E_RX_DESC(ring, desc_n);
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dev_info(&pf->pdev->dev,
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@ -2861,14 +2861,12 @@ static int i40e_configure_rx_ring(struct i40e_ring *ring)
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rx_ctx.base = (ring->dma / 128);
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rx_ctx.qlen = ring->count;
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if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
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set_ring_16byte_desc_enabled(ring);
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rx_ctx.dsize = 0;
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} else {
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rx_ctx.dsize = 1;
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}
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/* use 32 byte descriptors */
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rx_ctx.dsize = 1;
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rx_ctx.dtype = vsi->dtype;
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/* descriptor type is always zero
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* rx_ctx.dtype = 0;
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*/
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rx_ctx.hsplit_0 = 0;
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rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
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@ -2948,7 +2946,6 @@ static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
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vsi->max_frame = I40E_RXBUFFER_2048;
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vsi->rx_buf_len = I40E_RXBUFFER_2048;
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vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
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#ifdef I40E_FCOE
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/* setup rx buffer for FCoE */
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@ -2956,7 +2953,6 @@ static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
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(vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
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vsi->rx_buf_len = I40E_RXBUFFER_3072;
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vsi->max_frame = I40E_RXBUFFER_3072;
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vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
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}
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#endif /* I40E_FCOE */
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@ -7476,10 +7472,6 @@ static int i40e_alloc_rings(struct i40e_vsi *vsi)
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rx_ring->count = vsi->num_desc;
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rx_ring->size = 0;
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rx_ring->dcb_tc = 0;
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if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
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set_ring_16byte_desc_enabled(rx_ring);
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else
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clear_ring_16byte_desc_enabled(rx_ring);
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rx_ring->rx_itr_setting = pf->rx_itr_default;
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vsi->rx_rings[i] = rx_ring;
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}
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@ -260,15 +260,18 @@ struct i40e_rx_queue_stats {
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enum i40e_ring_state_t {
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__I40E_TX_FDIR_INIT_DONE,
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__I40E_TX_XPS_INIT_DONE,
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__I40E_RX_16BYTE_DESC_ENABLED,
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};
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#define ring_is_16byte_desc_enabled(ring) \
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test_bit(__I40E_RX_16BYTE_DESC_ENABLED, &(ring)->state)
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#define set_ring_16byte_desc_enabled(ring) \
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set_bit(__I40E_RX_16BYTE_DESC_ENABLED, &(ring)->state)
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#define clear_ring_16byte_desc_enabled(ring) \
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clear_bit(__I40E_RX_16BYTE_DESC_ENABLED, &(ring)->state)
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/* some useful defines for virtchannel interface, which
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* is the only remaining user of header split
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*/
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#define I40E_RX_DTYPE_NO_SPLIT 0
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#define I40E_RX_DTYPE_HEADER_SPLIT 1
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#define I40E_RX_DTYPE_SPLIT_ALWAYS 2
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#define I40E_RX_SPLIT_L2 0x1
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#define I40E_RX_SPLIT_IP 0x2
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#define I40E_RX_SPLIT_TCP_UDP 0x4
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#define I40E_RX_SPLIT_SCTP 0x8
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/* struct that defines a descriptor ring, associated with a VSI */
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struct i40e_ring {
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@ -296,13 +299,6 @@ struct i40e_ring {
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u16 count; /* Number of descriptors */
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u16 reg_idx; /* HW register index of the ring */
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u16 rx_buf_len;
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#define I40E_RX_DTYPE_NO_SPLIT 0
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#define I40E_RX_DTYPE_HEADER_SPLIT 1
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#define I40E_RX_DTYPE_SPLIT_ALWAYS 2
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#define I40E_RX_SPLIT_L2 0x1
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#define I40E_RX_SPLIT_IP 0x2
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#define I40E_RX_SPLIT_TCP_UDP 0x4
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#define I40E_RX_SPLIT_SCTP 0x8
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/* used in interrupt processing */
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u16 next_to_use;
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@ -259,15 +259,18 @@ struct i40e_rx_queue_stats {
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enum i40e_ring_state_t {
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__I40E_TX_FDIR_INIT_DONE,
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__I40E_TX_XPS_INIT_DONE,
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__I40E_RX_16BYTE_DESC_ENABLED,
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};
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#define ring_is_16byte_desc_enabled(ring) \
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test_bit(__I40E_RX_16BYTE_DESC_ENABLED, &(ring)->state)
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#define set_ring_16byte_desc_enabled(ring) \
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set_bit(__I40E_RX_16BYTE_DESC_ENABLED, &(ring)->state)
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#define clear_ring_16byte_desc_enabled(ring) \
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clear_bit(__I40E_RX_16BYTE_DESC_ENABLED, &(ring)->state)
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/* some useful defines for virtchannel interface, which
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* is the only remaining user of header split
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*/
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#define I40E_RX_DTYPE_NO_SPLIT 0
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#define I40E_RX_DTYPE_HEADER_SPLIT 1
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#define I40E_RX_DTYPE_SPLIT_ALWAYS 2
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#define I40E_RX_SPLIT_L2 0x1
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#define I40E_RX_SPLIT_IP 0x2
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#define I40E_RX_SPLIT_TCP_UDP 0x4
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#define I40E_RX_SPLIT_SCTP 0x8
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/* struct that defines a descriptor ring, associated with a VSI */
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struct i40e_ring {
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@ -287,13 +290,6 @@ struct i40e_ring {
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u16 count; /* Number of descriptors */
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u16 reg_idx; /* HW register index of the ring */
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u16 rx_buf_len;
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#define I40E_RX_DTYPE_NO_SPLIT 0
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#define I40E_RX_DTYPE_HEADER_SPLIT 1
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#define I40E_RX_DTYPE_SPLIT_ALWAYS 2
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#define I40E_RX_SPLIT_L2 0x1
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#define I40E_RX_SPLIT_IP 0x2
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#define I40E_RX_SPLIT_TCP_UDP 0x4
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#define I40E_RX_SPLIT_SCTP 0x8
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/* used in interrupt processing */
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u16 next_to_use;
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