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net/mlx5e: Fix ethtool RX hash func configuration change
We should modify TIRs explicitly to apply the new RSS configuration.
The light ndo close/open calls do not "refresh" them.
Fixes: 2d75b2bc8a
('net/mlx5e: Add ethtool RSS configuration options')
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
0ad9b20415
commit
bdfc028de1
@ -447,6 +447,8 @@ enum mlx5e_traffic_types {
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MLX5E_NUM_TT,
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};
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#define IS_HASHING_TT(tt) (tt != MLX5E_TT_ANY)
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enum mlx5e_rqt_ix {
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MLX5E_INDIRECTION_RQT,
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MLX5E_SINGLE_RQ_RQT,
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@ -613,6 +615,7 @@ void mlx5e_enable_vlan_filter(struct mlx5e_priv *priv);
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void mlx5e_disable_vlan_filter(struct mlx5e_priv *priv);
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int mlx5e_redirect_rqt(struct mlx5e_priv *priv, enum mlx5e_rqt_ix rqt_ix);
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void mlx5e_build_tir_ctx_hash(void *tirc, struct mlx5e_priv *priv);
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int mlx5e_open_locked(struct net_device *netdev);
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int mlx5e_close_locked(struct net_device *netdev);
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@ -703,18 +703,36 @@ static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
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return 0;
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}
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static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
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{
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struct mlx5_core_dev *mdev = priv->mdev;
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void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
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int i;
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MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
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mlx5e_build_tir_ctx_hash(tirc, priv);
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for (i = 0; i < MLX5E_NUM_TT; i++)
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if (IS_HASHING_TT(i))
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mlx5_core_modify_tir(mdev, priv->tirn[i], in, inlen);
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}
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static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
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const u8 *key, const u8 hfunc)
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{
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struct mlx5e_priv *priv = netdev_priv(dev);
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bool close_open;
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int err = 0;
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int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
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void *in;
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if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
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(hfunc != ETH_RSS_HASH_XOR) &&
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(hfunc != ETH_RSS_HASH_TOP))
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return -EINVAL;
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in = mlx5_vzalloc(inlen);
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if (!in)
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return -ENOMEM;
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mutex_lock(&priv->state_lock);
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if (indir) {
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@ -723,11 +741,6 @@ static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
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mlx5e_redirect_rqt(priv, MLX5E_INDIRECTION_RQT);
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}
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close_open = (key || (hfunc != ETH_RSS_HASH_NO_CHANGE)) &&
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test_bit(MLX5E_STATE_OPENED, &priv->state);
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if (close_open)
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mlx5e_close_locked(dev);
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if (key)
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memcpy(priv->params.toeplitz_hash_key, key,
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sizeof(priv->params.toeplitz_hash_key));
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@ -735,12 +748,13 @@ static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
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if (hfunc != ETH_RSS_HASH_NO_CHANGE)
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priv->params.rss_hfunc = hfunc;
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if (close_open)
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err = mlx5e_open_locked(priv->netdev);
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mlx5e_modify_tirs_hash(priv, in, inlen);
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mutex_unlock(&priv->state_lock);
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return err;
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kvfree(in);
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return 0;
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}
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static int mlx5e_get_rxnfc(struct net_device *netdev,
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@ -1317,6 +1317,21 @@ static void mlx5e_build_tir_ctx_lro(void *tirc, struct mlx5e_priv *priv)
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lro_timer_supported_periods[2]));
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}
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void mlx5e_build_tir_ctx_hash(void *tirc, struct mlx5e_priv *priv)
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{
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MLX5_SET(tirc, tirc, rx_hash_fn,
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mlx5e_rx_hash_fn(priv->params.rss_hfunc));
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if (priv->params.rss_hfunc == ETH_RSS_HASH_TOP) {
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void *rss_key = MLX5_ADDR_OF(tirc, tirc,
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rx_hash_toeplitz_key);
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size_t len = MLX5_FLD_SZ_BYTES(tirc,
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rx_hash_toeplitz_key);
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MLX5_SET(tirc, tirc, rx_hash_symmetric, 1);
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memcpy(rss_key, priv->params.toeplitz_hash_key, len);
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}
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}
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static int mlx5e_modify_tirs_lro(struct mlx5e_priv *priv)
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{
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struct mlx5_core_dev *mdev = priv->mdev;
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@ -1677,17 +1692,7 @@ static void mlx5e_build_tir_ctx(struct mlx5e_priv *priv, u32 *tirc, int tt)
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default:
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MLX5_SET(tirc, tirc, indirect_table,
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priv->rqtn[MLX5E_INDIRECTION_RQT]);
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MLX5_SET(tirc, tirc, rx_hash_fn,
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mlx5e_rx_hash_fn(priv->params.rss_hfunc));
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if (priv->params.rss_hfunc == ETH_RSS_HASH_TOP) {
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void *rss_key = MLX5_ADDR_OF(tirc, tirc,
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rx_hash_toeplitz_key);
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size_t len = MLX5_FLD_SZ_BYTES(tirc,
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rx_hash_toeplitz_key);
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MLX5_SET(tirc, tirc, rx_hash_symmetric, 1);
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memcpy(rss_key, priv->params.toeplitz_hash_key, len);
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}
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mlx5e_build_tir_ctx_hash(tirc, priv);
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break;
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}
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@ -4245,7 +4245,9 @@ struct mlx5_ifc_modify_tir_bitmask_bits {
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u8 reserved_at_20[0x1b];
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u8 self_lb_en[0x1];
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u8 reserved_at_3c[0x3];
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u8 reserved_at_3c[0x1];
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u8 hash[0x1];
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u8 reserved_at_3e[0x1];
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u8 lro[0x1];
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};
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