mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-22 20:23:57 +08:00
ASoC: rt5645: Sort the order for register bit defines
So we have consistent order for register bit defines. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
be77b38a36
commit
bc86e53a0a
@ -619,14 +619,14 @@
|
|||||||
#define RT5645_G_OM_L_SM_L_SFT 6
|
#define RT5645_G_OM_L_SM_L_SFT 6
|
||||||
#define RT5645_M_BST1_L_SM_L (0x1 << 5)
|
#define RT5645_M_BST1_L_SM_L (0x1 << 5)
|
||||||
#define RT5645_M_BST1_L_SM_L_SFT 5
|
#define RT5645_M_BST1_L_SM_L_SFT 5
|
||||||
#define RT5645_M_IN_L_SM_L (0x1 << 3)
|
|
||||||
#define RT5645_M_IN_L_SM_L_SFT 3
|
|
||||||
#define RT5645_M_DAC_L1_SM_L (0x1 << 1)
|
|
||||||
#define RT5645_M_DAC_L1_SM_L_SFT 1
|
|
||||||
#define RT5645_M_DAC_L2_SM_L (0x1 << 2)
|
|
||||||
#define RT5645_M_DAC_L2_SM_L_SFT 2
|
|
||||||
#define RT5645_M_BST3_L_SM_L (0x1 << 4)
|
#define RT5645_M_BST3_L_SM_L (0x1 << 4)
|
||||||
#define RT5645_M_BST3_L_SM_L_SFT 4
|
#define RT5645_M_BST3_L_SM_L_SFT 4
|
||||||
|
#define RT5645_M_IN_L_SM_L (0x1 << 3)
|
||||||
|
#define RT5645_M_IN_L_SM_L_SFT 3
|
||||||
|
#define RT5645_M_DAC_L2_SM_L (0x1 << 2)
|
||||||
|
#define RT5645_M_DAC_L2_SM_L_SFT 2
|
||||||
|
#define RT5645_M_DAC_L1_SM_L (0x1 << 1)
|
||||||
|
#define RT5645_M_DAC_L1_SM_L_SFT 1
|
||||||
|
|
||||||
/* SPK Right Mixer Control (0x47) */
|
/* SPK Right Mixer Control (0x47) */
|
||||||
#define RT5645_G_RM_R_SM_R_MASK (0x3 << 14)
|
#define RT5645_G_RM_R_SM_R_MASK (0x3 << 14)
|
||||||
@ -641,14 +641,14 @@
|
|||||||
#define RT5645_G_OM_R_SM_R_SFT 6
|
#define RT5645_G_OM_R_SM_R_SFT 6
|
||||||
#define RT5645_M_BST2_R_SM_R (0x1 << 5)
|
#define RT5645_M_BST2_R_SM_R (0x1 << 5)
|
||||||
#define RT5645_M_BST2_R_SM_R_SFT 5
|
#define RT5645_M_BST2_R_SM_R_SFT 5
|
||||||
#define RT5645_M_IN_R_SM_R (0x1 << 3)
|
|
||||||
#define RT5645_M_IN_R_SM_R_SFT 3
|
|
||||||
#define RT5645_M_DAC_R1_SM_R (0x1 << 1)
|
|
||||||
#define RT5645_M_DAC_R1_SM_R_SFT 1
|
|
||||||
#define RT5645_M_DAC_R2_SM_R (0x1 << 2)
|
|
||||||
#define RT5645_M_DAC_R2_SM_R_SFT 2
|
|
||||||
#define RT5645_M_BST3_R_SM_R (0x1 << 4)
|
#define RT5645_M_BST3_R_SM_R (0x1 << 4)
|
||||||
#define RT5645_M_BST3_R_SM_R_SFT 4
|
#define RT5645_M_BST3_R_SM_R_SFT 4
|
||||||
|
#define RT5645_M_IN_R_SM_R (0x1 << 3)
|
||||||
|
#define RT5645_M_IN_R_SM_R_SFT 3
|
||||||
|
#define RT5645_M_DAC_R2_SM_R (0x1 << 2)
|
||||||
|
#define RT5645_M_DAC_R2_SM_R_SFT 2
|
||||||
|
#define RT5645_M_DAC_R1_SM_R (0x1 << 1)
|
||||||
|
#define RT5645_M_DAC_R1_SM_R_SFT 1
|
||||||
|
|
||||||
/* SPOLMIX Control (0x48) */
|
/* SPOLMIX Control (0x48) */
|
||||||
#define RT5645_M_DAC_L1_SPM_L (0x1 << 15)
|
#define RT5645_M_DAC_L1_SPM_L (0x1 << 15)
|
||||||
@ -673,12 +673,12 @@
|
|||||||
#define RT5645_SPK_G_CLSD_SFT 0
|
#define RT5645_SPK_G_CLSD_SFT 0
|
||||||
|
|
||||||
/* Mono Output Mixer Control (0x4c) */
|
/* Mono Output Mixer Control (0x4c) */
|
||||||
|
#define RT5645_G_MONOMIX_MASK (0x1 << 10)
|
||||||
|
#define RT5645_G_MONOMIX_SFT 10
|
||||||
#define RT5645_M_OV_L_MM (0x1 << 9)
|
#define RT5645_M_OV_L_MM (0x1 << 9)
|
||||||
#define RT5645_M_OV_L_MM_SFT 9
|
#define RT5645_M_OV_L_MM_SFT 9
|
||||||
#define RT5645_M_DAC_L2_MA (0x1 << 8)
|
#define RT5645_M_DAC_L2_MA (0x1 << 8)
|
||||||
#define RT5645_M_DAC_L2_MA_SFT 8
|
#define RT5645_M_DAC_L2_MA_SFT 8
|
||||||
#define RT5645_G_MONOMIX_MASK (0x1 << 10)
|
|
||||||
#define RT5645_G_MONOMIX_SFT 10
|
|
||||||
#define RT5645_M_BST2_MM (0x1 << 4)
|
#define RT5645_M_BST2_MM (0x1 << 4)
|
||||||
#define RT5645_M_BST2_MM_SFT 4
|
#define RT5645_M_BST2_MM_SFT 4
|
||||||
#define RT5645_M_DAC_R1_MM (0x1 << 3)
|
#define RT5645_M_DAC_R1_MM (0x1 << 3)
|
||||||
|
Loading…
Reference in New Issue
Block a user