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iommu/vt-d: Fold dmar_insert_one_dev_info() into its caller
Fold dmar_insert_one_dev_info() into domain_add_dev_info() which is its only caller. No intentional functional impact. Suggested-by: Christoph Hellwig <hch@infradead.org> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Link: https://lore.kernel.org/r/20220416120423.879552-1-baolu.lu@linux.intel.com Link: https://lore.kernel.org/r/20220510023407.2759143-4-baolu.lu@linux.intel.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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@ -2452,64 +2452,6 @@ static bool dev_is_real_dma_subdevice(struct device *dev)
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pci_real_dma_dev(to_pci_dev(dev)) != to_pci_dev(dev);
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}
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static int dmar_insert_one_dev_info(struct intel_iommu *iommu, int bus,
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int devfn, struct device *dev,
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struct dmar_domain *domain)
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{
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struct device_domain_info *info = dev_iommu_priv_get(dev);
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unsigned long flags;
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int ret;
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spin_lock_irqsave(&device_domain_lock, flags);
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info->domain = domain;
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spin_lock(&iommu->lock);
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ret = domain_attach_iommu(domain, iommu);
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spin_unlock(&iommu->lock);
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if (ret) {
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spin_unlock_irqrestore(&device_domain_lock, flags);
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return ret;
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}
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list_add(&info->link, &domain->devices);
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spin_unlock_irqrestore(&device_domain_lock, flags);
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/* PASID table is mandatory for a PCI device in scalable mode. */
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if (sm_supported(iommu) && !dev_is_real_dma_subdevice(dev)) {
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ret = intel_pasid_alloc_table(dev);
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if (ret) {
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dev_err(dev, "PASID table allocation failed\n");
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dmar_remove_one_dev_info(dev);
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return ret;
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}
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/* Setup the PASID entry for requests without PASID: */
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spin_lock_irqsave(&iommu->lock, flags);
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if (hw_pass_through && domain_type_is_si(domain))
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ret = intel_pasid_setup_pass_through(iommu, domain,
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dev, PASID_RID2PASID);
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else if (domain_use_first_level(domain))
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ret = domain_setup_first_level(iommu, domain, dev,
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PASID_RID2PASID);
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else
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ret = intel_pasid_setup_second_level(iommu, domain,
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dev, PASID_RID2PASID);
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spin_unlock_irqrestore(&iommu->lock, flags);
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if (ret) {
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dev_err(dev, "Setup RID2PASID failed\n");
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dmar_remove_one_dev_info(dev);
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return ret;
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}
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}
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ret = domain_context_mapping(domain, dev);
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if (ret) {
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dev_err(dev, "Domain context map failed\n");
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dmar_remove_one_dev_info(dev);
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return ret;
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}
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return 0;
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}
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static int iommu_domain_identity_map(struct dmar_domain *domain,
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unsigned long first_vpfn,
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unsigned long last_vpfn)
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@ -2585,14 +2527,64 @@ static int __init si_domain_init(int hw)
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static int domain_add_dev_info(struct dmar_domain *domain, struct device *dev)
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{
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struct device_domain_info *info = dev_iommu_priv_get(dev);
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struct intel_iommu *iommu;
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unsigned long flags;
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u8 bus, devfn;
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int ret;
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iommu = device_to_iommu(dev, &bus, &devfn);
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if (!iommu)
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return -ENODEV;
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return dmar_insert_one_dev_info(iommu, bus, devfn, dev, domain);
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spin_lock_irqsave(&device_domain_lock, flags);
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info->domain = domain;
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spin_lock(&iommu->lock);
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ret = domain_attach_iommu(domain, iommu);
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spin_unlock(&iommu->lock);
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if (ret) {
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spin_unlock_irqrestore(&device_domain_lock, flags);
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return ret;
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}
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list_add(&info->link, &domain->devices);
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spin_unlock_irqrestore(&device_domain_lock, flags);
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/* PASID table is mandatory for a PCI device in scalable mode. */
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if (sm_supported(iommu) && !dev_is_real_dma_subdevice(dev)) {
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ret = intel_pasid_alloc_table(dev);
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if (ret) {
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dev_err(dev, "PASID table allocation failed\n");
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dmar_remove_one_dev_info(dev);
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return ret;
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}
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/* Setup the PASID entry for requests without PASID: */
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spin_lock_irqsave(&iommu->lock, flags);
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if (hw_pass_through && domain_type_is_si(domain))
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ret = intel_pasid_setup_pass_through(iommu, domain,
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dev, PASID_RID2PASID);
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else if (domain_use_first_level(domain))
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ret = domain_setup_first_level(iommu, domain, dev,
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PASID_RID2PASID);
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else
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ret = intel_pasid_setup_second_level(iommu, domain,
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dev, PASID_RID2PASID);
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spin_unlock_irqrestore(&iommu->lock, flags);
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if (ret) {
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dev_err(dev, "Setup RID2PASID failed\n");
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dmar_remove_one_dev_info(dev);
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return ret;
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}
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}
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ret = domain_context_mapping(domain, dev);
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if (ret) {
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dev_err(dev, "Domain context map failed\n");
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dmar_remove_one_dev_info(dev);
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return ret;
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}
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return 0;
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}
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static bool device_has_rmrr(struct device *dev)
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