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ARM: dts: dra7xx-clocks: Add missing 32KHz clocks used for PHY

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Added missing 32KHz clock used by PCIe PHY.
Figure 26-19. PCIe PHY Subsystem Integration in vE of DRA7xx ES1.0 TRM shows
32KHz is used by PCIe PHY.

Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Kishon Vijay Abraham I 2014-07-14 16:12:18 +05:30 committed by Tony Lindgren
parent 4310e90847
commit ba5137b272
1 changed files with 8 additions and 0 deletions
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8
arch/arm/boot/dts/dra7xx-clocks.dtsi
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@ -1165,6 +1165,14 @@
reg = <0x021c>, <0x0220>;
};
optfclk_pciephy_32khz: optfclk_pciephy_32khz@4a0093b0 {
compatible = "ti,gate-clock";
clocks = <&sys_32k_ck>;
#clock-cells = <0>;
reg = <0x13b0>;
ti,bit-shift = <8>;
};
optfclk_pciephy_div: optfclk_pciephy_div@4a00821c {
compatible = "ti,divider-clock";
clocks = <&apll_pcie_ck>;