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KVM, pkeys: expose CPUID/CR4 to guest
X86_FEATURE_PKU is referred to as "PKU" in the hardware documentation: CPUID.7.0.ECX[3]:PKU. X86_FEATURE_OSPKE is software support for pkeys, enumerated with CPUID.7.0.ECX[4]:OSPKE, and it reflects the setting of CR4.PKE(bit 22). This patch disables CPUID:PKU without ept, because pkeys is not yet implemented for shadow paging. Signed-off-by: Huaitong Han <huaitong.han@intel.com> Reviewed-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -84,7 +84,8 @@
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| X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
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| X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
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| X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
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| X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP))
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| X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP \
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| X86_CR4_PKE))
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#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
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@ -88,6 +88,16 @@ int kvm_update_cpuid(struct kvm_vcpu *vcpu)
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apic->lapic_timer.timer_mode_mask = 1 << 17;
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}
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best = kvm_find_cpuid_entry(vcpu, 7, 0);
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if (best) {
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/* Update OSPKE bit */
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if (boot_cpu_has(X86_FEATURE_PKU) && best->function == 0x7) {
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best->ecx &= ~F(OSPKE);
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if (kvm_read_cr4_bits(vcpu, X86_CR4_PKE))
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best->ecx |= F(OSPKE);
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}
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}
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best = kvm_find_cpuid_entry(vcpu, 0xD, 0);
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if (!best) {
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vcpu->arch.guest_supported_xcr0 = 0;
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@ -360,6 +370,9 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
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const u32 kvm_cpuid_D_1_eax_x86_features =
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F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves;
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/* cpuid 7.0.ecx*/
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const u32 kvm_cpuid_7_0_ecx_x86_features = F(PKU) | 0 /*OSPKE*/;
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/* all calls to cpuid_count() should be made on the same cpu */
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get_cpu();
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@ -437,10 +450,16 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
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cpuid_mask(&entry->ebx, CPUID_7_0_EBX);
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// TSC_ADJUST is emulated
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entry->ebx |= F(TSC_ADJUST);
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} else
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entry->ecx &= kvm_cpuid_7_0_ecx_x86_features;
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cpuid_mask(&entry->ecx, CPUID_7_ECX);
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/* PKU is not yet implemented for shadow paging. */
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if (!tdp_enabled)
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entry->ecx &= ~F(PKU);
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} else {
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entry->ebx = 0;
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entry->ecx = 0;
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}
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entry->eax = 0;
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entry->ecx = 0;
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entry->edx = 0;
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break;
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}
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@ -80,6 +80,14 @@ static inline bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
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return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
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}
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static inline bool guest_cpuid_has_pku(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best;
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best = kvm_find_cpuid_entry(vcpu, 7, 0);
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return best && (best->ecx & bit(X86_FEATURE_PKU));
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}
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static inline bool guest_cpuid_has_longmode(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best;
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@ -723,7 +723,7 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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{
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unsigned long old_cr4 = kvm_read_cr4(vcpu);
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unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
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X86_CR4_SMEP | X86_CR4_SMAP;
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X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
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if (cr4 & CR4_RESERVED_BITS)
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return 1;
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@ -740,6 +740,9 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
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return 1;
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if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
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return 1;
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if (is_long_mode(vcpu)) {
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if (!(cr4 & X86_CR4_PAE))
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return 1;
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@ -765,7 +768,7 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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(!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
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kvm_mmu_reset_context(vcpu);
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if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
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if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
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kvm_update_cpuid(vcpu);
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return 0;
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@ -7128,7 +7131,7 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
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mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
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kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
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if (sregs->cr4 & X86_CR4_OSXSAVE)
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if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
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kvm_update_cpuid(vcpu);
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idx = srcu_read_lock(&vcpu->kvm->srcu);
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