renegade-project/linux-next
2
0
Fork 0
mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-17 01:34:00 +08:00
Code

sh: mach-se evt2irq migration.

Browse Source 
Migrate Solution Engine boards to evt2irq backed hwirq lookups.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt 2012-05-18 15:34:49 +09:00
parent a7734e5107
commit b894701e7c
9 changed files with 52 additions and 42 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/sh/boards/mach-se/7722/setup.c
View File

@ -16,6 +16,7 @@
#include <linux/input.h>
#include <linux/input/sh_keysc.h>
#include <linux/smc91x.h>
#include <linux/sh_intc.h>
#include <mach-se/mach/se7722.h>
#include <mach-se/mach/mrshpc.h>
#include <asm/machvec.h>
@ -114,7 +115,7 @@ static struct resource sh_keysc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 79,
.start = evt2irq(0xbe0),
.flags = IORESOURCE_IRQ,
},
};

31
arch/sh/boards/mach-se/7724/setup.c
View File

@ -24,6 +24,7 @@
#include <linux/input/sh_keysc.h>
#include <linux/usb/r8a66597.h>
#include <linux/sh_eth.h>
#include <linux/sh_intc.h>
#include <linux/videodev2.h>
#include <video/sh_mobile_lcdc.h>
#include <media/sh_mobile_ceu.h>
@ -197,7 +198,7 @@ static struct resource lcdc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 106,
.start = evt2irq(0xf40),
.flags = IORESOURCE_IRQ,
},
};
@ -224,7 +225,7 @@ static struct resource ceu0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 52,
.start = evt2irq(0x880),
.flags = IORESOURCE_IRQ,
},
[2] = {
@ -255,7 +256,7 @@ static struct resource ceu1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 63,
.start = evt2irq(0x9e0),
.flags = IORESOURCE_IRQ,
},
[2] = {
@ -289,7 +290,7 @@ static struct resource fsi_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 108,
.start = evt2irq(0xf80),
.flags = IORESOURCE_IRQ,
},
};
@ -343,7 +344,7 @@ static struct resource keysc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 79,
.start = evt2irq(0xbe0),
.flags = IORESOURCE_IRQ,
},
};
@ -366,7 +367,7 @@ static struct resource sh_eth_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 91,
.start = evt2irq(0xd60),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
},
};
@ -397,8 +398,8 @@ static struct resource sh7724_usb0_host_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 65,
.end = 65,
.start = evt2irq(0xa20),
.end = evt2irq(0xa20),
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
},
};
@ -426,8 +427,8 @@ static struct resource sh7724_usb1_gadget_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 66,
.end = 66,
.start = evt2irq(0xa40),
.end = evt2irq(0xa40),
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
},
};
@ -452,7 +453,7 @@ static struct resource sdhi0_cn7_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 100,
.start = evt2irq(0xe80),
.flags = IORESOURCE_IRQ,
},
};
@ -481,7 +482,7 @@ static struct resource sdhi1_cn8_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 23,
.start = evt2irq(0x4e0),
.flags = IORESOURCE_IRQ,
},
};
@ -511,7 +512,7 @@ static struct resource irda_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 20,
.start = evt2irq(0x480),
.flags = IORESOURCE_IRQ,
},
};
@ -549,7 +550,7 @@ static struct resource sh_vou_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 55,
.start = evt2irq(0x8e0),
.flags = IORESOURCE_IRQ,
},
};
@ -595,6 +596,7 @@ static struct i2c_board_info i2c0_devices[] = {
#define EEPROM_DATA 0xBA20600C
#define EEPROM_STAT 0xBA206010
#define EEPROM_STRT 0xBA206014
static int __init sh_eth_is_eeprom_ready(void)
{
int t = 10000;
@ -651,7 +653,6 @@ extern char ms7724se_sdram_enter_end;
extern char ms7724se_sdram_leave_start;
extern char ms7724se_sdram_leave_end;
static int __init arch_setup(void)
{
/* enable I2C device */

19
arch/sh/include/mach-se/mach/se.h
View File

@ -8,6 +8,7 @@
*
* Hitachi SolutionEngine support
*/
#include <linux/sh_intc.h>
/* Box specific addresses. */
@ -82,16 +83,16 @@
#define INTC_IPRD 0xa4000018UL
#define INTC_IPRE 0xa400001aUL
#define IRQ0_IRQ 32
#define IRQ1_IRQ 33
#define IRQ0_IRQ evt2irq(0x600)
#define IRQ1_IRQ evt2irq(0x620)
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7705)
#define IRQ_STNIC 12
#define IRQ_CFCARD 14
#define IRQ_STNIC evt2irq(0x380)
#define IRQ_CFCARD evt2irq(0x3c0)
#else
#define IRQ_STNIC 10
#define IRQ_CFCARD 7
#define IRQ_STNIC evt2irq(0x340)
#define IRQ_CFCARD evt2irq(0x2e0)
#endif
/* SH Ether support (SH7710/SH7712) */
@ -105,9 +106,9 @@
# define PHY_ID 0x01
#endif
/* Ether IRQ */
#define SH_ETH0_IRQ 80
#define SH_ETH1_IRQ 81
#define SH_TSU_IRQ 82
#define SH_ETH0_IRQ evt2irq(0xc00)
#define SH_ETH1_IRQ evt2irq(0xc20)
#define SH_TSU_IRQ evt2irq(0xc40)
void init_se_IRQ(void);

9
arch/sh/include/mach-se/mach/se7343.h
View File

@ -8,6 +8,7 @@
*
* SH-Mobile SolutionEngine 7343 support
*/
#include <linux/sh_intc.h>
/* Box specific addresses. */
@ -118,10 +119,10 @@
#define FPGA_IN 0xb1400000
#define FPGA_OUT 0xb1400002
#define IRQ0_IRQ 32
#define IRQ1_IRQ 33
#define IRQ4_IRQ 36
#define IRQ5_IRQ 37
#define IRQ0_IRQ evt2irq(0x600)
#define IRQ1_IRQ evt2irq(0x620)
#define IRQ4_IRQ evt2irq(0x680)
#define IRQ5_IRQ evt2irq(0x6a0)
#define SE7343_FPGA_IRQ_MRSHPC0 0
#define SE7343_FPGA_IRQ_MRSHPC1 1

6
arch/sh/include/mach-se/mach/se7721.h
View File

@ -11,6 +11,8 @@
#ifndef __ASM_SH_SE7721_H
#define __ASM_SH_SE7721_H
#include <linux/sh_intc.h>
#include <asm/addrspace.h>
/* Box specific addresses. */
@ -49,9 +51,9 @@
#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
#define PA_LED 0xB6800000 /* 8bit LED */
#define PA_FPGA 0xB7000000 /* FPGA base address */
#define PA_FPGA 0xB7000000 /* FPGA base address */
#define MRSHPC_IRQ0 10
#define MRSHPC_IRQ0 evt2irq(0x340)
#define FPGA_ILSR1 (PA_FPGA + 0x02)
#define FPGA_ILSR2 (PA_FPGA + 0x03)

9
arch/sh/include/mach-se/mach/se7722.h
View File

@ -13,6 +13,7 @@
* for more details.
*
*/
#include <linux/sh_intc.h>
#include <asm/addrspace.h>
/* Box specific addresses. */
@ -31,7 +32,7 @@
#define PA_PERIPHERAL 0xB0000000
#define PA_PCIC PA_PERIPHERAL /* MR-SHPC-01 PCMCIA */
#define PA_PCIC PA_PERIPHERAL /* MR-SHPC-01 PCMCIA */
#define PA_MRSHPC (PA_PERIPHERAL + 0x003fffe0) /* MR-SHPC-01 PCMCIA controller */
#define PA_MRSHPC_MW1 (PA_PERIPHERAL + 0x00400000) /* MR-SHPC-01 memory window base */
#define PA_MRSHPC_MW2 (PA_PERIPHERAL + 0x00500000) /* MR-SHPC-01 attribute window base */
@ -51,7 +52,7 @@
#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
#define PA_LED (PA_PERIPHERAL + 0x00800000) /* 8bit LED */
#define PA_FPGA (PA_PERIPHERAL + 0x01800000) /* FPGA base address */
#define PA_FPGA (PA_PERIPHERAL + 0x01800000) /* FPGA base address */
#define PA_LAN (PA_AREA6_IO + 0) /* SMC LAN91C111 */
/* GPIO */
@ -77,8 +78,8 @@
#define PORT_HIZCRC 0xA405015CUL
/* IRQ */
#define IRQ0_IRQ 32
#define IRQ1_IRQ 33
#define IRQ0_IRQ evt2irq(0x600)
#define IRQ1_IRQ evt2irq(0x620)
#define IRQ01_MODE 0xb1800000
#define IRQ01_STS 0xb1800004

7
arch/sh/include/mach-se/mach/se7724.h
View File

@ -18,6 +18,7 @@
* for more details.
*
*/
#include <linux/sh_intc.h>
#include <asm/addrspace.h>
/* SH Eth */
@ -35,9 +36,9 @@
#define IRQ2_MR (0xba200028)
/* IRQ */
#define IRQ0_IRQ 32
#define IRQ1_IRQ 33
#define IRQ2_IRQ 34
#define IRQ0_IRQ evt2irq(0x600)
#define IRQ1_IRQ evt2irq(0x620)
#define IRQ2_IRQ evt2irq(0x640)
/* Bits in IRQ012 registers */
#define SE7724_FPGA_IRQ_BASE 220

3
arch/sh/include/mach-se/mach/se7751.h
View File

@ -11,6 +11,7 @@
* Modified for 7751 Solution Engine by
* Ian da Silva and Jeremy Siegel, 2001.
*/
#include <linux/sh_intc.h>
/* Box specific addresses. */
@ -63,7 +64,7 @@
#define BCR_ILCRF (PA_BCR + 10)
#define BCR_ILCRG (PA_BCR + 12)
#define IRQ_79C973 13
#define IRQ_79C973 evt2irq(0x3a0)
void init_7751se_IRQ(void);

7
arch/sh/include/mach-se/mach/se7780.h
View File

@ -12,6 +12,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/sh_intc.h>
#include <asm/addrspace.h>
/* Box specific addresses. */
@ -80,13 +81,13 @@
#define IRQPOS_PCCPW (0 * 4)
/* IDE interrupt */
#define IRQ_IDE0 67 /* iVDR */
#define IRQ_IDE0 evt2irq(0xa60) /* iVDR */
/* SMC interrupt */
#define SMC_IRQ 8
#define SMC_IRQ evt2irq(0x300)
/* SM501 interrupt */
#define SM501_IRQ 0
#define SM501_IRQ evt2irq(0x200)
/* interrupt pin */
#define IRQPIN_EXTINT1 0 /* IRQ0 pin */