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drm/amd/powerplay: export vega20 stable pstate clocks
Needed for querying the stable pstate clocks. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -846,6 +846,25 @@ static int vega20_odn_initialize_default_settings(
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return 0;
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}
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static int vega20_populate_umdpstate_clocks(
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struct pp_hwmgr *hwmgr)
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{
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struct vega20_hwmgr *data = (struct vega20_hwmgr *)(hwmgr->backend);
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struct vega20_single_dpm_table *gfx_table = &(data->dpm_table.gfx_table);
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struct vega20_single_dpm_table *mem_table = &(data->dpm_table.mem_table);
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hwmgr->pstate_sclk = gfx_table->dpm_levels[0].value;
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hwmgr->pstate_mclk = mem_table->dpm_levels[0].value;
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if (gfx_table->count > VEGA20_UMD_PSTATE_GFXCLK_LEVEL &&
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mem_table->count > VEGA20_UMD_PSTATE_MCLK_LEVEL) {
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hwmgr->pstate_sclk = gfx_table->dpm_levels[VEGA20_UMD_PSTATE_GFXCLK_LEVEL].value;
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hwmgr->pstate_mclk = mem_table->dpm_levels[VEGA20_UMD_PSTATE_MCLK_LEVEL].value;
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}
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return 0;
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}
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static int vega20_get_max_sustainable_clock(struct pp_hwmgr *hwmgr,
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PP_Clock *clock, PPCLK_e clock_select)
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{
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@ -992,7 +1011,12 @@ static int vega20_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
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"[EnableDPMTasks] Failed to initialize odn settings!",
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return result);
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return result;
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result = vega20_populate_umdpstate_clocks(hwmgr);
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PP_ASSERT_WITH_CODE(!result,
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"[EnableDPMTasks] Failed to populate umdpstate clocks!",
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return result);
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return 0;
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}
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static uint32_t vega20_find_lowest_dpm_level(
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