2
0
mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-16 17:23:55 +08:00

spi: Fixes for v5.18

A few more fixes for SPI, plus one new PCI ID for another Intel chipset.
 All device specific stuff.
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmJe030ACgkQJNaLcl1U
 h9BTnwf/VXTuq7Qn+xrWaA6tGJuYijgyc8vVUylutqJl6LaAMnk7NyPS5KWd1qx2
 0Yejp8R961YxG6xjduiUJgWnAU0MPu0JOVnR8s0mt2MBWDuLh53aQBgWKvm247Sz
 kN1mkSJcOWjzW0kVoY6XO8WW/Nofa8POtTR0CSxuwNByp6AGPay67BpyL586wej2
 D/wUXnU7FMIOgE/GQ0OQJrbPQVPaqEGLjJrAVyszZxqfROdR6CHUODE2KtZ+EuGU
 Je36I5W2F6eXiyMLNl9bdfXU7qMxIg66MPTFeeIM7QcfpscqTZVeo+0zMEaGXGvc
 cg1ezRSq5wE8LisA8ZFUwVmHtSYw5A==
 =7AEL
 -----END PGP SIGNATURE-----

Merge tag 'spi-fix-v5.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi fixes from Mark Brown:
 "A few more fixes for SPI, plus one new PCI ID for another Intel
  chipset.

  All device specific stuff"

* tag 'spi-fix-v5.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
  spi: atmel-quadspi: Fix the buswidth adjustment between spi-mem and controller
  spi: cadence-quadspi: fix incorrect supports_op() return value
  spi: intel: Add support for Raptor Lake-S SPI serial flash
  spi: spi-mtk-nor: initialize spi controller after resume
This commit is contained in:
Linus Torvalds 2022-04-19 10:30:43 -07:00
commit b7f73403a3
4 changed files with 32 additions and 3 deletions

View File

@ -277,6 +277,9 @@ static int atmel_qspi_find_mode(const struct spi_mem_op *op)
static bool atmel_qspi_supports_op(struct spi_mem *mem,
const struct spi_mem_op *op)
{
if (!spi_mem_default_supports_op(mem, op))
return false;
if (atmel_qspi_find_mode(op) < 0)
return false;

View File

@ -1415,9 +1415,24 @@ static bool cqspi_supports_mem_op(struct spi_mem *mem,
all_false = !op->cmd.dtr && !op->addr.dtr && !op->dummy.dtr &&
!op->data.dtr;
/* Mixed DTR modes not supported. */
if (!(all_true || all_false))
if (all_true) {
/* Right now we only support 8-8-8 DTR mode. */
if (op->cmd.nbytes && op->cmd.buswidth != 8)
return false;
if (op->addr.nbytes && op->addr.buswidth != 8)
return false;
if (op->data.nbytes && op->data.buswidth != 8)
return false;
} else if (all_false) {
/* Only 1-1-X ops are supported without DTR */
if (op->cmd.nbytes && op->cmd.buswidth > 1)
return false;
if (op->addr.nbytes && op->addr.buswidth > 1)
return false;
} else {
/* Mixed DTR modes are not supported. */
return false;
}
return spi_mem_default_supports_op(mem, op);
}

View File

@ -72,6 +72,7 @@ static const struct pci_device_id intel_spi_pci_ids[] = {
{ PCI_VDEVICE(INTEL, 0x4da4), (unsigned long)&bxt_info },
{ PCI_VDEVICE(INTEL, 0x51a4), (unsigned long)&cnl_info },
{ PCI_VDEVICE(INTEL, 0x54a4), (unsigned long)&cnl_info },
{ PCI_VDEVICE(INTEL, 0x7a24), (unsigned long)&cnl_info },
{ PCI_VDEVICE(INTEL, 0x7aa4), (unsigned long)&cnl_info },
{ PCI_VDEVICE(INTEL, 0xa0a4), (unsigned long)&bxt_info },
{ PCI_VDEVICE(INTEL, 0xa1a4), (unsigned long)&bxt_info },

View File

@ -960,7 +960,17 @@ static int __maybe_unused mtk_nor_suspend(struct device *dev)
static int __maybe_unused mtk_nor_resume(struct device *dev)
{
return pm_runtime_force_resume(dev);
struct spi_controller *ctlr = dev_get_drvdata(dev);
struct mtk_nor *sp = spi_controller_get_devdata(ctlr);
int ret;
ret = pm_runtime_force_resume(dev);
if (ret)
return ret;
mtk_nor_init(sp);
return 0;
}
static const struct dev_pm_ops mtk_nor_pm_ops = {