mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-24 05:04:00 +08:00
Merge branch 'drm-fixes' of /home/airlied/kernel/linux-2.6 into drm-core-next
Conflicts: drivers/gpu/drm/i915/intel_fb.c drivers/gpu/drm/radeon/r600_blit_kms.c drivers/gpu/drm/ttm/ttm_bo.c
This commit is contained in:
commit
b7ae5056c9
CREDITS
Documentation
MAINTAINERSMakefilearch
alpha/kernel
arm
Kconfig
boot/compressed
include/asm
kernel
mach-at91
mach-davinci
mach-dove/include/mach
mach-ep93xx
mach-imx
mach-kirkwood
mach-mmp/include/mach
mach-pxa
mach-s5p6440
mach-s5p6442
mach-s5pc100
mach-s5pv210
mach-u300/include/mach
mach-vexpress
mm
oprofile
plat-nomadik
plat-omap
plat-samsung
avr32/kernel
h8300/kernel
m32r
m68k/mac
mips
mn10300
parisc/kernel
powerpc
s390/kernel
sh/kernel
8
CREDITS
8
CREDITS
@ -3554,12 +3554,12 @@ E: cvance@nai.com
|
||||
D: portions of the Linux Security Module (LSM) framework and security modules
|
||||
|
||||
N: Petr Vandrovec
|
||||
E: vandrove@vc.cvut.cz
|
||||
E: petr@vandrovec.name
|
||||
D: Small contributions to ncpfs
|
||||
D: Matrox framebuffer driver
|
||||
S: Chudenicka 8
|
||||
S: 10200 Prague 10, Hostivar
|
||||
S: Czech Republic
|
||||
S: 21513 Conradia Ct
|
||||
S: Cupertino, CA 95014
|
||||
S: USA
|
||||
|
||||
N: Thibaut Varene
|
||||
E: T-Bone@parisc-linux.org
|
||||
|
@ -1,82 +1,35 @@
|
||||
Linux* Base Driver for the Intel(R) PRO/1000 Family of Adapters
|
||||
===============================================================
|
||||
|
||||
September 26, 2006
|
||||
|
||||
Intel Gigabit Linux driver.
|
||||
Copyright(c) 1999 - 2010 Intel Corporation.
|
||||
|
||||
Contents
|
||||
========
|
||||
|
||||
- In This Release
|
||||
- Identifying Your Adapter
|
||||
- Building and Installation
|
||||
- Command Line Parameters
|
||||
- Speed and Duplex Configuration
|
||||
- Additional Configurations
|
||||
- Known Issues
|
||||
- Support
|
||||
|
||||
|
||||
In This Release
|
||||
===============
|
||||
|
||||
This file describes the Linux* Base Driver for the Intel(R) PRO/1000 Family
|
||||
of Adapters. This driver includes support for Itanium(R)2-based systems.
|
||||
|
||||
For questions related to hardware requirements, refer to the documentation
|
||||
supplied with your Intel PRO/1000 adapter. All hardware requirements listed
|
||||
apply to use with Linux.
|
||||
|
||||
The following features are now available in supported kernels:
|
||||
- Native VLANs
|
||||
- Channel Bonding (teaming)
|
||||
- SNMP
|
||||
|
||||
Channel Bonding documentation can be found in the Linux kernel source:
|
||||
/Documentation/networking/bonding.txt
|
||||
|
||||
The driver information previously displayed in the /proc filesystem is not
|
||||
supported in this release. Alternatively, you can use ethtool (version 1.6
|
||||
or later), lspci, and ifconfig to obtain the same information.
|
||||
|
||||
Instructions on updating ethtool can be found in the section "Additional
|
||||
Configurations" later in this document.
|
||||
|
||||
NOTE: The Intel(R) 82562v 10/100 Network Connection only provides 10/100
|
||||
support.
|
||||
|
||||
|
||||
Identifying Your Adapter
|
||||
========================
|
||||
|
||||
For more information on how to identify your adapter, go to the Adapter &
|
||||
Driver ID Guide at:
|
||||
|
||||
http://support.intel.com/support/network/adapter/pro100/21397.htm
|
||||
http://support.intel.com/support/go/network/adapter/idguide.htm
|
||||
|
||||
For the latest Intel network drivers for Linux, refer to the following
|
||||
website. In the search field, enter your adapter name or type, or use the
|
||||
networking link on the left to search for your adapter:
|
||||
|
||||
http://downloadfinder.intel.com/scripts-df/support_intel.asp
|
||||
|
||||
http://support.intel.com/support/go/network/adapter/home.htm
|
||||
|
||||
Command Line Parameters
|
||||
=======================
|
||||
|
||||
If the driver is built as a module, the following optional parameters
|
||||
are used by entering them on the command line with the modprobe command
|
||||
using this syntax:
|
||||
|
||||
modprobe e1000 [<option>=<VAL1>,<VAL2>,...]
|
||||
|
||||
For example, with two PRO/1000 PCI adapters, entering:
|
||||
|
||||
modprobe e1000 TxDescriptors=80,128
|
||||
|
||||
loads the e1000 driver with 80 TX descriptors for the first adapter and
|
||||
128 TX descriptors for the second adapter.
|
||||
|
||||
The default value for each parameter is generally the recommended setting,
|
||||
unless otherwise noted.
|
||||
|
||||
@ -89,10 +42,6 @@ NOTES: For more information about the AutoNeg, Duplex, and Speed
|
||||
parameters, see the application note at:
|
||||
http://www.intel.com/design/network/applnots/ap450.htm
|
||||
|
||||
A descriptor describes a data buffer and attributes related to
|
||||
the data buffer. This information is accessed by the hardware.
|
||||
|
||||
|
||||
AutoNeg
|
||||
-------
|
||||
(Supported only on adapters with copper connections)
|
||||
@ -106,7 +55,6 @@ Duplex parameters must not be specified.
|
||||
NOTE: Refer to the Speed and Duplex section of this readme for more
|
||||
information on the AutoNeg parameter.
|
||||
|
||||
|
||||
Duplex
|
||||
------
|
||||
(Supported only on adapters with copper connections)
|
||||
@ -119,7 +67,6 @@ set to auto-negotiate, the board auto-detects the correct duplex. If the
|
||||
link partner is forced (either full or half), Duplex defaults to half-
|
||||
duplex.
|
||||
|
||||
|
||||
FlowControl
|
||||
-----------
|
||||
Valid Range: 0-3 (0=none, 1=Rx only, 2=Tx only, 3=Rx&Tx)
|
||||
@ -128,16 +75,16 @@ Default Value: Reads flow control settings from the EEPROM
|
||||
This parameter controls the automatic generation(Tx) and response(Rx)
|
||||
to Ethernet PAUSE frames.
|
||||
|
||||
|
||||
InterruptThrottleRate
|
||||
---------------------
|
||||
(not supported on Intel(R) 82542, 82543 or 82544-based adapters)
|
||||
Valid Range: 0,1,3,100-100000 (0=off, 1=dynamic, 3=dynamic conservative)
|
||||
Valid Range: 0,1,3,4,100-100000 (0=off, 1=dynamic, 3=dynamic conservative,
|
||||
4=simplified balancing)
|
||||
Default Value: 3
|
||||
|
||||
The driver can limit the amount of interrupts per second that the adapter
|
||||
will generate for incoming packets. It does this by writing a value to the
|
||||
adapter that is based on the maximum amount of interrupts that the adapter
|
||||
will generate for incoming packets. It does this by writing a value to the
|
||||
adapter that is based on the maximum amount of interrupts that the adapter
|
||||
will generate per second.
|
||||
|
||||
Setting InterruptThrottleRate to a value greater or equal to 100
|
||||
@ -146,37 +93,43 @@ per second, even if more packets have come in. This reduces interrupt
|
||||
load on the system and can lower CPU utilization under heavy load,
|
||||
but will increase latency as packets are not processed as quickly.
|
||||
|
||||
The default behaviour of the driver previously assumed a static
|
||||
InterruptThrottleRate value of 8000, providing a good fallback value for
|
||||
all traffic types,but lacking in small packet performance and latency.
|
||||
The hardware can handle many more small packets per second however, and
|
||||
The default behaviour of the driver previously assumed a static
|
||||
InterruptThrottleRate value of 8000, providing a good fallback value for
|
||||
all traffic types,but lacking in small packet performance and latency.
|
||||
The hardware can handle many more small packets per second however, and
|
||||
for this reason an adaptive interrupt moderation algorithm was implemented.
|
||||
|
||||
Since 7.3.x, the driver has two adaptive modes (setting 1 or 3) in which
|
||||
it dynamically adjusts the InterruptThrottleRate value based on the traffic
|
||||
it dynamically adjusts the InterruptThrottleRate value based on the traffic
|
||||
that it receives. After determining the type of incoming traffic in the last
|
||||
timeframe, it will adjust the InterruptThrottleRate to an appropriate value
|
||||
timeframe, it will adjust the InterruptThrottleRate to an appropriate value
|
||||
for that traffic.
|
||||
|
||||
The algorithm classifies the incoming traffic every interval into
|
||||
classes. Once the class is determined, the InterruptThrottleRate value is
|
||||
adjusted to suit that traffic type the best. There are three classes defined:
|
||||
classes. Once the class is determined, the InterruptThrottleRate value is
|
||||
adjusted to suit that traffic type the best. There are three classes defined:
|
||||
"Bulk traffic", for large amounts of packets of normal size; "Low latency",
|
||||
for small amounts of traffic and/or a significant percentage of small
|
||||
packets; and "Lowest latency", for almost completely small packets or
|
||||
packets; and "Lowest latency", for almost completely small packets or
|
||||
minimal traffic.
|
||||
|
||||
In dynamic conservative mode, the InterruptThrottleRate value is set to 4000
|
||||
for traffic that falls in class "Bulk traffic". If traffic falls in the "Low
|
||||
latency" or "Lowest latency" class, the InterruptThrottleRate is increased
|
||||
In dynamic conservative mode, the InterruptThrottleRate value is set to 4000
|
||||
for traffic that falls in class "Bulk traffic". If traffic falls in the "Low
|
||||
latency" or "Lowest latency" class, the InterruptThrottleRate is increased
|
||||
stepwise to 20000. This default mode is suitable for most applications.
|
||||
|
||||
For situations where low latency is vital such as cluster or
|
||||
grid computing, the algorithm can reduce latency even more when
|
||||
InterruptThrottleRate is set to mode 1. In this mode, which operates
|
||||
the same as mode 3, the InterruptThrottleRate will be increased stepwise to
|
||||
the same as mode 3, the InterruptThrottleRate will be increased stepwise to
|
||||
70000 for traffic in class "Lowest latency".
|
||||
|
||||
In simplified mode the interrupt rate is based on the ratio of Tx and
|
||||
Rx traffic. If the bytes per second rate is approximately equal, the
|
||||
interrupt rate will drop as low as 2000 interrupts per second. If the
|
||||
traffic is mostly transmit or mostly receive, the interrupt rate could
|
||||
be as high as 8000.
|
||||
|
||||
Setting InterruptThrottleRate to 0 turns off any interrupt moderation
|
||||
and may improve small packet latency, but is generally not suitable
|
||||
for bulk throughput traffic.
|
||||
@ -212,8 +165,6 @@ NOTE: When e1000 is loaded with default settings and multiple adapters
|
||||
be platform-specific. If CPU utilization is not a concern, use
|
||||
RX_POLLING (NAPI) and default driver settings.
|
||||
|
||||
|
||||
|
||||
RxDescriptors
|
||||
-------------
|
||||
Valid Range: 80-256 for 82542 and 82543-based adapters
|
||||
@ -225,15 +176,14 @@ by the driver. Increasing this value allows the driver to buffer more
|
||||
incoming packets, at the expense of increased system memory utilization.
|
||||
|
||||
Each descriptor is 16 bytes. A receive buffer is also allocated for each
|
||||
descriptor and can be either 2048, 4096, 8192, or 16384 bytes, depending
|
||||
descriptor and can be either 2048, 4096, 8192, or 16384 bytes, depending
|
||||
on the MTU setting. The maximum MTU size is 16110.
|
||||
|
||||
NOTE: MTU designates the frame size. It only needs to be set for Jumbo
|
||||
Frames. Depending on the available system resources, the request
|
||||
for a higher number of receive descriptors may be denied. In this
|
||||
NOTE: MTU designates the frame size. It only needs to be set for Jumbo
|
||||
Frames. Depending on the available system resources, the request
|
||||
for a higher number of receive descriptors may be denied. In this
|
||||
case, use a lower number.
|
||||
|
||||
|
||||
RxIntDelay
|
||||
----------
|
||||
Valid Range: 0-65535 (0=off)
|
||||
@ -254,7 +204,6 @@ CAUTION: When setting RxIntDelay to a value other than 0, adapters may
|
||||
restoring the network connection. To eliminate the potential
|
||||
for the hang ensure that RxIntDelay is set to 0.
|
||||
|
||||
|
||||
RxAbsIntDelay
|
||||
-------------
|
||||
(This parameter is supported only on 82540, 82545 and later adapters.)
|
||||
@ -268,7 +217,6 @@ packet is received within the set amount of time. Proper tuning,
|
||||
along with RxIntDelay, may improve traffic throughput in specific network
|
||||
conditions.
|
||||
|
||||
|
||||
Speed
|
||||
-----
|
||||
(This parameter is supported only on adapters with copper connections.)
|
||||
@ -280,7 +228,6 @@ Speed forces the line speed to the specified value in megabits per second
|
||||
partner is set to auto-negotiate, the board will auto-detect the correct
|
||||
speed. Duplex should also be set when Speed is set to either 10 or 100.
|
||||
|
||||
|
||||
TxDescriptors
|
||||
-------------
|
||||
Valid Range: 80-256 for 82542 and 82543-based adapters
|
||||
@ -295,6 +242,36 @@ NOTE: Depending on the available system resources, the request for a
|
||||
higher number of transmit descriptors may be denied. In this case,
|
||||
use a lower number.
|
||||
|
||||
TxDescriptorStep
|
||||
----------------
|
||||
Valid Range: 1 (use every Tx Descriptor)
|
||||
4 (use every 4th Tx Descriptor)
|
||||
|
||||
Default Value: 1 (use every Tx Descriptor)
|
||||
|
||||
On certain non-Intel architectures, it has been observed that intense TX
|
||||
traffic bursts of short packets may result in an improper descriptor
|
||||
writeback. If this occurs, the driver will report a "TX Timeout" and reset
|
||||
the adapter, after which the transmit flow will restart, though data may
|
||||
have stalled for as much as 10 seconds before it resumes.
|
||||
|
||||
The improper writeback does not occur on the first descriptor in a system
|
||||
memory cache-line, which is typically 32 bytes, or 4 descriptors long.
|
||||
|
||||
Setting TxDescriptorStep to a value of 4 will ensure that all TX descriptors
|
||||
are aligned to the start of a system memory cache line, and so this problem
|
||||
will not occur.
|
||||
|
||||
NOTES: Setting TxDescriptorStep to 4 effectively reduces the number of
|
||||
TxDescriptors available for transmits to 1/4 of the normal allocation.
|
||||
This has a possible negative performance impact, which may be
|
||||
compensated for by allocating more descriptors using the TxDescriptors
|
||||
module parameter.
|
||||
|
||||
There are other conditions which may result in "TX Timeout", which will
|
||||
not be resolved by the use of the TxDescriptorStep parameter. As the
|
||||
issue addressed by this parameter has never been observed on Intel
|
||||
Architecture platforms, it should not be used on Intel platforms.
|
||||
|
||||
TxIntDelay
|
||||
----------
|
||||
@ -307,7 +284,6 @@ efficiency if properly tuned for specific network traffic. If the
|
||||
system is reporting dropped transmits, this value may be set too high
|
||||
causing the driver to run out of available transmit descriptors.
|
||||
|
||||
|
||||
TxAbsIntDelay
|
||||
-------------
|
||||
(This parameter is supported only on 82540, 82545 and later adapters.)
|
||||
@ -330,6 +306,35 @@ Default Value: 1
|
||||
A value of '1' indicates that the driver should enable IP checksum
|
||||
offload for received packets (both UDP and TCP) to the adapter hardware.
|
||||
|
||||
Copybreak
|
||||
---------
|
||||
Valid Range: 0-xxxxxxx (0=off)
|
||||
Default Value: 256
|
||||
Usage: insmod e1000.ko copybreak=128
|
||||
|
||||
Driver copies all packets below or equaling this size to a fresh Rx
|
||||
buffer before handing it up the stack.
|
||||
|
||||
This parameter is different than other parameters, in that it is a
|
||||
single (not 1,1,1 etc.) parameter applied to all driver instances and
|
||||
it is also available during runtime at
|
||||
/sys/module/e1000/parameters/copybreak
|
||||
|
||||
SmartPowerDownEnable
|
||||
--------------------
|
||||
Valid Range: 0-1
|
||||
Default Value: 0 (disabled)
|
||||
|
||||
Allows PHY to turn off in lower power states. The user can turn off
|
||||
this parameter in supported chipsets.
|
||||
|
||||
KumeranLockLoss
|
||||
---------------
|
||||
Valid Range: 0-1
|
||||
Default Value: 1 (enabled)
|
||||
|
||||
This workaround skips resetting the PHY at shutdown for the initial
|
||||
silicon releases of ICH8 systems.
|
||||
|
||||
Speed and Duplex Configuration
|
||||
==============================
|
||||
@ -385,40 +390,9 @@ If the link partner is forced to a specific speed and duplex, then this
|
||||
parameter should not be used. Instead, use the Speed and Duplex parameters
|
||||
previously mentioned to force the adapter to the same speed and duplex.
|
||||
|
||||
|
||||
Additional Configurations
|
||||
=========================
|
||||
|
||||
Configuring the Driver on Different Distributions
|
||||
-------------------------------------------------
|
||||
Configuring a network driver to load properly when the system is started
|
||||
is distribution dependent. Typically, the configuration process involves
|
||||
adding an alias line to /etc/modules.conf or /etc/modprobe.conf as well
|
||||
as editing other system startup scripts and/or configuration files. Many
|
||||
popular Linux distributions ship with tools to make these changes for you.
|
||||
To learn the proper way to configure a network device for your system,
|
||||
refer to your distribution documentation. If during this process you are
|
||||
asked for the driver or module name, the name for the Linux Base Driver
|
||||
for the Intel(R) PRO/1000 Family of Adapters is e1000.
|
||||
|
||||
As an example, if you install the e1000 driver for two PRO/1000 adapters
|
||||
(eth0 and eth1) and set the speed and duplex to 10full and 100half, add
|
||||
the following to modules.conf or or modprobe.conf:
|
||||
|
||||
alias eth0 e1000
|
||||
alias eth1 e1000
|
||||
options e1000 Speed=10,100 Duplex=2,1
|
||||
|
||||
Viewing Link Messages
|
||||
---------------------
|
||||
Link messages will not be displayed to the console if the distribution is
|
||||
restricting system messages. In order to see network driver link messages
|
||||
on your console, set dmesg to eight by entering the following:
|
||||
|
||||
dmesg -n 8
|
||||
|
||||
NOTE: This setting is not saved across reboots.
|
||||
|
||||
Jumbo Frames
|
||||
------------
|
||||
Jumbo Frames support is enabled by changing the MTU to a value larger than
|
||||
@ -437,9 +411,11 @@ Additional Configurations
|
||||
setting in a different location.
|
||||
|
||||
Notes:
|
||||
|
||||
- To enable Jumbo Frames, increase the MTU size on the interface beyond
|
||||
1500.
|
||||
Degradation in throughput performance may be observed in some Jumbo frames
|
||||
environments. If this is observed, increasing the application's socket buffer
|
||||
size and/or increasing the /proc/sys/net/ipv4/tcp_*mem entry values may help.
|
||||
See the specific application manual and /usr/src/linux*/Documentation/
|
||||
networking/ip-sysctl.txt for more details.
|
||||
|
||||
- The maximum MTU setting for Jumbo Frames is 16110. This value coincides
|
||||
with the maximum Jumbo Frames size of 16128.
|
||||
@ -447,40 +423,11 @@ Additional Configurations
|
||||
- Using Jumbo Frames at 10 or 100 Mbps may result in poor performance or
|
||||
loss of link.
|
||||
|
||||
- Some Intel gigabit adapters that support Jumbo Frames have a frame size
|
||||
limit of 9238 bytes, with a corresponding MTU size limit of 9216 bytes.
|
||||
The adapters with this limitation are based on the Intel(R) 82571EB,
|
||||
82572EI, 82573L and 80003ES2LAN controller. These correspond to the
|
||||
following product names:
|
||||
Intel(R) PRO/1000 PT Server Adapter
|
||||
Intel(R) PRO/1000 PT Desktop Adapter
|
||||
Intel(R) PRO/1000 PT Network Connection
|
||||
Intel(R) PRO/1000 PT Dual Port Server Adapter
|
||||
Intel(R) PRO/1000 PT Dual Port Network Connection
|
||||
Intel(R) PRO/1000 PF Server Adapter
|
||||
Intel(R) PRO/1000 PF Network Connection
|
||||
Intel(R) PRO/1000 PF Dual Port Server Adapter
|
||||
Intel(R) PRO/1000 PB Server Connection
|
||||
Intel(R) PRO/1000 PL Network Connection
|
||||
Intel(R) PRO/1000 EB Network Connection with I/O Acceleration
|
||||
Intel(R) PRO/1000 EB Backplane Connection with I/O Acceleration
|
||||
Intel(R) PRO/1000 PT Quad Port Server Adapter
|
||||
|
||||
- Adapters based on the Intel(R) 82542 and 82573V/E controller do not
|
||||
support Jumbo Frames. These correspond to the following product names:
|
||||
Intel(R) PRO/1000 Gigabit Server Adapter
|
||||
Intel(R) PRO/1000 PM Network Connection
|
||||
|
||||
- The following adapters do not support Jumbo Frames:
|
||||
Intel(R) 82562V 10/100 Network Connection
|
||||
Intel(R) 82566DM Gigabit Network Connection
|
||||
Intel(R) 82566DC Gigabit Network Connection
|
||||
Intel(R) 82566MM Gigabit Network Connection
|
||||
Intel(R) 82566MC Gigabit Network Connection
|
||||
Intel(R) 82562GT 10/100 Network Connection
|
||||
Intel(R) 82562G 10/100 Network Connection
|
||||
|
||||
|
||||
Ethtool
|
||||
-------
|
||||
The driver utilizes the ethtool interface for driver configuration and
|
||||
@ -490,142 +437,14 @@ Additional Configurations
|
||||
The latest release of ethtool can be found from
|
||||
http://sourceforge.net/projects/gkernel.
|
||||
|
||||
NOTE: Ethtool 1.6 only supports a limited set of ethtool options. Support
|
||||
for a more complete ethtool feature set can be enabled by upgrading
|
||||
ethtool to ethtool-1.8.1.
|
||||
|
||||
Enabling Wake on LAN* (WoL)
|
||||
---------------------------
|
||||
WoL is configured through the Ethtool* utility. Ethtool is included with
|
||||
all versions of Red Hat after Red Hat 7.2. For other Linux distributions,
|
||||
download and install Ethtool from the following website:
|
||||
http://sourceforge.net/projects/gkernel.
|
||||
|
||||
For instructions on enabling WoL with Ethtool, refer to the website listed
|
||||
above.
|
||||
WoL is configured through the Ethtool* utility.
|
||||
|
||||
WoL will be enabled on the system during the next shut down or reboot.
|
||||
For this driver version, in order to enable WoL, the e1000 driver must be
|
||||
loaded when shutting down or rebooting the system.
|
||||
|
||||
Wake On LAN is only supported on port A for the following devices:
|
||||
Intel(R) PRO/1000 PT Dual Port Network Connection
|
||||
Intel(R) PRO/1000 PT Dual Port Server Connection
|
||||
Intel(R) PRO/1000 PT Dual Port Server Adapter
|
||||
Intel(R) PRO/1000 PF Dual Port Server Adapter
|
||||
Intel(R) PRO/1000 PT Quad Port Server Adapter
|
||||
|
||||
NAPI
|
||||
----
|
||||
NAPI (Rx polling mode) is enabled in the e1000 driver.
|
||||
|
||||
See www.cyberus.ca/~hadi/usenix-paper.tgz for more information on NAPI.
|
||||
|
||||
|
||||
Known Issues
|
||||
============
|
||||
|
||||
Dropped Receive Packets on Half-duplex 10/100 Networks
|
||||
------------------------------------------------------
|
||||
If you have an Intel PCI Express adapter running at 10mbps or 100mbps, half-
|
||||
duplex, you may observe occasional dropped receive packets. There are no
|
||||
workarounds for this problem in this network configuration. The network must
|
||||
be updated to operate in full-duplex, and/or 1000mbps only.
|
||||
|
||||
Jumbo Frames System Requirement
|
||||
-------------------------------
|
||||
Memory allocation failures have been observed on Linux systems with 64 MB
|
||||
of RAM or less that are running Jumbo Frames. If you are using Jumbo
|
||||
Frames, your system may require more than the advertised minimum
|
||||
requirement of 64 MB of system memory.
|
||||
|
||||
Performance Degradation with Jumbo Frames
|
||||
-----------------------------------------
|
||||
Degradation in throughput performance may be observed in some Jumbo frames
|
||||
environments. If this is observed, increasing the application's socket
|
||||
buffer size and/or increasing the /proc/sys/net/ipv4/tcp_*mem entry values
|
||||
may help. See the specific application manual and
|
||||
/usr/src/linux*/Documentation/
|
||||
networking/ip-sysctl.txt for more details.
|
||||
|
||||
Jumbo Frames on Foundry BigIron 8000 switch
|
||||
-------------------------------------------
|
||||
There is a known issue using Jumbo frames when connected to a Foundry
|
||||
BigIron 8000 switch. This is a 3rd party limitation. If you experience
|
||||
loss of packets, lower the MTU size.
|
||||
|
||||
Allocating Rx Buffers when Using Jumbo Frames
|
||||
---------------------------------------------
|
||||
Allocating Rx buffers when using Jumbo Frames on 2.6.x kernels may fail if
|
||||
the available memory is heavily fragmented. This issue may be seen with PCI-X
|
||||
adapters or with packet split disabled. This can be reduced or eliminated
|
||||
by changing the amount of available memory for receive buffer allocation, by
|
||||
increasing /proc/sys/vm/min_free_kbytes.
|
||||
|
||||
Multiple Interfaces on Same Ethernet Broadcast Network
|
||||
------------------------------------------------------
|
||||
Due to the default ARP behavior on Linux, it is not possible to have
|
||||
one system on two IP networks in the same Ethernet broadcast domain
|
||||
(non-partitioned switch) behave as expected. All Ethernet interfaces
|
||||
will respond to IP traffic for any IP address assigned to the system.
|
||||
This results in unbalanced receive traffic.
|
||||
|
||||
If you have multiple interfaces in a server, either turn on ARP
|
||||
filtering by entering:
|
||||
|
||||
echo 1 > /proc/sys/net/ipv4/conf/all/arp_filter
|
||||
(this only works if your kernel's version is higher than 2.4.5),
|
||||
|
||||
NOTE: This setting is not saved across reboots. The configuration
|
||||
change can be made permanent by adding the line:
|
||||
net.ipv4.conf.all.arp_filter = 1
|
||||
to the file /etc/sysctl.conf
|
||||
|
||||
or,
|
||||
|
||||
install the interfaces in separate broadcast domains (either in
|
||||
different switches or in a switch partitioned to VLANs).
|
||||
|
||||
82541/82547 can't link or are slow to link with some link partners
|
||||
-----------------------------------------------------------------
|
||||
There is a known compatibility issue with 82541/82547 and some
|
||||
low-end switches where the link will not be established, or will
|
||||
be slow to establish. In particular, these switches are known to
|
||||
be incompatible with 82541/82547:
|
||||
|
||||
Planex FXG-08TE
|
||||
I-O Data ETG-SH8
|
||||
|
||||
To workaround this issue, the driver can be compiled with an override
|
||||
of the PHY's master/slave setting. Forcing master or forcing slave
|
||||
mode will improve time-to-link.
|
||||
|
||||
# make CFLAGS_EXTRA=-DE1000_MASTER_SLAVE=<n>
|
||||
|
||||
Where <n> is:
|
||||
|
||||
0 = Hardware default
|
||||
1 = Master mode
|
||||
2 = Slave mode
|
||||
3 = Auto master/slave
|
||||
|
||||
Disable rx flow control with ethtool
|
||||
------------------------------------
|
||||
In order to disable receive flow control using ethtool, you must turn
|
||||
off auto-negotiation on the same command line.
|
||||
|
||||
For example:
|
||||
|
||||
ethtool -A eth? autoneg off rx off
|
||||
|
||||
Unplugging network cable while ethtool -p is running
|
||||
----------------------------------------------------
|
||||
In kernel versions 2.5.50 and later (including 2.6 kernel), unplugging
|
||||
the network cable while ethtool -p is running will cause the system to
|
||||
become unresponsive to keyboard commands, except for control-alt-delete.
|
||||
Restarting the system appears to be the only remedy.
|
||||
|
||||
|
||||
Support
|
||||
=======
|
||||
|
||||
|
302
Documentation/networking/e1000e.txt
Normal file
302
Documentation/networking/e1000e.txt
Normal file
@ -0,0 +1,302 @@
|
||||
Linux* Driver for Intel(R) Network Connection
|
||||
===============================================================
|
||||
|
||||
Intel Gigabit Linux driver.
|
||||
Copyright(c) 1999 - 2010 Intel Corporation.
|
||||
|
||||
Contents
|
||||
========
|
||||
|
||||
- Identifying Your Adapter
|
||||
- Command Line Parameters
|
||||
- Additional Configurations
|
||||
- Support
|
||||
|
||||
Identifying Your Adapter
|
||||
========================
|
||||
|
||||
The e1000e driver supports all PCI Express Intel(R) Gigabit Network
|
||||
Connections, except those that are 82575, 82576 and 82580-based*.
|
||||
|
||||
* NOTE: The Intel(R) PRO/1000 P Dual Port Server Adapter is supported by
|
||||
the e1000 driver, not the e1000e driver due to the 82546 part being used
|
||||
behind a PCI Express bridge.
|
||||
|
||||
For more information on how to identify your adapter, go to the Adapter &
|
||||
Driver ID Guide at:
|
||||
|
||||
http://support.intel.com/support/go/network/adapter/idguide.htm
|
||||
|
||||
For the latest Intel network drivers for Linux, refer to the following
|
||||
website. In the search field, enter your adapter name or type, or use the
|
||||
networking link on the left to search for your adapter:
|
||||
|
||||
http://support.intel.com/support/go/network/adapter/home.htm
|
||||
|
||||
Command Line Parameters
|
||||
=======================
|
||||
|
||||
The default value for each parameter is generally the recommended setting,
|
||||
unless otherwise noted.
|
||||
|
||||
NOTES: For more information about the InterruptThrottleRate,
|
||||
RxIntDelay, TxIntDelay, RxAbsIntDelay, and TxAbsIntDelay
|
||||
parameters, see the application note at:
|
||||
http://www.intel.com/design/network/applnots/ap450.htm
|
||||
|
||||
InterruptThrottleRate
|
||||
---------------------
|
||||
Valid Range: 0,1,3,4,100-100000 (0=off, 1=dynamic, 3=dynamic conservative,
|
||||
4=simplified balancing)
|
||||
Default Value: 3
|
||||
|
||||
The driver can limit the amount of interrupts per second that the adapter
|
||||
will generate for incoming packets. It does this by writing a value to the
|
||||
adapter that is based on the maximum amount of interrupts that the adapter
|
||||
will generate per second.
|
||||
|
||||
Setting InterruptThrottleRate to a value greater or equal to 100
|
||||
will program the adapter to send out a maximum of that many interrupts
|
||||
per second, even if more packets have come in. This reduces interrupt
|
||||
load on the system and can lower CPU utilization under heavy load,
|
||||
but will increase latency as packets are not processed as quickly.
|
||||
|
||||
The driver has two adaptive modes (setting 1 or 3) in which
|
||||
it dynamically adjusts the InterruptThrottleRate value based on the traffic
|
||||
that it receives. After determining the type of incoming traffic in the last
|
||||
timeframe, it will adjust the InterruptThrottleRate to an appropriate value
|
||||
for that traffic.
|
||||
|
||||
The algorithm classifies the incoming traffic every interval into
|
||||
classes. Once the class is determined, the InterruptThrottleRate value is
|
||||
adjusted to suit that traffic type the best. There are three classes defined:
|
||||
"Bulk traffic", for large amounts of packets of normal size; "Low latency",
|
||||
for small amounts of traffic and/or a significant percentage of small
|
||||
packets; and "Lowest latency", for almost completely small packets or
|
||||
minimal traffic.
|
||||
|
||||
In dynamic conservative mode, the InterruptThrottleRate value is set to 4000
|
||||
for traffic that falls in class "Bulk traffic". If traffic falls in the "Low
|
||||
latency" or "Lowest latency" class, the InterruptThrottleRate is increased
|
||||
stepwise to 20000. This default mode is suitable for most applications.
|
||||
|
||||
For situations where low latency is vital such as cluster or
|
||||
grid computing, the algorithm can reduce latency even more when
|
||||
InterruptThrottleRate is set to mode 1. In this mode, which operates
|
||||
the same as mode 3, the InterruptThrottleRate will be increased stepwise to
|
||||
70000 for traffic in class "Lowest latency".
|
||||
|
||||
In simplified mode the interrupt rate is based on the ratio of Tx and
|
||||
Rx traffic. If the bytes per second rate is approximately equal the
|
||||
interrupt rate will drop as low as 2000 interrupts per second. If the
|
||||
traffic is mostly transmit or mostly receive, the interrupt rate could
|
||||
be as high as 8000.
|
||||
|
||||
Setting InterruptThrottleRate to 0 turns off any interrupt moderation
|
||||
and may improve small packet latency, but is generally not suitable
|
||||
for bulk throughput traffic.
|
||||
|
||||
NOTE: InterruptThrottleRate takes precedence over the TxAbsIntDelay and
|
||||
RxAbsIntDelay parameters. In other words, minimizing the receive
|
||||
and/or transmit absolute delays does not force the controller to
|
||||
generate more interrupts than what the Interrupt Throttle Rate
|
||||
allows.
|
||||
|
||||
NOTE: When e1000e is loaded with default settings and multiple adapters
|
||||
are in use simultaneously, the CPU utilization may increase non-
|
||||
linearly. In order to limit the CPU utilization without impacting
|
||||
the overall throughput, we recommend that you load the driver as
|
||||
follows:
|
||||
|
||||
modprobe e1000e InterruptThrottleRate=3000,3000,3000
|
||||
|
||||
This sets the InterruptThrottleRate to 3000 interrupts/sec for
|
||||
the first, second, and third instances of the driver. The range
|
||||
of 2000 to 3000 interrupts per second works on a majority of
|
||||
systems and is a good starting point, but the optimal value will
|
||||
be platform-specific. If CPU utilization is not a concern, use
|
||||
RX_POLLING (NAPI) and default driver settings.
|
||||
|
||||
RxIntDelay
|
||||
----------
|
||||
Valid Range: 0-65535 (0=off)
|
||||
Default Value: 0
|
||||
|
||||
This value delays the generation of receive interrupts in units of 1.024
|
||||
microseconds. Receive interrupt reduction can improve CPU efficiency if
|
||||
properly tuned for specific network traffic. Increasing this value adds
|
||||
extra latency to frame reception and can end up decreasing the throughput
|
||||
of TCP traffic. If the system is reporting dropped receives, this value
|
||||
may be set too high, causing the driver to run out of available receive
|
||||
descriptors.
|
||||
|
||||
CAUTION: When setting RxIntDelay to a value other than 0, adapters may
|
||||
hang (stop transmitting) under certain network conditions. If
|
||||
this occurs a NETDEV WATCHDOG message is logged in the system
|
||||
event log. In addition, the controller is automatically reset,
|
||||
restoring the network connection. To eliminate the potential
|
||||
for the hang ensure that RxIntDelay is set to 0.
|
||||
|
||||
RxAbsIntDelay
|
||||
-------------
|
||||
Valid Range: 0-65535 (0=off)
|
||||
Default Value: 8
|
||||
|
||||
This value, in units of 1.024 microseconds, limits the delay in which a
|
||||
receive interrupt is generated. Useful only if RxIntDelay is non-zero,
|
||||
this value ensures that an interrupt is generated after the initial
|
||||
packet is received within the set amount of time. Proper tuning,
|
||||
along with RxIntDelay, may improve traffic throughput in specific network
|
||||
conditions.
|
||||
|
||||
TxIntDelay
|
||||
----------
|
||||
Valid Range: 0-65535 (0=off)
|
||||
Default Value: 8
|
||||
|
||||
This value delays the generation of transmit interrupts in units of
|
||||
1.024 microseconds. Transmit interrupt reduction can improve CPU
|
||||
efficiency if properly tuned for specific network traffic. If the
|
||||
system is reporting dropped transmits, this value may be set too high
|
||||
causing the driver to run out of available transmit descriptors.
|
||||
|
||||
TxAbsIntDelay
|
||||
-------------
|
||||
Valid Range: 0-65535 (0=off)
|
||||
Default Value: 32
|
||||
|
||||
This value, in units of 1.024 microseconds, limits the delay in which a
|
||||
transmit interrupt is generated. Useful only if TxIntDelay is non-zero,
|
||||
this value ensures that an interrupt is generated after the initial
|
||||
packet is sent on the wire within the set amount of time. Proper tuning,
|
||||
along with TxIntDelay, may improve traffic throughput in specific
|
||||
network conditions.
|
||||
|
||||
Copybreak
|
||||
---------
|
||||
Valid Range: 0-xxxxxxx (0=off)
|
||||
Default Value: 256
|
||||
|
||||
Driver copies all packets below or equaling this size to a fresh Rx
|
||||
buffer before handing it up the stack.
|
||||
|
||||
This parameter is different than other parameters, in that it is a
|
||||
single (not 1,1,1 etc.) parameter applied to all driver instances and
|
||||
it is also available during runtime at
|
||||
/sys/module/e1000e/parameters/copybreak
|
||||
|
||||
SmartPowerDownEnable
|
||||
--------------------
|
||||
Valid Range: 0-1
|
||||
Default Value: 0 (disabled)
|
||||
|
||||
Allows PHY to turn off in lower power states. The user can set this parameter
|
||||
in supported chipsets.
|
||||
|
||||
KumeranLockLoss
|
||||
---------------
|
||||
Valid Range: 0-1
|
||||
Default Value: 1 (enabled)
|
||||
|
||||
This workaround skips resetting the PHY at shutdown for the initial
|
||||
silicon releases of ICH8 systems.
|
||||
|
||||
IntMode
|
||||
-------
|
||||
Valid Range: 0-2 (0=legacy, 1=MSI, 2=MSI-X)
|
||||
Default Value: 2
|
||||
|
||||
Allows changing the interrupt mode at module load time, without requiring a
|
||||
recompile. If the driver load fails to enable a specific interrupt mode, the
|
||||
driver will try other interrupt modes, from least to most compatible. The
|
||||
interrupt order is MSI-X, MSI, Legacy. If specifying MSI (IntMode=1)
|
||||
interrupts, only MSI and Legacy will be attempted.
|
||||
|
||||
CrcStripping
|
||||
------------
|
||||
Valid Range: 0-1
|
||||
Default Value: 1 (enabled)
|
||||
|
||||
Strip the CRC from received packets before sending up the network stack. If
|
||||
you have a machine with a BMC enabled but cannot receive IPMI traffic after
|
||||
loading or enabling the driver, try disabling this feature.
|
||||
|
||||
WriteProtectNVM
|
||||
---------------
|
||||
Valid Range: 0-1
|
||||
Default Value: 1 (enabled)
|
||||
|
||||
Set the hardware to ignore all write/erase cycles to the GbE region in the
|
||||
ICHx NVM (non-volatile memory). This feature can be disabled by the
|
||||
WriteProtectNVM module parameter (enabled by default) only after a hardware
|
||||
reset, but the machine must be power cycled before trying to enable writes.
|
||||
|
||||
Note: the kernel boot option iomem=relaxed may need to be set if the kernel
|
||||
config option CONFIG_STRICT_DEVMEM=y, if the root user wants to write the
|
||||
NVM from user space via ethtool.
|
||||
|
||||
Additional Configurations
|
||||
=========================
|
||||
|
||||
Jumbo Frames
|
||||
------------
|
||||
Jumbo Frames support is enabled by changing the MTU to a value larger than
|
||||
the default of 1500. Use the ifconfig command to increase the MTU size.
|
||||
For example:
|
||||
|
||||
ifconfig eth<x> mtu 9000 up
|
||||
|
||||
This setting is not saved across reboots.
|
||||
|
||||
Notes:
|
||||
|
||||
- The maximum MTU setting for Jumbo Frames is 9216. This value coincides
|
||||
with the maximum Jumbo Frames size of 9234 bytes.
|
||||
|
||||
- Using Jumbo Frames at 10 or 100 Mbps is not supported and may result in
|
||||
poor performance or loss of link.
|
||||
|
||||
- Some adapters limit Jumbo Frames sized packets to a maximum of
|
||||
4096 bytes and some adapters do not support Jumbo Frames.
|
||||
|
||||
|
||||
Ethtool
|
||||
-------
|
||||
The driver utilizes the ethtool interface for driver configuration and
|
||||
diagnostics, as well as displaying statistical information. We
|
||||
strongly recommend downloading the latest version of Ethtool at:
|
||||
|
||||
http://sourceforge.net/projects/gkernel.
|
||||
|
||||
Speed and Duplex
|
||||
----------------
|
||||
Speed and Duplex are configured through the Ethtool* utility. For
|
||||
instructions, refer to the Ethtool man page.
|
||||
|
||||
Enabling Wake on LAN* (WoL)
|
||||
---------------------------
|
||||
WoL is configured through the Ethtool* utility. For instructions on
|
||||
enabling WoL with Ethtool, refer to the Ethtool man page.
|
||||
|
||||
WoL will be enabled on the system during the next shut down or reboot.
|
||||
For this driver version, in order to enable WoL, the e1000e driver must be
|
||||
loaded when shutting down or rebooting the system.
|
||||
|
||||
In most cases Wake On LAN is only supported on port A for multiple port
|
||||
adapters. To verify if a port supports Wake on LAN run ethtool eth<X>.
|
||||
|
||||
|
||||
Support
|
||||
=======
|
||||
|
||||
For general information, go to the Intel support website at:
|
||||
|
||||
www.intel.com/support/
|
||||
|
||||
or the Intel Wired Networking project hosted by Sourceforge at:
|
||||
|
||||
http://sourceforge.net/projects/e1000
|
||||
|
||||
If an issue is identified with the released source code on the supported
|
||||
kernel with a supported adapter, email the specific information related
|
||||
to the issue to e1000-devel@lists.sf.net
|
40
Documentation/networking/ixgbevf.txt
Executable file → Normal file
40
Documentation/networking/ixgbevf.txt
Executable file → Normal file
@ -1,19 +1,16 @@
|
||||
Linux* Base Driver for Intel(R) Network Connection
|
||||
==================================================
|
||||
|
||||
November 24, 2009
|
||||
Intel Gigabit Linux driver.
|
||||
Copyright(c) 1999 - 2010 Intel Corporation.
|
||||
|
||||
Contents
|
||||
========
|
||||
|
||||
- In This Release
|
||||
- Identifying Your Adapter
|
||||
- Known Issues/Troubleshooting
|
||||
- Support
|
||||
|
||||
In This Release
|
||||
===============
|
||||
|
||||
This file describes the ixgbevf Linux* Base Driver for Intel Network
|
||||
Connection.
|
||||
|
||||
@ -33,7 +30,7 @@ Identifying Your Adapter
|
||||
For more information on how to identify your adapter, go to the Adapter &
|
||||
Driver ID Guide at:
|
||||
|
||||
http://support.intel.com/support/network/sb/CS-008441.htm
|
||||
http://support.intel.com/support/go/network/adapter/idguide.htm
|
||||
|
||||
Known Issues/Troubleshooting
|
||||
============================
|
||||
@ -57,34 +54,3 @@ or the Intel Wired Networking project hosted by Sourceforge at:
|
||||
If an issue is identified with the released source code on the supported
|
||||
kernel with a supported adapter, email the specific information related
|
||||
to the issue to e1000-devel@lists.sf.net
|
||||
|
||||
License
|
||||
=======
|
||||
|
||||
Intel 10 Gigabit Linux driver.
|
||||
Copyright(c) 1999 - 2009 Intel Corporation.
|
||||
|
||||
This program is free software; you can redistribute it and/or modify it
|
||||
under the terms and conditions of the GNU General Public License,
|
||||
version 2, as published by the Free Software Foundation.
|
||||
|
||||
This program is distributed in the hope it will be useful, but WITHOUT
|
||||
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License along with
|
||||
this program; if not, write to the Free Software Foundation, Inc.,
|
||||
51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
|
||||
The full GNU General Public License is included in this distribution in
|
||||
the file called "COPYING".
|
||||
|
||||
Trademarks
|
||||
==========
|
||||
|
||||
Intel, Itanium, and Pentium are trademarks or registered trademarks of
|
||||
Intel Corporation or its subsidiaries in the United States and other
|
||||
countries.
|
||||
|
||||
* Other names and brands may be claimed as the property of others.
|
||||
|
@ -478,7 +478,7 @@ static void prepare_hwpoison_fd(void)
|
||||
}
|
||||
|
||||
if (opt_unpoison && !hwpoison_forget_fd) {
|
||||
sprintf(buf, "%s/renew-pfn", hwpoison_debug_fs);
|
||||
sprintf(buf, "%s/unpoison-pfn", hwpoison_debug_fs);
|
||||
hwpoison_forget_fd = checked_open(buf, O_WRONLY);
|
||||
}
|
||||
}
|
||||
|
60
MAINTAINERS
60
MAINTAINERS
@ -962,6 +962,23 @@ W: http://www.fluff.org/ben/linux/
|
||||
S: Maintained
|
||||
F: arch/arm/mach-s3c6410/
|
||||
|
||||
ARM/S5P ARM ARCHITECTURES
|
||||
M: Kukjin Kim <kgene.kim@samsung.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/mach-s5p*/
|
||||
|
||||
ARM/SAMSUNG S5P SERIES FIMC SUPPORT
|
||||
M: Kyungmin Park <kyungmin.park@samsung.com>
|
||||
M: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
L: linux-arm-kernel@lists.infradead.org
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/arm/plat-s5p/dev-fimc*
|
||||
F: arch/arm/plat-samsung/include/plat/*fimc*
|
||||
F: drivers/media/video/s5p-fimc/
|
||||
|
||||
ARM/SHMOBILE ARM ARCHITECTURE
|
||||
M: Paul Mundt <lethal@linux-sh.org>
|
||||
M: Magnus Damm <magnus.damm@gmail.com>
|
||||
@ -2537,7 +2554,7 @@ S: Supported
|
||||
F: drivers/scsi/gdt*
|
||||
|
||||
GENERIC GPIO I2C DRIVER
|
||||
M: Haavard Skinnemoen <hskinnemoen@atmel.com>
|
||||
M: Haavard Skinnemoen <hskinnemoen@gmail.com>
|
||||
S: Supported
|
||||
F: drivers/i2c/busses/i2c-gpio.c
|
||||
F: include/linux/i2c-gpio.h
|
||||
@ -3065,16 +3082,27 @@ L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/ixp2000/
|
||||
|
||||
INTEL ETHERNET DRIVERS (e100/e1000/e1000e/igb/igbvf/ixgb/ixgbe)
|
||||
INTEL ETHERNET DRIVERS (e100/e1000/e1000e/igb/igbvf/ixgb/ixgbe/ixgbevf)
|
||||
M: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
|
||||
M: Jesse Brandeburg <jesse.brandeburg@intel.com>
|
||||
M: Bruce Allan <bruce.w.allan@intel.com>
|
||||
M: Alex Duyck <alexander.h.duyck@intel.com>
|
||||
M: Carolyn Wyborny <carolyn.wyborny@intel.com>
|
||||
M: Don Skidmore <donald.c.skidmore@intel.com>
|
||||
M: Greg Rose <gregory.v.rose@intel.com>
|
||||
M: PJ Waskiewicz <peter.p.waskiewicz.jr@intel.com>
|
||||
M: Alex Duyck <alexander.h.duyck@intel.com>
|
||||
M: John Ronciak <john.ronciak@intel.com>
|
||||
L: e1000-devel@lists.sourceforge.net
|
||||
W: http://e1000.sourceforge.net/
|
||||
S: Supported
|
||||
F: Documentation/networking/e100.txt
|
||||
F: Documentation/networking/e1000.txt
|
||||
F: Documentation/networking/e1000e.txt
|
||||
F: Documentation/networking/igb.txt
|
||||
F: Documentation/networking/igbvf.txt
|
||||
F: Documentation/networking/ixgb.txt
|
||||
F: Documentation/networking/ixgbe.txt
|
||||
F: Documentation/networking/ixgbevf.txt
|
||||
F: drivers/net/e100.c
|
||||
F: drivers/net/e1000/
|
||||
F: drivers/net/e1000e/
|
||||
@ -3082,6 +3110,7 @@ F: drivers/net/igb/
|
||||
F: drivers/net/igbvf/
|
||||
F: drivers/net/ixgb/
|
||||
F: drivers/net/ixgbe/
|
||||
F: drivers/net/ixgbevf/
|
||||
|
||||
INTEL PRO/WIRELESS 2100 NETWORK CONNECTION SUPPORT
|
||||
L: linux-wireless@vger.kernel.org
|
||||
@ -3790,9 +3819,8 @@ W: http://www.syskonnect.com
|
||||
S: Supported
|
||||
|
||||
MATROX FRAMEBUFFER DRIVER
|
||||
M: Petr Vandrovec <vandrove@vc.cvut.cz>
|
||||
L: linux-fbdev@vger.kernel.org
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: drivers/video/matrox/matroxfb_*
|
||||
F: include/linux/matroxfb.h
|
||||
|
||||
@ -3934,8 +3962,10 @@ S: Supported
|
||||
F: drivers/mfd/
|
||||
|
||||
MULTIMEDIA CARD (MMC), SECURE DIGITAL (SD) AND SDIO SUBSYSTEM
|
||||
S: Orphan
|
||||
M: Chris Ball <cjb@laptop.org>
|
||||
L: linux-mmc@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc.git
|
||||
S: Maintained
|
||||
F: drivers/mmc/
|
||||
F: include/linux/mmc/
|
||||
|
||||
@ -3977,8 +4007,8 @@ S: Maintained
|
||||
F: drivers/net/natsemi.c
|
||||
|
||||
NCP FILESYSTEM
|
||||
M: Petr Vandrovec <vandrove@vc.cvut.cz>
|
||||
S: Maintained
|
||||
M: Petr Vandrovec <petr@vandrovec.name>
|
||||
S: Odd Fixes
|
||||
F: fs/ncpfs/
|
||||
|
||||
NCR DUAL 700 SCSI DRIVER (MICROCHANNEL)
|
||||
@ -5009,6 +5039,12 @@ F: drivers/media/common/saa7146*
|
||||
F: drivers/media/video/*7146*
|
||||
F: include/media/*7146*
|
||||
|
||||
SAMSUNG AUDIO (ASoC) DRIVERS
|
||||
M: Jassi Brar <jassi.brar@samsung.com>
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: sound/soc/s3c24xx
|
||||
|
||||
TLG2300 VIDEO4LINUX-2 DRIVER
|
||||
M: Huang Shijie <shijie8@gmail.com>
|
||||
M: Kang Yong <kangyong@telegent.com>
|
||||
@ -5106,8 +5142,10 @@ S: Maintained
|
||||
F: drivers/mmc/host/sdricoh_cs.c
|
||||
|
||||
SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) DRIVER
|
||||
S: Orphan
|
||||
M: Chris Ball <cjb@laptop.org>
|
||||
L: linux-mmc@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc.git
|
||||
S: Maintained
|
||||
F: drivers/mmc/host/sdhci.*
|
||||
|
||||
SECURE DIGITAL HOST CONTROLLER INTERFACE, OPEN FIRMWARE BINDINGS (SDHCI-OF)
|
||||
@ -6449,8 +6487,10 @@ F: include/linux/wm97xx.h
|
||||
WOLFSON MICROELECTRONICS DRIVERS
|
||||
M: Mark Brown <broonie@opensource.wolfsonmicro.com>
|
||||
M: Ian Lartey <ian@opensource.wolfsonmicro.com>
|
||||
M: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
|
||||
T: git git://opensource.wolfsonmicro.com/linux-2.6-asoc
|
||||
T: git git://opensource.wolfsonmicro.com/linux-2.6-audioplus
|
||||
W: http://opensource.wolfsonmicro.com/node/8
|
||||
W: http://opensource.wolfsonmicro.com/content/linux-drivers-wolfson-devices
|
||||
S: Supported
|
||||
F: Documentation/hwmon/wm83??
|
||||
F: drivers/leds/leds-wm83*.c
|
||||
|
4
Makefile
4
Makefile
@ -1,8 +1,8 @@
|
||||
VERSION = 2
|
||||
PATCHLEVEL = 6
|
||||
SUBLEVEL = 36
|
||||
EXTRAVERSION = -rc5
|
||||
NAME = Sheep on Meth
|
||||
EXTRAVERSION = -rc8
|
||||
NAME = Flesh-Eating Bats with Fangs
|
||||
|
||||
# *DOCUMENTATION*
|
||||
# To see a list of typical targets execute "make help"
|
||||
|
@ -914,15 +914,6 @@ sys_execve:
|
||||
jmp $31, do_sys_execve
|
||||
.end sys_execve
|
||||
|
||||
.align 4
|
||||
.globl osf_sigprocmask
|
||||
.ent osf_sigprocmask
|
||||
osf_sigprocmask:
|
||||
.prologue 0
|
||||
mov $sp, $18
|
||||
jmp $31, sys_osf_sigprocmask
|
||||
.end osf_sigprocmask
|
||||
|
||||
.align 4
|
||||
.globl alpha_ni_syscall
|
||||
.ent alpha_ni_syscall
|
||||
|
@ -41,46 +41,20 @@ static void do_signal(struct pt_regs *, struct switch_stack *,
|
||||
/*
|
||||
* The OSF/1 sigprocmask calling sequence is different from the
|
||||
* C sigprocmask() sequence..
|
||||
*
|
||||
* how:
|
||||
* 1 - SIG_BLOCK
|
||||
* 2 - SIG_UNBLOCK
|
||||
* 3 - SIG_SETMASK
|
||||
*
|
||||
* We change the range to -1 .. 1 in order to let gcc easily
|
||||
* use the conditional move instructions.
|
||||
*
|
||||
* Note that we don't need to acquire the kernel lock for SMP
|
||||
* operation, as all of this is local to this thread.
|
||||
*/
|
||||
SYSCALL_DEFINE3(osf_sigprocmask, int, how, unsigned long, newmask,
|
||||
struct pt_regs *, regs)
|
||||
SYSCALL_DEFINE2(osf_sigprocmask, int, how, unsigned long, newmask)
|
||||
{
|
||||
unsigned long oldmask = -EINVAL;
|
||||
sigset_t oldmask;
|
||||
sigset_t mask;
|
||||
unsigned long res;
|
||||
|
||||
if ((unsigned long)how-1 <= 2) {
|
||||
long sign = how-2; /* -1 .. 1 */
|
||||
unsigned long block, unblock;
|
||||
|
||||
newmask &= _BLOCKABLE;
|
||||
spin_lock_irq(¤t->sighand->siglock);
|
||||
oldmask = current->blocked.sig[0];
|
||||
|
||||
unblock = oldmask & ~newmask;
|
||||
block = oldmask | newmask;
|
||||
if (!sign)
|
||||
block = unblock;
|
||||
if (sign <= 0)
|
||||
newmask = block;
|
||||
if (_NSIG_WORDS > 1 && sign > 0)
|
||||
sigemptyset(¤t->blocked);
|
||||
current->blocked.sig[0] = newmask;
|
||||
recalc_sigpending();
|
||||
spin_unlock_irq(¤t->sighand->siglock);
|
||||
|
||||
regs->r0 = 0; /* special no error return */
|
||||
siginitset(&mask, newmask & _BLOCKABLE);
|
||||
res = sigprocmask(how, &mask, &oldmask);
|
||||
if (!res) {
|
||||
force_successful_syscall_return();
|
||||
res = oldmask.sig[0];
|
||||
}
|
||||
return oldmask;
|
||||
return res;
|
||||
}
|
||||
|
||||
SYSCALL_DEFINE3(osf_sigaction, int, sig,
|
||||
@ -94,9 +68,9 @@ SYSCALL_DEFINE3(osf_sigaction, int, sig,
|
||||
old_sigset_t mask;
|
||||
if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
|
||||
__get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
|
||||
__get_user(new_ka.sa.sa_flags, &act->sa_flags))
|
||||
__get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
|
||||
__get_user(mask, &act->sa_mask))
|
||||
return -EFAULT;
|
||||
__get_user(mask, &act->sa_mask);
|
||||
siginitset(&new_ka.sa.sa_mask, mask);
|
||||
new_ka.ka_restorer = NULL;
|
||||
}
|
||||
@ -106,9 +80,9 @@ SYSCALL_DEFINE3(osf_sigaction, int, sig,
|
||||
if (!ret && oact) {
|
||||
if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
|
||||
__put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
|
||||
__put_user(old_ka.sa.sa_flags, &oact->sa_flags))
|
||||
__put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
|
||||
__put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
|
||||
return -EFAULT;
|
||||
__put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
@ -58,7 +58,7 @@ sys_call_table:
|
||||
.quad sys_open /* 45 */
|
||||
.quad alpha_ni_syscall
|
||||
.quad sys_getxgid
|
||||
.quad osf_sigprocmask
|
||||
.quad sys_osf_sigprocmask
|
||||
.quad alpha_ni_syscall
|
||||
.quad alpha_ni_syscall /* 50 */
|
||||
.quad sys_acct
|
||||
|
@ -271,7 +271,6 @@ config ARCH_AT91
|
||||
bool "Atmel AT91"
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select HAVE_CLK
|
||||
select ARCH_USES_GETTIMEOFFSET
|
||||
help
|
||||
This enables support for systems based on the Atmel AT91RM9200,
|
||||
AT91SAM9 and AT91CAP9 processors.
|
||||
@ -1051,6 +1050,32 @@ config ARM_ERRATA_460075
|
||||
ACTLR register. Note that setting specific bits in the ACTLR register
|
||||
may not be available in non-secure mode.
|
||||
|
||||
config ARM_ERRATA_742230
|
||||
bool "ARM errata: DMB operation may be faulty"
|
||||
depends on CPU_V7 && SMP
|
||||
help
|
||||
This option enables the workaround for the 742230 Cortex-A9
|
||||
(r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
|
||||
between two write operations may not ensure the correct visibility
|
||||
ordering of the two writes. This workaround sets a specific bit in
|
||||
the diagnostic register of the Cortex-A9 which causes the DMB
|
||||
instruction to behave as a DSB, ensuring the correct behaviour of
|
||||
the two writes.
|
||||
|
||||
config ARM_ERRATA_742231
|
||||
bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
|
||||
depends on CPU_V7 && SMP
|
||||
help
|
||||
This option enables the workaround for the 742231 Cortex-A9
|
||||
(r2p0..r2p2) erratum. Under certain conditions, specific to the
|
||||
Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
|
||||
accessing some data located in the same cache line, may get corrupted
|
||||
data due to bad handling of the address hazard when the line gets
|
||||
replaced from one of the CPUs at the same time as another CPU is
|
||||
accessing it. This workaround sets specific bits in the diagnostic
|
||||
register of the Cortex-A9 which reduces the linefill issuing
|
||||
capabilities of the processor.
|
||||
|
||||
config PL310_ERRATA_588369
|
||||
bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
|
||||
depends on CACHE_L2X0 && ARCH_OMAP4
|
||||
@ -1076,6 +1101,20 @@ config ARM_ERRATA_720789
|
||||
invalidated are not, resulting in an incoherency in the system page
|
||||
tables. The workaround changes the TLB flushing routines to invalidate
|
||||
entries regardless of the ASID.
|
||||
|
||||
config ARM_ERRATA_743622
|
||||
bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
|
||||
depends on CPU_V7
|
||||
help
|
||||
This option enables the workaround for the 743622 Cortex-A9
|
||||
(r2p0..r2p2) erratum. Under very rare conditions, a faulty
|
||||
optimisation in the Cortex-A9 Store Buffer may lead to data
|
||||
corruption. This workaround sets a specific bit in the diagnostic
|
||||
register of the Cortex-A9 which disables the Store Buffer
|
||||
optimisation, preventing the defect from occurring. This has no
|
||||
visible impact on the overall performance or power consumption of the
|
||||
processor.
|
||||
|
||||
endmenu
|
||||
|
||||
source "arch/arm/common/Kconfig"
|
||||
|
@ -116,5 +116,5 @@ CFLAGS_font.o := -Dstatic=
|
||||
$(obj)/font.c: $(FONTC)
|
||||
$(call cmd,shipped)
|
||||
|
||||
$(obj)/vmlinux.lds: $(obj)/vmlinux.lds.in arch/arm/boot/Makefile .config
|
||||
$(obj)/vmlinux.lds: $(obj)/vmlinux.lds.in arch/arm/boot/Makefile $(KCONFIG_CONFIG)
|
||||
@sed "$(SEDFLAGS)" < $< > $@
|
||||
|
@ -317,6 +317,10 @@ static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
|
||||
#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
|
||||
#define pgprot_dmacoherent(prot) \
|
||||
__pgprot_modify(prot, L_PTE_MT_MASK|L_PTE_EXEC, L_PTE_MT_BUFFERABLE)
|
||||
#define __HAVE_PHYS_MEM_ACCESS_PROT
|
||||
struct file;
|
||||
extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
|
||||
unsigned long size, pgprot_t vma_prot);
|
||||
#else
|
||||
#define pgprot_dmacoherent(prot) \
|
||||
__pgprot_modify(prot, L_PTE_MT_MASK|L_PTE_EXEC, L_PTE_MT_UNCACHED)
|
||||
|
@ -48,6 +48,8 @@ work_pending:
|
||||
beq no_work_pending
|
||||
mov r0, sp @ 'regs'
|
||||
mov r2, why @ 'syscall'
|
||||
tst r1, #_TIF_SIGPENDING @ delivering a signal?
|
||||
movne why, #0 @ prevent further restarts
|
||||
bl do_notify_resume
|
||||
b ret_slow_syscall @ Check work again
|
||||
|
||||
|
@ -1162,11 +1162,12 @@ space_cccc_001x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
|
||||
{
|
||||
/*
|
||||
* MSR : cccc 0011 0x10 xxxx xxxx xxxx xxxx xxxx
|
||||
* Undef : cccc 0011 0x00 xxxx xxxx xxxx xxxx xxxx
|
||||
* Undef : cccc 0011 0100 xxxx xxxx xxxx xxxx xxxx
|
||||
* ALU op with S bit and Rd == 15 :
|
||||
* cccc 001x xxx1 xxxx 1111 xxxx xxxx xxxx
|
||||
*/
|
||||
if ((insn & 0x0f900000) == 0x03200000 || /* MSR & Undef */
|
||||
if ((insn & 0x0fb00000) == 0x03200000 || /* MSR */
|
||||
(insn & 0x0ff00000) == 0x03400000 || /* Undef */
|
||||
(insn & 0x0e10f000) == 0x0210f000) /* ALU s-bit, R15 */
|
||||
return INSN_REJECTED;
|
||||
|
||||
@ -1177,7 +1178,7 @@ space_cccc_001x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
|
||||
* *S (bit 20) updates condition codes
|
||||
* ADC/SBC/RSC reads the C flag
|
||||
*/
|
||||
insn &= 0xfff00fff; /* Rn = r0, Rd = r0 */
|
||||
insn &= 0xffff0fff; /* Rd = r0 */
|
||||
asi->insn[0] = insn;
|
||||
asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */
|
||||
emulate_alu_imm_rwflags : emulate_alu_imm_rflags;
|
||||
|
@ -426,7 +426,7 @@ static struct i2c_gpio_platform_data pdata_i2c0 = {
|
||||
.sda_is_open_drain = 1,
|
||||
.scl_pin = AT91_PIN_PA21,
|
||||
.scl_is_open_drain = 1,
|
||||
.udelay = 2, /* ~100 kHz */
|
||||
.udelay = 5, /* ~100 kHz */
|
||||
};
|
||||
|
||||
static struct platform_device at91sam9g45_twi0_device = {
|
||||
@ -440,7 +440,7 @@ static struct i2c_gpio_platform_data pdata_i2c1 = {
|
||||
.sda_is_open_drain = 1,
|
||||
.scl_pin = AT91_PIN_PB11,
|
||||
.scl_is_open_drain = 1,
|
||||
.udelay = 2, /* ~100 kHz */
|
||||
.udelay = 5, /* ~100 kHz */
|
||||
};
|
||||
|
||||
static struct platform_device at91sam9g45_twi1_device = {
|
||||
|
@ -28,17 +28,16 @@
|
||||
|
||||
static inline void arch_idle(void)
|
||||
{
|
||||
#ifndef CONFIG_DEBUG_KERNEL
|
||||
/*
|
||||
* Disable the processor clock. The processor will be automatically
|
||||
* re-enabled by an interrupt or by a reset.
|
||||
*/
|
||||
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
|
||||
#else
|
||||
#ifndef CONFIG_CPU_ARM920T
|
||||
/*
|
||||
* Set the processor (CP15) into 'Wait for Interrupt' mode.
|
||||
* Unlike disabling the processor clock via the PMC (above)
|
||||
* this allows the processor to be woken via JTAG.
|
||||
* Post-RM9200 processors need this in conjunction with the above
|
||||
* to save power when idle.
|
||||
*/
|
||||
cpu_do_idle();
|
||||
#endif
|
||||
|
@ -769,8 +769,7 @@ static struct map_desc dm355_io_desc[] = {
|
||||
.virtual = SRAM_VIRT,
|
||||
.pfn = __phys_to_pfn(0x00010000),
|
||||
.length = SZ_32K,
|
||||
/* MT_MEMORY_NONCACHED requires supersection alignment */
|
||||
.type = MT_DEVICE,
|
||||
.type = MT_MEMORY_NONCACHED,
|
||||
},
|
||||
};
|
||||
|
||||
|
@ -969,8 +969,7 @@ static struct map_desc dm365_io_desc[] = {
|
||||
.virtual = SRAM_VIRT,
|
||||
.pfn = __phys_to_pfn(0x00010000),
|
||||
.length = SZ_32K,
|
||||
/* MT_MEMORY_NONCACHED requires supersection alignment */
|
||||
.type = MT_DEVICE,
|
||||
.type = MT_MEMORY_NONCACHED,
|
||||
},
|
||||
};
|
||||
|
||||
|
@ -653,8 +653,7 @@ static struct map_desc dm644x_io_desc[] = {
|
||||
.virtual = SRAM_VIRT,
|
||||
.pfn = __phys_to_pfn(0x00008000),
|
||||
.length = SZ_16K,
|
||||
/* MT_MEMORY_NONCACHED requires supersection alignment */
|
||||
.type = MT_DEVICE,
|
||||
.type = MT_MEMORY_NONCACHED,
|
||||
},
|
||||
};
|
||||
|
||||
|
@ -737,8 +737,7 @@ static struct map_desc dm646x_io_desc[] = {
|
||||
.virtual = SRAM_VIRT,
|
||||
.pfn = __phys_to_pfn(0x00010000),
|
||||
.length = SZ_32K,
|
||||
/* MT_MEMORY_NONCACHED requires supersection alignment */
|
||||
.type = MT_DEVICE,
|
||||
.type = MT_MEMORY_NONCACHED,
|
||||
},
|
||||
};
|
||||
|
||||
|
@ -13,8 +13,8 @@
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
|
||||
#define __io(a) ((void __iomem *)(((a) - DOVE_PCIE0_IO_PHYS_BASE) +\
|
||||
DOVE_PCIE0_IO_VIRT_BASE))
|
||||
#define __mem_pci(a) (a)
|
||||
#define __io(a) ((void __iomem *)(((a) - DOVE_PCIE0_IO_BUS_BASE) + \
|
||||
DOVE_PCIE0_IO_VIRT_BASE))
|
||||
#define __mem_pci(a) (a)
|
||||
|
||||
#endif
|
||||
|
@ -276,7 +276,7 @@ static void channel_disable(struct m2p_channel *ch)
|
||||
v &= ~(M2P_CONTROL_STALL_IRQ_EN | M2P_CONTROL_NFB_IRQ_EN);
|
||||
m2p_set_control(ch, v);
|
||||
|
||||
while (m2p_channel_state(ch) == STATE_ON)
|
||||
while (m2p_channel_state(ch) >= STATE_ON)
|
||||
cpu_relax();
|
||||
|
||||
m2p_set_control(ch, 0x0);
|
||||
|
@ -122,6 +122,7 @@ config MACH_CPUIMX27
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select MXC_ULPI if USB_ULPI
|
||||
help
|
||||
Include support for Eukrea CPUIMX27 platform. This includes
|
||||
specific configurations for the module and its peripherals.
|
||||
|
@ -259,7 +259,7 @@ static void __init eukrea_cpuimx27_init(void)
|
||||
i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
|
||||
ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
|
||||
|
||||
imx27_add_i2c_imx1(&cpuimx27_i2c1_data);
|
||||
imx27_add_i2c_imx0(&cpuimx27_i2c1_data);
|
||||
|
||||
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
|
||||
|
||||
|
@ -38,7 +38,7 @@
|
||||
|
||||
#define KIRKWOOD_PCIE1_IO_PHYS_BASE 0xf3000000
|
||||
#define KIRKWOOD_PCIE1_IO_VIRT_BASE 0xfef00000
|
||||
#define KIRKWOOD_PCIE1_IO_BUS_BASE 0x00000000
|
||||
#define KIRKWOOD_PCIE1_IO_BUS_BASE 0x00100000
|
||||
#define KIRKWOOD_PCIE1_IO_SIZE SZ_1M
|
||||
|
||||
#define KIRKWOOD_PCIE_IO_PHYS_BASE 0xf2000000
|
||||
|
@ -117,7 +117,7 @@ static void __init pcie0_ioresources_init(struct pcie_port *pp)
|
||||
* IORESOURCE_IO
|
||||
*/
|
||||
pp->res[0].name = "PCIe 0 I/O Space";
|
||||
pp->res[0].start = KIRKWOOD_PCIE_IO_PHYS_BASE;
|
||||
pp->res[0].start = KIRKWOOD_PCIE_IO_BUS_BASE;
|
||||
pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1;
|
||||
pp->res[0].flags = IORESOURCE_IO;
|
||||
|
||||
@ -139,7 +139,7 @@ static void __init pcie1_ioresources_init(struct pcie_port *pp)
|
||||
* IORESOURCE_IO
|
||||
*/
|
||||
pp->res[0].name = "PCIe 1 I/O Space";
|
||||
pp->res[0].start = KIRKWOOD_PCIE1_IO_PHYS_BASE;
|
||||
pp->res[0].start = KIRKWOOD_PCIE1_IO_BUS_BASE;
|
||||
pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE1_IO_SIZE - 1;
|
||||
pp->res[0].flags = IORESOURCE_IO;
|
||||
|
||||
|
@ -9,6 +9,8 @@
|
||||
#ifndef __ASM_MACH_SYSTEM_H
|
||||
#define __ASM_MACH_SYSTEM_H
|
||||
|
||||
#include <mach/cputype.h>
|
||||
|
||||
static inline void arch_idle(void)
|
||||
{
|
||||
cpu_do_idle();
|
||||
@ -16,6 +18,9 @@ static inline void arch_idle(void)
|
||||
|
||||
static inline void arch_reset(char mode, const char *cmd)
|
||||
{
|
||||
cpu_reset(0);
|
||||
if (cpu_is_pxa168())
|
||||
cpu_reset(0xffff0000);
|
||||
else
|
||||
cpu_reset(0);
|
||||
}
|
||||
#endif /* __ASM_MACH_SYSTEM_H */
|
||||
|
@ -312,8 +312,7 @@ static int pxa_set_target(struct cpufreq_policy *policy,
|
||||
freqs.cpu = policy->cpu;
|
||||
|
||||
if (freq_debug)
|
||||
pr_debug(KERN_INFO "Changing CPU frequency to %d Mhz, "
|
||||
"(SDRAM %d Mhz)\n",
|
||||
pr_debug("Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n",
|
||||
freqs.new / 1000, (pxa_freq_settings[idx].div2) ?
|
||||
(new_freq_mem / 2000) : (new_freq_mem / 1000));
|
||||
|
||||
|
@ -264,23 +264,35 @@
|
||||
* <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x
|
||||
* == 0x3 for pxa300/pxa310/pxa320
|
||||
*/
|
||||
#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
|
||||
#define __cpu_is_pxa2xx(id) \
|
||||
({ \
|
||||
unsigned int _id = (id) >> 13 & 0x7; \
|
||||
_id <= 0x2; \
|
||||
})
|
||||
#else
|
||||
#define __cpu_is_pxa2xx(id) (0)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PXA3xx
|
||||
#define __cpu_is_pxa3xx(id) \
|
||||
({ \
|
||||
unsigned int _id = (id) >> 13 & 0x7; \
|
||||
_id == 0x3; \
|
||||
})
|
||||
#else
|
||||
#define __cpu_is_pxa3xx(id) (0)
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_CPU_PXA930) || defined(CONFIG_CPU_PXA935)
|
||||
#define __cpu_is_pxa93x(id) \
|
||||
({ \
|
||||
unsigned int _id = (id) >> 4 & 0xfff; \
|
||||
_id == 0x683 || _id == 0x693; \
|
||||
})
|
||||
#else
|
||||
#define __cpu_is_pxa93x(id) (0)
|
||||
#endif
|
||||
|
||||
#define cpu_is_pxa2xx() \
|
||||
({ \
|
||||
|
@ -469,9 +469,13 @@ static struct i2c_board_info __initdata palm27x_pi2c_board_info[] = {
|
||||
},
|
||||
};
|
||||
|
||||
static struct i2c_pxa_platform_data palm27x_i2c_power_info = {
|
||||
.use_pio = 1,
|
||||
};
|
||||
|
||||
void __init palm27x_pmic_init(void)
|
||||
{
|
||||
i2c_register_board_info(1, ARRAY_AND_SIZE(palm27x_pi2c_board_info));
|
||||
pxa27x_set_i2c_power_info(NULL);
|
||||
pxa27x_set_i2c_power_info(&palm27x_i2c_power_info);
|
||||
}
|
||||
#endif
|
||||
|
@ -240,6 +240,7 @@ static void __init vpac270_onenand_init(void) {}
|
||||
#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
|
||||
static struct pxamci_platform_data vpac270_mci_platform_data = {
|
||||
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
|
||||
.gpio_power = -1,
|
||||
.gpio_card_detect = GPIO53_VPAC270_SD_DETECT_N,
|
||||
.gpio_card_ro = GPIO52_VPAC270_SD_READONLY,
|
||||
.detect_delay_ms = 200,
|
||||
|
@ -19,6 +19,7 @@
|
||||
#include <linux/sysdev.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/sched.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
@ -19,6 +19,7 @@
|
||||
#include <linux/sysdev.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/sched.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
@ -21,6 +21,7 @@
|
||||
#include <linux/sysdev.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/sched.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
@ -173,11 +173,6 @@ static int s5pv210_clk_ip3_ctrl(struct clk *clk, int enable)
|
||||
return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable);
|
||||
}
|
||||
|
||||
static int s5pv210_clk_ip4_ctrl(struct clk *clk, int enable)
|
||||
{
|
||||
return s5p_gatectrl(S5P_CLKGATE_IP4, clk, enable);
|
||||
}
|
||||
|
||||
static int s5pv210_clk_mask0_ctrl(struct clk *clk, int enable)
|
||||
{
|
||||
return s5p_gatectrl(S5P_CLK_SRC_MASK0, clk, enable);
|
||||
|
@ -19,6 +19,7 @@
|
||||
#include <linux/io.h>
|
||||
#include <linux/sysdev.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/sched.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
@ -273,6 +273,9 @@ extern void gpio_pullup(unsigned gpio, int value);
|
||||
extern int gpio_get_value(unsigned gpio);
|
||||
extern void gpio_set_value(unsigned gpio, int value);
|
||||
|
||||
#define gpio_get_value_cansleep gpio_get_value
|
||||
#define gpio_set_value_cansleep gpio_set_value
|
||||
|
||||
/* wrappers to sleep-enable the previous two functions */
|
||||
static inline unsigned gpio_to_irq(unsigned gpio)
|
||||
{
|
||||
|
@ -68,7 +68,7 @@ static void __init ct_ca9x4_init_irq(void)
|
||||
}
|
||||
|
||||
#if 0
|
||||
static void ct_ca9x4_timer_init(void)
|
||||
static void __init ct_ca9x4_timer_init(void)
|
||||
{
|
||||
writel(0, MMIO_P2V(CT_CA9X4_TIMER0) + TIMER_CTRL);
|
||||
writel(0, MMIO_P2V(CT_CA9X4_TIMER1) + TIMER_CTRL);
|
||||
@ -222,12 +222,18 @@ static struct platform_device pmu_device = {
|
||||
.resource = pmu_resources,
|
||||
};
|
||||
|
||||
static void ct_ca9x4_init(void)
|
||||
static void __init ct_ca9x4_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
l2x0_init(MMIO_P2V(CT_CA9X4_L2CC), 0x00000000, 0xfe0fffff);
|
||||
void __iomem *l2x0_base = MMIO_P2V(CT_CA9X4_L2CC);
|
||||
|
||||
/* set RAM latencies to 1 cycle for this core tile. */
|
||||
writel(0, l2x0_base + L2X0_TAG_LATENCY_CTRL);
|
||||
writel(0, l2x0_base + L2X0_DATA_LATENCY_CTRL);
|
||||
|
||||
l2x0_init(l2x0_base, 0x00400000, 0xfe0fffff);
|
||||
#endif
|
||||
|
||||
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
|
||||
|
@ -48,7 +48,7 @@ void __init v2m_map_io(struct map_desc *tile, size_t num)
|
||||
}
|
||||
|
||||
|
||||
static void v2m_timer_init(void)
|
||||
static void __init v2m_timer_init(void)
|
||||
{
|
||||
writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL);
|
||||
writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL);
|
||||
|
@ -885,8 +885,23 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
|
||||
|
||||
if (ai_usermode & UM_SIGNAL)
|
||||
force_sig(SIGBUS, current);
|
||||
else
|
||||
set_cr(cr_no_alignment);
|
||||
else {
|
||||
/*
|
||||
* We're about to disable the alignment trap and return to
|
||||
* user space. But if an interrupt occurs before actually
|
||||
* reaching user space, then the IRQ vector entry code will
|
||||
* notice that we were still in kernel space and therefore
|
||||
* the alignment trap won't be re-enabled in that case as it
|
||||
* is presumed to be always on from kernel space.
|
||||
* Let's prevent that race by disabling interrupts here (they
|
||||
* are disabled on the way back to user space anyway in
|
||||
* entry-common.S) and disable the alignment trap only if
|
||||
* there is no work pending for this thread.
|
||||
*/
|
||||
raw_local_irq_disable();
|
||||
if (!(current_thread_info()->flags & _TIF_WORK_MASK))
|
||||
set_cr(cr_no_alignment);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -204,8 +204,12 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
|
||||
/*
|
||||
* Don't allow RAM to be mapped - this causes problems with ARMv6+
|
||||
*/
|
||||
if (WARN_ON(pfn_valid(pfn)))
|
||||
return NULL;
|
||||
if (pfn_valid(pfn)) {
|
||||
printk(KERN_WARNING "BUG: Your driver calls ioremap() on system memory. This leads\n"
|
||||
KERN_WARNING "to architecturally unpredictable behaviour on ARMv6+, and ioremap()\n"
|
||||
KERN_WARNING "will fail in the next kernel release. Please fix your driver.\n");
|
||||
WARN_ON(1);
|
||||
}
|
||||
|
||||
type = get_mem_type(mtype);
|
||||
if (!type)
|
||||
|
@ -15,6 +15,7 @@
|
||||
#include <linux/nodemask.h>
|
||||
#include <linux/memblock.h>
|
||||
#include <linux/sort.h>
|
||||
#include <linux/fs.h>
|
||||
|
||||
#include <asm/cputype.h>
|
||||
#include <asm/sections.h>
|
||||
@ -246,6 +247,9 @@ static struct mem_type mem_types[] = {
|
||||
.domain = DOMAIN_USER,
|
||||
},
|
||||
[MT_MEMORY] = {
|
||||
.prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
|
||||
L_PTE_WRITE | L_PTE_EXEC,
|
||||
.prot_l1 = PMD_TYPE_TABLE,
|
||||
.prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
|
||||
.domain = DOMAIN_KERNEL,
|
||||
},
|
||||
@ -254,6 +258,9 @@ static struct mem_type mem_types[] = {
|
||||
.domain = DOMAIN_KERNEL,
|
||||
},
|
||||
[MT_MEMORY_NONCACHED] = {
|
||||
.prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
|
||||
L_PTE_WRITE | L_PTE_EXEC | L_PTE_MT_BUFFERABLE,
|
||||
.prot_l1 = PMD_TYPE_TABLE,
|
||||
.prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
|
||||
.domain = DOMAIN_KERNEL,
|
||||
},
|
||||
@ -411,9 +418,12 @@ static void __init build_mem_type_table(void)
|
||||
* Enable CPU-specific coherency if supported.
|
||||
* (Only available on XSC3 at the moment.)
|
||||
*/
|
||||
if (arch_is_coherent() && cpu_is_xsc3())
|
||||
if (arch_is_coherent() && cpu_is_xsc3()) {
|
||||
mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
|
||||
|
||||
mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
|
||||
mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
|
||||
mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;
|
||||
}
|
||||
/*
|
||||
* ARMv6 and above have extended page tables.
|
||||
*/
|
||||
@ -438,7 +448,9 @@ static void __init build_mem_type_table(void)
|
||||
mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S;
|
||||
mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED;
|
||||
mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
|
||||
mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
|
||||
mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
|
||||
mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -475,6 +487,8 @@ static void __init build_mem_type_table(void)
|
||||
mem_types[MT_LOW_VECTORS].prot_l1 |= ecc_mask;
|
||||
mem_types[MT_HIGH_VECTORS].prot_l1 |= ecc_mask;
|
||||
mem_types[MT_MEMORY].prot_sect |= ecc_mask | cp->pmd;
|
||||
mem_types[MT_MEMORY].prot_pte |= kern_pgprot;
|
||||
mem_types[MT_MEMORY_NONCACHED].prot_sect |= ecc_mask;
|
||||
mem_types[MT_ROM].prot_sect |= cp->pmd;
|
||||
|
||||
switch (cp->pmd) {
|
||||
@ -498,6 +512,19 @@ static void __init build_mem_type_table(void)
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
|
||||
pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
|
||||
unsigned long size, pgprot_t vma_prot)
|
||||
{
|
||||
if (!pfn_valid(pfn))
|
||||
return pgprot_noncached(vma_prot);
|
||||
else if (file->f_flags & O_SYNC)
|
||||
return pgprot_writecombine(vma_prot);
|
||||
return vma_prot;
|
||||
}
|
||||
EXPORT_SYMBOL(phys_mem_access_prot);
|
||||
#endif
|
||||
|
||||
#define vectors_base() (vectors_high() ? 0xffff0000 : 0)
|
||||
|
||||
static void __init *early_alloc(unsigned long sz)
|
||||
|
@ -186,13 +186,14 @@ cpu_v7_name:
|
||||
* It is assumed that:
|
||||
* - cache type register is implemented
|
||||
*/
|
||||
__v7_setup:
|
||||
__v7_ca9mp_setup:
|
||||
#ifdef CONFIG_SMP
|
||||
mrc p15, 0, r0, c1, c0, 1
|
||||
tst r0, #(1 << 6) @ SMP/nAMP mode enabled?
|
||||
orreq r0, r0, #(1 << 6) | (1 << 0) @ Enable SMP/nAMP mode and
|
||||
mcreq p15, 0, r0, c1, c0, 1 @ TLB ops broadcasting
|
||||
#endif
|
||||
__v7_setup:
|
||||
adr r12, __v7_setup_stack @ the local stack
|
||||
stmia r12, {r0-r5, r7, r9, r11, lr}
|
||||
bl v7_flush_dcache_all
|
||||
@ -201,11 +202,16 @@ __v7_setup:
|
||||
mrc p15, 0, r0, c0, c0, 0 @ read main ID register
|
||||
and r10, r0, #0xff000000 @ ARM?
|
||||
teq r10, #0x41000000
|
||||
bne 2f
|
||||
bne 3f
|
||||
and r5, r0, #0x00f00000 @ variant
|
||||
and r6, r0, #0x0000000f @ revision
|
||||
orr r0, r6, r5, lsr #20-4 @ combine variant and revision
|
||||
orr r6, r6, r5, lsr #20-4 @ combine variant and revision
|
||||
ubfx r0, r0, #4, #12 @ primary part number
|
||||
|
||||
/* Cortex-A8 Errata */
|
||||
ldr r10, =0x00000c08 @ Cortex-A8 primary part number
|
||||
teq r0, r10
|
||||
bne 2f
|
||||
#ifdef CONFIG_ARM_ERRATA_430973
|
||||
teq r5, #0x00100000 @ only present in r1p*
|
||||
mrceq p15, 0, r10, c1, c0, 1 @ read aux control register
|
||||
@ -213,21 +219,50 @@ __v7_setup:
|
||||
mcreq p15, 0, r10, c1, c0, 1 @ write aux control register
|
||||
#endif
|
||||
#ifdef CONFIG_ARM_ERRATA_458693
|
||||
teq r0, #0x20 @ only present in r2p0
|
||||
teq r6, #0x20 @ only present in r2p0
|
||||
mrceq p15, 0, r10, c1, c0, 1 @ read aux control register
|
||||
orreq r10, r10, #(1 << 5) @ set L1NEON to 1
|
||||
orreq r10, r10, #(1 << 9) @ set PLDNOP to 1
|
||||
mcreq p15, 0, r10, c1, c0, 1 @ write aux control register
|
||||
#endif
|
||||
#ifdef CONFIG_ARM_ERRATA_460075
|
||||
teq r0, #0x20 @ only present in r2p0
|
||||
teq r6, #0x20 @ only present in r2p0
|
||||
mrceq p15, 1, r10, c9, c0, 2 @ read L2 cache aux ctrl register
|
||||
tsteq r10, #1 << 22
|
||||
orreq r10, r10, #(1 << 22) @ set the Write Allocate disable bit
|
||||
mcreq p15, 1, r10, c9, c0, 2 @ write the L2 cache aux ctrl register
|
||||
#endif
|
||||
b 3f
|
||||
|
||||
2: mov r10, #0
|
||||
/* Cortex-A9 Errata */
|
||||
2: ldr r10, =0x00000c09 @ Cortex-A9 primary part number
|
||||
teq r0, r10
|
||||
bne 3f
|
||||
#ifdef CONFIG_ARM_ERRATA_742230
|
||||
cmp r6, #0x22 @ only present up to r2p2
|
||||
mrcle p15, 0, r10, c15, c0, 1 @ read diagnostic register
|
||||
orrle r10, r10, #1 << 4 @ set bit #4
|
||||
mcrle p15, 0, r10, c15, c0, 1 @ write diagnostic register
|
||||
#endif
|
||||
#ifdef CONFIG_ARM_ERRATA_742231
|
||||
teq r6, #0x20 @ present in r2p0
|
||||
teqne r6, #0x21 @ present in r2p1
|
||||
teqne r6, #0x22 @ present in r2p2
|
||||
mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register
|
||||
orreq r10, r10, #1 << 12 @ set bit #12
|
||||
orreq r10, r10, #1 << 22 @ set bit #22
|
||||
mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
|
||||
#endif
|
||||
#ifdef CONFIG_ARM_ERRATA_743622
|
||||
teq r6, #0x20 @ present in r2p0
|
||||
teqne r6, #0x21 @ present in r2p1
|
||||
teqne r6, #0x22 @ present in r2p2
|
||||
mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register
|
||||
orreq r10, r10, #1 << 6 @ set bit #6
|
||||
mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
|
||||
#endif
|
||||
|
||||
3: mov r10, #0
|
||||
#ifdef HARVARD_CACHE
|
||||
mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate
|
||||
#endif
|
||||
@ -323,6 +358,29 @@ cpu_elf_name:
|
||||
|
||||
.section ".proc.info.init", #alloc, #execinstr
|
||||
|
||||
.type __v7_ca9mp_proc_info, #object
|
||||
__v7_ca9mp_proc_info:
|
||||
.long 0x410fc090 @ Required ID value
|
||||
.long 0xff0ffff0 @ Mask for ID
|
||||
.long PMD_TYPE_SECT | \
|
||||
PMD_SECT_AP_WRITE | \
|
||||
PMD_SECT_AP_READ | \
|
||||
PMD_FLAGS
|
||||
.long PMD_TYPE_SECT | \
|
||||
PMD_SECT_XN | \
|
||||
PMD_SECT_AP_WRITE | \
|
||||
PMD_SECT_AP_READ
|
||||
b __v7_ca9mp_setup
|
||||
.long cpu_arch_name
|
||||
.long cpu_elf_name
|
||||
.long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS
|
||||
.long cpu_v7_name
|
||||
.long v7_processor_functions
|
||||
.long v7wbi_tlb_fns
|
||||
.long v6_user_fns
|
||||
.long v7_cache_fns
|
||||
.size __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info
|
||||
|
||||
/*
|
||||
* Match any ARMv7 processor core.
|
||||
*/
|
||||
|
@ -102,6 +102,7 @@ static int op_create_counter(int cpu, int event)
|
||||
if (IS_ERR(pevent)) {
|
||||
ret = PTR_ERR(pevent);
|
||||
} else if (pevent->state != PERF_EVENT_STATE_ACTIVE) {
|
||||
perf_event_release_kernel(pevent);
|
||||
pr_warning("oprofile: failed to enable event %d "
|
||||
"on CPU %d\n", event, cpu);
|
||||
ret = -EBUSY;
|
||||
@ -365,6 +366,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
|
||||
ret = init_driverfs();
|
||||
if (ret) {
|
||||
kfree(counter_config);
|
||||
counter_config = NULL;
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -402,7 +404,6 @@ void oprofile_arch_exit(void)
|
||||
struct perf_event *event;
|
||||
|
||||
if (*perf_events) {
|
||||
exit_driverfs();
|
||||
for_each_possible_cpu(cpu) {
|
||||
for (id = 0; id < perf_num_counters; ++id) {
|
||||
event = perf_events[cpu][id];
|
||||
@ -413,8 +414,10 @@ void oprofile_arch_exit(void)
|
||||
}
|
||||
}
|
||||
|
||||
if (counter_config)
|
||||
if (counter_config) {
|
||||
kfree(counter_config);
|
||||
exit_driverfs();
|
||||
}
|
||||
}
|
||||
#else
|
||||
int __init oprofile_arch_init(struct oprofile_operations *ops)
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* linux/arch/arm/mach-nomadik/timer.c
|
||||
* linux/arch/arm/plat-nomadik/timer.c
|
||||
*
|
||||
* Copyright (C) 2008 STMicroelectronics
|
||||
* Copyright (C) 2010 Alessandro Rubini
|
||||
@ -75,7 +75,7 @@ static void nmdk_clkevt_mode(enum clock_event_mode mode,
|
||||
cr = readl(mtu_base + MTU_CR(1));
|
||||
writel(0, mtu_base + MTU_LR(1));
|
||||
writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(1));
|
||||
writel(0x2, mtu_base + MTU_IMSC);
|
||||
writel(1 << 1, mtu_base + MTU_IMSC);
|
||||
break;
|
||||
case CLOCK_EVT_MODE_SHUTDOWN:
|
||||
case CLOCK_EVT_MODE_UNUSED:
|
||||
@ -131,25 +131,23 @@ void __init nmdk_timer_init(void)
|
||||
{
|
||||
unsigned long rate;
|
||||
struct clk *clk0;
|
||||
struct clk *clk1;
|
||||
u32 cr;
|
||||
u32 cr = MTU_CRn_32BITS;
|
||||
|
||||
clk0 = clk_get_sys("mtu0", NULL);
|
||||
BUG_ON(IS_ERR(clk0));
|
||||
|
||||
clk1 = clk_get_sys("mtu1", NULL);
|
||||
BUG_ON(IS_ERR(clk1));
|
||||
|
||||
clk_enable(clk0);
|
||||
clk_enable(clk1);
|
||||
|
||||
/*
|
||||
* Tick rate is 2.4MHz for Nomadik and 110MHz for ux500:
|
||||
* use a divide-by-16 counter if it's more than 16MHz
|
||||
* Tick rate is 2.4MHz for Nomadik and 2.4Mhz, 100MHz or 133 MHz
|
||||
* for ux500.
|
||||
* Use a divide-by-16 counter if the tick rate is more than 32MHz.
|
||||
* At 32 MHz, the timer (with 32 bit counter) can be programmed
|
||||
* to wake-up at a max 127s a head in time. Dividing a 2.4 MHz timer
|
||||
* with 16 gives too low timer resolution.
|
||||
*/
|
||||
cr = MTU_CRn_32BITS;;
|
||||
rate = clk_get_rate(clk0);
|
||||
if (rate > 16 << 20) {
|
||||
if (rate > 32000000) {
|
||||
rate /= 16;
|
||||
cr |= MTU_CRn_PRESCALE_16;
|
||||
} else {
|
||||
@ -170,15 +168,8 @@ void __init nmdk_timer_init(void)
|
||||
pr_err("timer: failed to initialize clock source %s\n",
|
||||
nmdk_clksrc.name);
|
||||
|
||||
/* Timer 1 is used for events, fix according to rate */
|
||||
cr = MTU_CRn_32BITS;
|
||||
rate = clk_get_rate(clk1);
|
||||
if (rate > 16 << 20) {
|
||||
rate /= 16;
|
||||
cr |= MTU_CRn_PRESCALE_16;
|
||||
} else {
|
||||
cr |= MTU_CRn_PRESCALE_1;
|
||||
}
|
||||
/* Timer 1 is used for events */
|
||||
|
||||
clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE);
|
||||
|
||||
writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */
|
||||
|
@ -33,7 +33,7 @@ config OMAP_DEBUG_DEVICES
|
||||
config OMAP_DEBUG_LEDS
|
||||
bool
|
||||
depends on OMAP_DEBUG_DEVICES
|
||||
default y if LEDS
|
||||
default y if LEDS_CLASS
|
||||
|
||||
config OMAP_RESET_CLOCKS
|
||||
bool "Reset unused clocks during boot"
|
||||
|
@ -320,6 +320,7 @@ void flush_iotlb_page(struct iommu *obj, u32 da)
|
||||
if ((start <= da) && (da < start + bytes)) {
|
||||
dev_dbg(obj->dev, "%s: %08x<=%08x(%x)\n",
|
||||
__func__, start, da, bytes);
|
||||
iotlb_load_cr(obj, &cr);
|
||||
iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
|
||||
}
|
||||
}
|
||||
|
@ -156,7 +156,7 @@ static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
|
||||
/* Writing zero to RSYNC_ERR clears the IRQ */
|
||||
MCBSP_WRITE(mcbsp_rx, SPCR1, MCBSP_READ_CACHE(mcbsp_rx, SPCR1));
|
||||
} else {
|
||||
complete(&mcbsp_rx->tx_irq_completion);
|
||||
complete(&mcbsp_rx->rx_irq_completion);
|
||||
}
|
||||
|
||||
return IRQ_HANDLED;
|
||||
|
@ -220,20 +220,7 @@ void __init omap_map_sram(void)
|
||||
if (omap_sram_size == 0)
|
||||
return;
|
||||
|
||||
if (cpu_is_omap24xx()) {
|
||||
omap_sram_io_desc[0].virtual = OMAP2_SRAM_VA;
|
||||
|
||||
base = OMAP2_SRAM_PA;
|
||||
base = ROUND_DOWN(base, PAGE_SIZE);
|
||||
omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
|
||||
}
|
||||
|
||||
if (cpu_is_omap34xx()) {
|
||||
omap_sram_io_desc[0].virtual = OMAP3_SRAM_VA;
|
||||
base = OMAP3_SRAM_PA;
|
||||
base = ROUND_DOWN(base, PAGE_SIZE);
|
||||
omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
|
||||
|
||||
/*
|
||||
* SRAM must be marked as non-cached on OMAP3 since the
|
||||
* CORE DPLL M2 divider change code (in SRAM) runs with the
|
||||
@ -244,13 +231,11 @@ void __init omap_map_sram(void)
|
||||
omap_sram_io_desc[0].type = MT_MEMORY_NONCACHED;
|
||||
}
|
||||
|
||||
if (cpu_is_omap44xx()) {
|
||||
omap_sram_io_desc[0].virtual = OMAP4_SRAM_VA;
|
||||
base = OMAP4_SRAM_PA;
|
||||
base = ROUND_DOWN(base, PAGE_SIZE);
|
||||
omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
|
||||
}
|
||||
omap_sram_io_desc[0].length = 1024 * 1024; /* Use section desc */
|
||||
omap_sram_io_desc[0].virtual = omap_sram_base;
|
||||
base = omap_sram_start;
|
||||
base = ROUND_DOWN(base, PAGE_SIZE);
|
||||
omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
|
||||
omap_sram_io_desc[0].length = ROUND_DOWN(omap_sram_size, PAGE_SIZE);
|
||||
iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
|
||||
|
||||
printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n",
|
||||
|
@ -435,7 +435,6 @@ static int s3c_adc_suspend(struct platform_device *pdev, pm_message_t state)
|
||||
static int s3c_adc_resume(struct platform_device *pdev)
|
||||
{
|
||||
struct adc_device *adc = platform_get_drvdata(pdev);
|
||||
unsigned long flags;
|
||||
|
||||
clk_enable(adc->clk);
|
||||
enable_irq(adc->irq);
|
||||
|
@ -48,6 +48,9 @@
|
||||
#include <plat/clock.h>
|
||||
#include <plat/cpu.h>
|
||||
|
||||
#include <linux/serial_core.h>
|
||||
#include <plat/regs-serial.h> /* for s3c24xx_uart_devs */
|
||||
|
||||
/* clock information */
|
||||
|
||||
static LIST_HEAD(clocks);
|
||||
@ -65,6 +68,28 @@ static int clk_null_enable(struct clk *clk, int enable)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dev_is_s3c_uart(struct device *dev)
|
||||
{
|
||||
struct platform_device **pdev = s3c24xx_uart_devs;
|
||||
int i;
|
||||
for (i = 0; i < ARRAY_SIZE(s3c24xx_uart_devs); i++, pdev++)
|
||||
if (*pdev && dev == &(*pdev)->dev)
|
||||
return 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Serial drivers call get_clock() very early, before platform bus
|
||||
* has been set up, this requires a special check to let them get
|
||||
* a proper clock
|
||||
*/
|
||||
|
||||
static int dev_is_platform_device(struct device *dev)
|
||||
{
|
||||
return dev->bus == &platform_bus_type ||
|
||||
(dev->bus == NULL && dev_is_s3c_uart(dev));
|
||||
}
|
||||
|
||||
/* Clock API calls */
|
||||
|
||||
struct clk *clk_get(struct device *dev, const char *id)
|
||||
@ -73,7 +98,7 @@ struct clk *clk_get(struct device *dev, const char *id)
|
||||
struct clk *clk = ERR_PTR(-ENOENT);
|
||||
int idno;
|
||||
|
||||
if (dev == NULL || dev->bus != &platform_bus_type)
|
||||
if (dev == NULL || !dev_is_platform_device(dev))
|
||||
idno = -1;
|
||||
else
|
||||
idno = to_platform_device(dev)->id;
|
||||
|
@ -314,10 +314,9 @@ int module_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs,
|
||||
vfree(module->arch.syminfo);
|
||||
module->arch.syminfo = NULL;
|
||||
|
||||
return module_bug_finalize(hdr, sechdrs, module);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void module_arch_cleanup(struct module *module)
|
||||
{
|
||||
module_bug_cleanup(module);
|
||||
}
|
||||
|
@ -112,10 +112,9 @@ int module_finalize(const Elf_Ehdr *hdr,
|
||||
const Elf_Shdr *sechdrs,
|
||||
struct module *me)
|
||||
{
|
||||
return module_bug_finalize(hdr, sechdrs, me);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void module_arch_cleanup(struct module *mod)
|
||||
{
|
||||
module_bug_cleanup(mod);
|
||||
}
|
||||
|
@ -82,9 +82,9 @@ typedef elf_fpreg_t elf_fpregset_t;
|
||||
* These are used to set parameters in the core dumps.
|
||||
*/
|
||||
#define ELF_CLASS ELFCLASS32
|
||||
#if defined(__LITTLE_ENDIAN)
|
||||
#if defined(__LITTLE_ENDIAN__)
|
||||
#define ELF_DATA ELFDATA2LSB
|
||||
#elif defined(__BIG_ENDIAN)
|
||||
#elif defined(__BIG_ENDIAN__)
|
||||
#define ELF_DATA ELFDATA2MSB
|
||||
#else
|
||||
#error no endian defined
|
||||
|
1
arch/m32r/kernel/.gitignore
vendored
Normal file
1
arch/m32r/kernel/.gitignore
vendored
Normal file
@ -0,0 +1 @@
|
||||
vmlinux.lds
|
@ -28,6 +28,8 @@
|
||||
|
||||
#define DEBUG_SIG 0
|
||||
|
||||
#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
|
||||
|
||||
asmlinkage int
|
||||
sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
|
||||
unsigned long r2, unsigned long r3, unsigned long r4,
|
||||
@ -254,7 +256,7 @@ give_sigsegv:
|
||||
static int prev_insn(struct pt_regs *regs)
|
||||
{
|
||||
u16 inst;
|
||||
if (get_user(&inst, (u16 __user *)(regs->bpc - 2)))
|
||||
if (get_user(inst, (u16 __user *)(regs->bpc - 2)))
|
||||
return -EFAULT;
|
||||
if ((inst & 0xfff0) == 0x10f0) /* trap ? */
|
||||
regs->bpc -= 2;
|
||||
|
@ -162,7 +162,7 @@ static void mac_init_asc( void )
|
||||
void mac_mksound( unsigned int freq, unsigned int length )
|
||||
{
|
||||
__u32 cfreq = ( freq << 5 ) / 468;
|
||||
__u32 flags;
|
||||
unsigned long flags;
|
||||
int i;
|
||||
|
||||
if ( mac_special_bell == NULL )
|
||||
@ -224,7 +224,7 @@ static void mac_nosound( unsigned long ignored )
|
||||
*/
|
||||
static void mac_quadra_start_bell( unsigned int freq, unsigned int length, unsigned int volume )
|
||||
{
|
||||
__u32 flags;
|
||||
unsigned long flags;
|
||||
|
||||
/* if the bell is already ringing, ring longer */
|
||||
if ( mac_bell_duration > 0 )
|
||||
@ -271,7 +271,7 @@ static void mac_quadra_start_bell( unsigned int freq, unsigned int length, unsig
|
||||
static void mac_quadra_ring_bell( unsigned long ignored )
|
||||
{
|
||||
int i, count = mac_asc_samplespersec / HZ;
|
||||
__u32 flags;
|
||||
unsigned long flags;
|
||||
|
||||
/*
|
||||
* we neither want a sound buffer overflow nor underflow, so we need to match
|
||||
|
@ -13,6 +13,7 @@ config MIPS
|
||||
select HAVE_KPROBES
|
||||
select HAVE_KRETPROBES
|
||||
select RTC_LIB if !MACH_LOONGSON
|
||||
select GENERIC_ATOMIC64 if !64BIT
|
||||
|
||||
mainmenu "Linux/MIPS Kernel Configuration"
|
||||
|
||||
@ -1646,8 +1647,16 @@ config MIPS_MT_SMP
|
||||
select SYS_SUPPORTS_SMP
|
||||
select SMP_UP
|
||||
help
|
||||
This is a kernel model which is also known a VSMP or lately
|
||||
has been marketesed into SMVP.
|
||||
This is a kernel model which is known a VSMP but lately has been
|
||||
marketesed into SMVP.
|
||||
Virtual SMP uses the processor's VPEs to implement virtual
|
||||
processors. In currently available configuration of the 34K processor
|
||||
this allows for a dual processor. Both processors will share the same
|
||||
primary caches; each will obtain the half of the TLB for it's own
|
||||
exclusive use. For a layman this model can be described as similar to
|
||||
what Intel calls Hyperthreading.
|
||||
|
||||
For further information see http://www.linux-mips.org/wiki/34K#VSMP
|
||||
|
||||
config MIPS_MT_SMTC
|
||||
bool "SMTC: Use all TCs on all VPEs for SMP"
|
||||
@ -1664,6 +1673,14 @@ config MIPS_MT_SMTC
|
||||
help
|
||||
This is a kernel model which is known a SMTC or lately has been
|
||||
marketesed into SMVP.
|
||||
is presenting the available TC's of the core as processors to Linux.
|
||||
On currently available 34K processors this means a Linux system will
|
||||
see up to 5 processors. The implementation of the SMTC kernel differs
|
||||
significantly from VSMP and cannot efficiently coexist in the same
|
||||
kernel binary so the choice between VSMP and SMTC is a compile time
|
||||
decision.
|
||||
|
||||
For further information see http://www.linux-mips.org/wiki/34K#SMTC
|
||||
|
||||
endchoice
|
||||
|
||||
|
@ -43,7 +43,7 @@ int prom_argc;
|
||||
char **prom_argv;
|
||||
char **prom_envp;
|
||||
|
||||
void prom_init_cmdline(void)
|
||||
void __init prom_init_cmdline(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
@ -104,7 +104,7 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str)
|
||||
}
|
||||
}
|
||||
|
||||
int prom_get_ethernet_addr(char *ethernet_addr)
|
||||
int __init prom_get_ethernet_addr(char *ethernet_addr)
|
||||
{
|
||||
char *ethaddr_str;
|
||||
|
||||
@ -123,7 +123,6 @@ int prom_get_ethernet_addr(char *ethernet_addr)
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(prom_get_ethernet_addr);
|
||||
|
||||
void __init prom_free_prom_memory(void)
|
||||
{
|
||||
|
@ -59,7 +59,7 @@ $(obj)/piggy.o: $(obj)/dummy.o $(obj)/vmlinux.bin.z FORCE
|
||||
hostprogs-y := calc_vmlinuz_load_addr
|
||||
|
||||
VMLINUZ_LOAD_ADDRESS = $(shell $(obj)/calc_vmlinuz_load_addr \
|
||||
$(objtree)/$(KBUILD_IMAGE) $(VMLINUX_LOAD_ADDRESS))
|
||||
$(obj)/vmlinux.bin $(VMLINUX_LOAD_ADDRESS))
|
||||
|
||||
vmlinuzobjs-y += $(obj)/piggy.o
|
||||
|
||||
|
@ -83,3 +83,7 @@ config ARCH_SPARSEMEM_ENABLE
|
||||
def_bool y
|
||||
select SPARSEMEM_STATIC
|
||||
depends on CPU_CAVIUM_OCTEON
|
||||
|
||||
config CAVIUM_OCTEON_HELPER
|
||||
def_bool y
|
||||
depends on OCTEON_ETHERNET || PCI
|
||||
|
@ -41,7 +41,7 @@ static int cnmips_cu2_call(struct notifier_block *nfb, unsigned long action,
|
||||
return NOTIFY_OK; /* Let default notifier send signals */
|
||||
}
|
||||
|
||||
static int cnmips_cu2_setup(void)
|
||||
static int __init cnmips_cu2_setup(void)
|
||||
{
|
||||
return cu2_notifier(cnmips_cu2_call, 0);
|
||||
}
|
||||
|
@ -11,4 +11,4 @@
|
||||
|
||||
obj-y += cvmx-bootmem.o cvmx-l2c.o cvmx-sysinfo.o octeon-model.o
|
||||
|
||||
obj-$(CONFIG_PCI) += cvmx-helper-errata.o cvmx-helper-jtag.o
|
||||
obj-$(CONFIG_CAVIUM_OCTEON_HELPER) += cvmx-helper-errata.o cvmx-helper-jtag.o
|
||||
|
@ -782,6 +782,10 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
|
||||
*/
|
||||
#define atomic64_add_negative(i, v) (atomic64_add_return(i, (v)) < 0)
|
||||
|
||||
#else /* !CONFIG_64BIT */
|
||||
|
||||
#include <asm-generic/atomic64.h>
|
||||
|
||||
#endif /* CONFIG_64BIT */
|
||||
|
||||
/*
|
||||
|
@ -24,7 +24,7 @@ extern int cu2_notifier_call_chain(unsigned long val, void *v);
|
||||
|
||||
#define cu2_notifier(fn, pri) \
|
||||
({ \
|
||||
static struct notifier_block fn##_nb __cpuinitdata = { \
|
||||
static struct notifier_block fn##_nb = { \
|
||||
.notifier_call = fn, \
|
||||
.priority = pri \
|
||||
}; \
|
||||
|
@ -321,6 +321,7 @@ struct gic_intrmask_regs {
|
||||
*/
|
||||
struct gic_intr_map {
|
||||
unsigned int cpunum; /* Directed to this CPU */
|
||||
#define GIC_UNUSED 0xdead /* Dummy data */
|
||||
unsigned int pin; /* Directed to this Pin */
|
||||
unsigned int polarity; /* Polarity : +/- */
|
||||
unsigned int trigtype; /* Trigger : Edge/Levl */
|
||||
|
@ -1,6 +1,6 @@
|
||||
#ifndef __ASM_MACH_TX49XX_KMALLOC_H
|
||||
#define __ASM_MACH_TX49XX_KMALLOC_H
|
||||
|
||||
#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
|
||||
#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
|
||||
|
||||
#endif /* __ASM_MACH_TX49XX_KMALLOC_H */
|
||||
|
@ -88,9 +88,6 @@
|
||||
|
||||
#define GIC_EXT_INTR(x) x
|
||||
|
||||
/* Dummy data */
|
||||
#define X 0xdead
|
||||
|
||||
/* External Interrupts used for IPI */
|
||||
#define GIC_IPI_EXT_INTR_RESCHED_VPE0 16
|
||||
#define GIC_IPI_EXT_INTR_CALLFNC_VPE0 17
|
||||
|
@ -150,6 +150,20 @@ typedef struct { unsigned long pgprot; } pgprot_t;
|
||||
((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET)
|
||||
#endif
|
||||
#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET))
|
||||
|
||||
/*
|
||||
* RELOC_HIDE was originally added by 6007b903dfe5f1d13e0c711ac2894bdd4a61b1ad
|
||||
* (lmo) rsp. 8431fd094d625b94d364fe393076ccef88e6ce18 (kernel.org). The
|
||||
* discussion can be found in lkml posting
|
||||
* <a2ebde260608230500o3407b108hc03debb9da6e62c@mail.gmail.com> which is
|
||||
* archived at http://lists.linuxcoding.com/kernel/2006-q3/msg17360.html
|
||||
*
|
||||
* It is unclear if the misscompilations mentioned in
|
||||
* http://lkml.org/lkml/2010/8/8/138 also affect MIPS so we keep this one
|
||||
* until GCC 3.x has been retired before we can apply
|
||||
* https://patchwork.linux-mips.org/patch/1541/
|
||||
*/
|
||||
|
||||
#define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x), 0))
|
||||
|
||||
#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
|
||||
|
@ -88,6 +88,7 @@ typedef struct siginfo {
|
||||
#ifdef __ARCH_SI_TRAPNO
|
||||
int _trapno; /* TRAP # which caused the signal */
|
||||
#endif
|
||||
short _addr_lsb;
|
||||
} _sigfault;
|
||||
|
||||
/* SIGPOLL, SIGXFSZ (To do ...) */
|
||||
|
@ -146,7 +146,8 @@ register struct thread_info *__current_thread_info __asm__("$28");
|
||||
#define _TIF_LOAD_WATCH (1<<TIF_LOAD_WATCH)
|
||||
|
||||
/* work to do on interrupt/exception return */
|
||||
#define _TIF_WORK_MASK (0x0000ffef & ~_TIF_SECCOMP)
|
||||
#define _TIF_WORK_MASK (0x0000ffef & \
|
||||
~(_TIF_SECCOMP | _TIF_SYSCALL_AUDIT))
|
||||
/* work to do on any return to u-space */
|
||||
#define _TIF_ALLWORK_MASK (0x8000ffff & ~_TIF_SECCOMP)
|
||||
|
||||
|
@ -356,16 +356,19 @@
|
||||
#define __NR_perf_event_open (__NR_Linux + 333)
|
||||
#define __NR_accept4 (__NR_Linux + 334)
|
||||
#define __NR_recvmmsg (__NR_Linux + 335)
|
||||
#define __NR_fanotify_init (__NR_Linux + 336)
|
||||
#define __NR_fanotify_mark (__NR_Linux + 337)
|
||||
#define __NR_prlimit64 (__NR_Linux + 338)
|
||||
|
||||
/*
|
||||
* Offset of the last Linux o32 flavoured syscall
|
||||
*/
|
||||
#define __NR_Linux_syscalls 335
|
||||
#define __NR_Linux_syscalls 338
|
||||
|
||||
#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
|
||||
|
||||
#define __NR_O32_Linux 4000
|
||||
#define __NR_O32_Linux_syscalls 335
|
||||
#define __NR_O32_Linux_syscalls 338
|
||||
|
||||
#if _MIPS_SIM == _MIPS_SIM_ABI64
|
||||
|
||||
@ -668,16 +671,19 @@
|
||||
#define __NR_perf_event_open (__NR_Linux + 292)
|
||||
#define __NR_accept4 (__NR_Linux + 293)
|
||||
#define __NR_recvmmsg (__NR_Linux + 294)
|
||||
#define __NR_fanotify_init (__NR_Linux + 295)
|
||||
#define __NR_fanotify_mark (__NR_Linux + 296)
|
||||
#define __NR_prlimit64 (__NR_Linux + 297)
|
||||
|
||||
/*
|
||||
* Offset of the last Linux 64-bit flavoured syscall
|
||||
*/
|
||||
#define __NR_Linux_syscalls 294
|
||||
#define __NR_Linux_syscalls 297
|
||||
|
||||
#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
|
||||
|
||||
#define __NR_64_Linux 5000
|
||||
#define __NR_64_Linux_syscalls 294
|
||||
#define __NR_64_Linux_syscalls 297
|
||||
|
||||
#if _MIPS_SIM == _MIPS_SIM_NABI32
|
||||
|
||||
@ -985,16 +991,19 @@
|
||||
#define __NR_accept4 (__NR_Linux + 297)
|
||||
#define __NR_recvmmsg (__NR_Linux + 298)
|
||||
#define __NR_getdents64 (__NR_Linux + 299)
|
||||
#define __NR_fanotify_init (__NR_Linux + 300)
|
||||
#define __NR_fanotify_mark (__NR_Linux + 301)
|
||||
#define __NR_prlimit64 (__NR_Linux + 302)
|
||||
|
||||
/*
|
||||
* Offset of the last N32 flavoured syscall
|
||||
*/
|
||||
#define __NR_Linux_syscalls 299
|
||||
#define __NR_Linux_syscalls 302
|
||||
|
||||
#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
|
||||
|
||||
#define __NR_N32_Linux 6000
|
||||
#define __NR_N32_Linux_syscalls 299
|
||||
#define __NR_N32_Linux_syscalls 302
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
|
@ -7,7 +7,6 @@
|
||||
#include <asm/io.h>
|
||||
#include <asm/gic.h>
|
||||
#include <asm/gcmpregs.h>
|
||||
#include <asm/mips-boards/maltaint.h>
|
||||
#include <asm/irq.h>
|
||||
#include <linux/hardirq.h>
|
||||
#include <asm-generic/bitops/find.h>
|
||||
@ -131,7 +130,7 @@ static int gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
|
||||
int i;
|
||||
|
||||
irq -= _irqbase;
|
||||
pr_debug(KERN_DEBUG "%s(%d) called\n", __func__, irq);
|
||||
pr_debug("%s(%d) called\n", __func__, irq);
|
||||
cpumask_and(&tmp, cpumask, cpu_online_mask);
|
||||
if (cpus_empty(tmp))
|
||||
return -1;
|
||||
@ -222,7 +221,7 @@ static void __init gic_basic_init(int numintrs, int numvpes,
|
||||
/* Setup specifics */
|
||||
for (i = 0; i < mapsize; i++) {
|
||||
cpu = intrmap[i].cpunum;
|
||||
if (cpu == X)
|
||||
if (cpu == GIC_UNUSED)
|
||||
continue;
|
||||
if (cpu == 0 && i != 0 && intrmap[i].flags == 0)
|
||||
continue;
|
||||
|
@ -283,7 +283,7 @@ static int kgdb_mips_notify(struct notifier_block *self, unsigned long cmd,
|
||||
struct pt_regs *regs = args->regs;
|
||||
int trap = (regs->cp0_cause & 0x7c) >> 2;
|
||||
|
||||
/* Userpace events, ignore. */
|
||||
/* Userspace events, ignore. */
|
||||
if (user_mode(regs))
|
||||
return NOTIFY_DONE;
|
||||
|
||||
|
@ -251,7 +251,7 @@ void sp_work_handle_request(void)
|
||||
memset(&tz, 0, sizeof(tz));
|
||||
if ((ret.retval = sp_syscall(__NR_gettimeofday, (int)&tv,
|
||||
(int)&tz, 0, 0)) == 0)
|
||||
ret.retval = tv.tv_sec;
|
||||
ret.retval = tv.tv_sec;
|
||||
break;
|
||||
|
||||
case MTSP_SYSCALL_EXIT:
|
||||
|
@ -341,3 +341,10 @@ asmlinkage long sys32_lookup_dcookie(u32 a0, u32 a1, char __user *buf,
|
||||
{
|
||||
return sys_lookup_dcookie(merge_64(a0, a1), buf, len);
|
||||
}
|
||||
|
||||
SYSCALL_DEFINE6(32_fanotify_mark, int, fanotify_fd, unsigned int, flags,
|
||||
u64, a3, u64, a4, int, dfd, const char __user *, pathname)
|
||||
{
|
||||
return sys_fanotify_mark(fanotify_fd, flags, merge_64(a3, a4),
|
||||
dfd, pathname);
|
||||
}
|
||||
|
@ -583,7 +583,10 @@ einval: li v0, -ENOSYS
|
||||
sys sys_rt_tgsigqueueinfo 4
|
||||
sys sys_perf_event_open 5
|
||||
sys sys_accept4 4
|
||||
sys sys_recvmmsg 5
|
||||
sys sys_recvmmsg 5 /* 4335 */
|
||||
sys sys_fanotify_init 2
|
||||
sys sys_fanotify_mark 6
|
||||
sys sys_prlimit64 4
|
||||
.endm
|
||||
|
||||
/* We pre-compute the number of _instruction_ bytes needed to
|
||||
|
@ -416,9 +416,12 @@ sys_call_table:
|
||||
PTR sys_pipe2
|
||||
PTR sys_inotify_init1
|
||||
PTR sys_preadv
|
||||
PTR sys_pwritev /* 5390 */
|
||||
PTR sys_pwritev /* 5290 */
|
||||
PTR sys_rt_tgsigqueueinfo
|
||||
PTR sys_perf_event_open
|
||||
PTR sys_accept4
|
||||
PTR sys_recvmmsg
|
||||
PTR sys_recvmmsg
|
||||
PTR sys_fanotify_init /* 5295 */
|
||||
PTR sys_fanotify_mark
|
||||
PTR sys_prlimit64
|
||||
.size sys_call_table,.-sys_call_table
|
||||
|
@ -419,5 +419,8 @@ EXPORT(sysn32_call_table)
|
||||
PTR sys_perf_event_open
|
||||
PTR sys_accept4
|
||||
PTR compat_sys_recvmmsg
|
||||
PTR sys_getdents
|
||||
PTR sys_getdents64
|
||||
PTR sys_fanotify_init /* 6300 */
|
||||
PTR sys_fanotify_mark
|
||||
PTR sys_prlimit64
|
||||
.size sysn32_call_table,.-sysn32_call_table
|
||||
|
@ -538,5 +538,8 @@ sys_call_table:
|
||||
PTR compat_sys_rt_tgsigqueueinfo
|
||||
PTR sys_perf_event_open
|
||||
PTR sys_accept4
|
||||
PTR compat_sys_recvmmsg
|
||||
PTR compat_sys_recvmmsg /* 4335 */
|
||||
PTR sys_fanotify_init
|
||||
PTR sys_32_fanotify_mark
|
||||
PTR sys_prlimit64
|
||||
.size sys_call_table,.-sys_call_table
|
||||
|
@ -44,27 +44,39 @@ static inline int cpu_is_noncoherent_r10000(struct device *dev)
|
||||
|
||||
static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
|
||||
{
|
||||
gfp_t dma_flag;
|
||||
|
||||
/* ignore region specifiers */
|
||||
gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
|
||||
|
||||
#ifdef CONFIG_ZONE_DMA
|
||||
#ifdef CONFIG_ISA
|
||||
if (dev == NULL)
|
||||
gfp |= __GFP_DMA;
|
||||
else if (dev->coherent_dma_mask < DMA_BIT_MASK(24))
|
||||
gfp |= __GFP_DMA;
|
||||
dma_flag = __GFP_DMA;
|
||||
else
|
||||
#endif
|
||||
#ifdef CONFIG_ZONE_DMA32
|
||||
#if defined(CONFIG_ZONE_DMA32) && defined(CONFIG_ZONE_DMA)
|
||||
if (dev->coherent_dma_mask < DMA_BIT_MASK(32))
|
||||
gfp |= __GFP_DMA32;
|
||||
dma_flag = __GFP_DMA;
|
||||
else if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
|
||||
dma_flag = __GFP_DMA32;
|
||||
else
|
||||
#endif
|
||||
;
|
||||
#if defined(CONFIG_ZONE_DMA32) && !defined(CONFIG_ZONE_DMA)
|
||||
if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
|
||||
dma_flag = __GFP_DMA32;
|
||||
else
|
||||
#endif
|
||||
#if defined(CONFIG_ZONE_DMA) && !defined(CONFIG_ZONE_DMA32)
|
||||
if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
|
||||
dma_flag = __GFP_DMA;
|
||||
else
|
||||
#endif
|
||||
dma_flag = 0;
|
||||
|
||||
/* Don't invoke OOM killer */
|
||||
gfp |= __GFP_NORETRY;
|
||||
|
||||
return gfp;
|
||||
return gfp | dma_flag;
|
||||
}
|
||||
|
||||
void *dma_alloc_noncoherent(struct device *dev, size_t size,
|
||||
|
@ -30,7 +30,7 @@
|
||||
#define tc_lsize 32
|
||||
|
||||
extern unsigned long icache_way_size, dcache_way_size;
|
||||
unsigned long tcache_size;
|
||||
static unsigned long tcache_size;
|
||||
|
||||
#include <asm/r4kcache.h>
|
||||
|
||||
|
@ -385,6 +385,8 @@ static int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap);
|
||||
*/
|
||||
|
||||
#define GIC_CPU_NMI GIC_MAP_TO_NMI_MSK
|
||||
#define X GIC_UNUSED
|
||||
|
||||
static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = {
|
||||
{ X, X, X, X, 0 },
|
||||
{ X, X, X, X, 0 },
|
||||
@ -404,6 +406,7 @@ static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = {
|
||||
{ X, X, X, X, 0 },
|
||||
/* The remainder of this table is initialised by fill_ipi_map */
|
||||
};
|
||||
#undef X
|
||||
|
||||
/*
|
||||
* GCMP needs to be detected before any SMP initialisation
|
||||
|
@ -118,7 +118,7 @@ static int __init rc32434_pcibridge_init(void)
|
||||
if (!((pcicvalue == PCIM_H_EA) ||
|
||||
(pcicvalue == PCIM_H_IA_FIX) ||
|
||||
(pcicvalue == PCIM_H_IA_RR))) {
|
||||
pr_err(KERN_ERR "PCI init error!!!\n");
|
||||
pr_err("PCI init error!!!\n");
|
||||
/* Not in Host Mode, return ERROR */
|
||||
return -1;
|
||||
}
|
||||
|
@ -22,29 +22,19 @@
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
|
||||
#include <asm/processor.h>
|
||||
#include <asm/reboot.h>
|
||||
#include <glb.h>
|
||||
|
||||
void pnx8550_machine_restart(char *command)
|
||||
{
|
||||
char head[] = "************* Machine restart *************";
|
||||
char foot[] = "*******************************************";
|
||||
|
||||
printk("\n\n");
|
||||
printk("%s\n", head);
|
||||
if (command != NULL)
|
||||
printk("* %s\n", command);
|
||||
printk("%s\n", foot);
|
||||
|
||||
PNX8550_RST_CTL = PNX8550_RST_DO_SW_RST;
|
||||
}
|
||||
|
||||
void pnx8550_machine_halt(void)
|
||||
{
|
||||
printk("*** Machine halt. (Not implemented) ***\n");
|
||||
}
|
||||
|
||||
void pnx8550_machine_power_off(void)
|
||||
{
|
||||
printk("*** Machine power off. (Not implemented) ***\n");
|
||||
while (1) {
|
||||
if (cpu_wait)
|
||||
cpu_wait();
|
||||
}
|
||||
}
|
||||
|
@ -44,7 +44,6 @@
|
||||
extern void __init board_setup(void);
|
||||
extern void pnx8550_machine_restart(char *);
|
||||
extern void pnx8550_machine_halt(void);
|
||||
extern void pnx8550_machine_power_off(void);
|
||||
extern struct resource ioport_resource;
|
||||
extern struct resource iomem_resource;
|
||||
extern char *prom_getcmdline(void);
|
||||
@ -100,7 +99,7 @@ void __init plat_mem_setup(void)
|
||||
|
||||
_machine_restart = pnx8550_machine_restart;
|
||||
_machine_halt = pnx8550_machine_halt;
|
||||
pm_power_off = pnx8550_machine_power_off;
|
||||
pm_power_off = pnx8550_machine_halt;
|
||||
|
||||
/* Clear the Global 2 Register, PCI Inta Output Enable Registers
|
||||
Bit 1:Enable DAC Powerdown
|
||||
|
@ -101,7 +101,7 @@ config GDBSTUB_DEBUG_BREAKPOINT
|
||||
|
||||
choice
|
||||
prompt "GDB stub port"
|
||||
default GDBSTUB_TTYSM0
|
||||
default GDBSTUB_ON_TTYSM0
|
||||
depends on GDBSTUB
|
||||
help
|
||||
Select the serial port used for GDB-stub.
|
||||
|
@ -206,7 +206,7 @@ int module_finalize(const Elf_Ehdr *hdr,
|
||||
const Elf_Shdr *sechdrs,
|
||||
struct module *me)
|
||||
{
|
||||
return module_bug_finalize(hdr, sechdrs, me);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
@ -214,5 +214,4 @@ int module_finalize(const Elf_Ehdr *hdr,
|
||||
*/
|
||||
void module_arch_cleanup(struct module *mod)
|
||||
{
|
||||
module_bug_cleanup(mod);
|
||||
}
|
||||
|
@ -65,10 +65,10 @@ asmlinkage long sys_sigaction(int sig,
|
||||
old_sigset_t mask;
|
||||
if (verify_area(VERIFY_READ, act, sizeof(*act)) ||
|
||||
__get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
|
||||
__get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
|
||||
__get_user(new_ka.sa.sa_restorer, &act->sa_restorer) ||
|
||||
__get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
|
||||
__get_user(mask, &act->sa_mask))
|
||||
return -EFAULT;
|
||||
__get_user(new_ka.sa.sa_flags, &act->sa_flags);
|
||||
__get_user(mask, &act->sa_mask);
|
||||
siginitset(&new_ka.sa.sa_mask, mask);
|
||||
}
|
||||
|
||||
@ -77,10 +77,10 @@ asmlinkage long sys_sigaction(int sig,
|
||||
if (!ret && oact) {
|
||||
if (verify_area(VERIFY_WRITE, oact, sizeof(*oact)) ||
|
||||
__put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
|
||||
__put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
|
||||
__put_user(old_ka.sa.sa_restorer, &oact->sa_restorer) ||
|
||||
__put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
|
||||
__put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
|
||||
return -EFAULT;
|
||||
__put_user(old_ka.sa.sa_flags, &oact->sa_flags);
|
||||
__put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
|
||||
}
|
||||
|
||||
return ret;
|
||||
@ -102,6 +102,9 @@ static int restore_sigcontext(struct pt_regs *regs,
|
||||
{
|
||||
unsigned int err = 0;
|
||||
|
||||
/* Always make any pending restarted system calls return -EINTR */
|
||||
current_thread_info()->restart_block.fn = do_no_restart_syscall;
|
||||
|
||||
if (is_using_fpu(current))
|
||||
fpu_kill_state(current);
|
||||
|
||||
@ -330,8 +333,6 @@ static int setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
|
||||
regs->d0 = sig;
|
||||
regs->d1 = (unsigned long) &frame->sc;
|
||||
|
||||
set_fs(USER_DS);
|
||||
|
||||
/* the tracer may want to single-step inside the handler */
|
||||
if (test_thread_flag(TIF_SINGLESTEP))
|
||||
ptrace_notify(SIGTRAP);
|
||||
@ -345,7 +346,7 @@ static int setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
|
||||
return 0;
|
||||
|
||||
give_sigsegv:
|
||||
force_sig(SIGSEGV, current);
|
||||
force_sigsegv(sig, current);
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
@ -413,8 +414,6 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
|
||||
regs->d0 = sig;
|
||||
regs->d1 = (long) &frame->info;
|
||||
|
||||
set_fs(USER_DS);
|
||||
|
||||
/* the tracer may want to single-step inside the handler */
|
||||
if (test_thread_flag(TIF_SINGLESTEP))
|
||||
ptrace_notify(SIGTRAP);
|
||||
@ -428,10 +427,16 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
|
||||
return 0;
|
||||
|
||||
give_sigsegv:
|
||||
force_sig(SIGSEGV, current);
|
||||
force_sigsegv(sig, current);
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
static inline void stepback(struct pt_regs *regs)
|
||||
{
|
||||
regs->pc -= 2;
|
||||
regs->orig_d0 = -1;
|
||||
}
|
||||
|
||||
/*
|
||||
* handle the actual delivery of a signal to userspace
|
||||
*/
|
||||
@ -459,7 +464,7 @@ static int handle_signal(int sig,
|
||||
/* fallthrough */
|
||||
case -ERESTARTNOINTR:
|
||||
regs->d0 = regs->orig_d0;
|
||||
regs->pc -= 2;
|
||||
stepback(regs);
|
||||
}
|
||||
}
|
||||
|
||||
@ -527,12 +532,12 @@ static void do_signal(struct pt_regs *regs)
|
||||
case -ERESTARTSYS:
|
||||
case -ERESTARTNOINTR:
|
||||
regs->d0 = regs->orig_d0;
|
||||
regs->pc -= 2;
|
||||
stepback(regs);
|
||||
break;
|
||||
|
||||
case -ERESTART_RESTARTBLOCK:
|
||||
regs->d0 = __NR_restart_syscall;
|
||||
regs->pc -= 2;
|
||||
stepback(regs);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -2,13 +2,11 @@
|
||||
# Makefile for the MN10300-specific memory management code
|
||||
#
|
||||
|
||||
cacheflush-y := cache.o cache-mn10300.o
|
||||
cacheflush-$(CONFIG_MN10300_CACHE_WBACK) += cache-flush-mn10300.o
|
||||
|
||||
cacheflush-$(CONFIG_MN10300_CACHE_DISABLED) := cache-disabled.o
|
||||
|
||||
obj-y := \
|
||||
init.o fault.o pgtable.o extable.o tlb-mn10300.o mmu-context.o \
|
||||
misalignment.o dma-alloc.o
|
||||
|
||||
ifneq ($(CONFIG_MN10300_CACHE_DISABLED),y)
|
||||
obj-y += cache.o cache-mn10300.o
|
||||
ifeq ($(CONFIG_MN10300_CACHE_WBACK),y)
|
||||
obj-y += cache-flush-mn10300.o
|
||||
endif
|
||||
endif
|
||||
misalignment.o dma-alloc.o $(cacheflush-y)
|
||||
|
21
arch/mn10300/mm/cache-disabled.c
Normal file
21
arch/mn10300/mm/cache-disabled.c
Normal file
@ -0,0 +1,21 @@
|
||||
/* Handle the cache being disabled
|
||||
*
|
||||
* Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
|
||||
* Written by David Howells (dhowells@redhat.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public Licence
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the Licence, or (at your option) any later version.
|
||||
*/
|
||||
#include <linux/mm.h>
|
||||
|
||||
/*
|
||||
* allow userspace to flush the instruction cache
|
||||
*/
|
||||
asmlinkage long sys_cacheflush(unsigned long start, unsigned long end)
|
||||
{
|
||||
if (end < start)
|
||||
return -EINVAL;
|
||||
return 0;
|
||||
}
|
@ -54,13 +54,30 @@ EXPORT_SYMBOL(flush_icache_page);
|
||||
void flush_icache_range(unsigned long start, unsigned long end)
|
||||
{
|
||||
#ifdef CONFIG_MN10300_CACHE_WBACK
|
||||
unsigned long addr, size, off;
|
||||
unsigned long addr, size, base, off;
|
||||
struct page *page;
|
||||
pgd_t *pgd;
|
||||
pud_t *pud;
|
||||
pmd_t *pmd;
|
||||
pte_t *ppte, pte;
|
||||
|
||||
if (end > 0x80000000UL) {
|
||||
/* addresses above 0xa0000000 do not go through the cache */
|
||||
if (end > 0xa0000000UL) {
|
||||
end = 0xa0000000UL;
|
||||
if (start >= end)
|
||||
return;
|
||||
}
|
||||
|
||||
/* kernel addresses between 0x80000000 and 0x9fffffff do not
|
||||
* require page tables, so we just map such addresses directly */
|
||||
base = (start >= 0x80000000UL) ? start : 0x80000000UL;
|
||||
mn10300_dcache_flush_range(base, end);
|
||||
if (base == start)
|
||||
goto invalidate;
|
||||
end = base;
|
||||
}
|
||||
|
||||
for (; start < end; start += size) {
|
||||
/* work out how much of the page to flush */
|
||||
off = start & (PAGE_SIZE - 1);
|
||||
@ -104,6 +121,7 @@ void flush_icache_range(unsigned long start, unsigned long end)
|
||||
}
|
||||
#endif
|
||||
|
||||
invalidate:
|
||||
mn10300_icache_inv();
|
||||
}
|
||||
EXPORT_SYMBOL(flush_icache_range);
|
||||
|
@ -941,11 +941,10 @@ int module_finalize(const Elf_Ehdr *hdr,
|
||||
nsyms = newptr - (Elf_Sym *)symhdr->sh_addr;
|
||||
DEBUGP("NEW num_symtab %lu\n", nsyms);
|
||||
symhdr->sh_size = nsyms * sizeof(Elf_Sym);
|
||||
return module_bug_finalize(hdr, sechdrs, me);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void module_arch_cleanup(struct module *mod)
|
||||
{
|
||||
deregister_unwind_table(mod);
|
||||
module_bug_cleanup(mod);
|
||||
}
|
||||
|
@ -63,11 +63,6 @@ int module_finalize(const Elf_Ehdr *hdr,
|
||||
const Elf_Shdr *sechdrs, struct module *me)
|
||||
{
|
||||
const Elf_Shdr *sect;
|
||||
int err;
|
||||
|
||||
err = module_bug_finalize(hdr, sechdrs, me);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
/* Apply feature fixups */
|
||||
sect = find_section(hdr, sechdrs, "__ftr_fixup");
|
||||
@ -101,5 +96,4 @@ int module_finalize(const Elf_Ehdr *hdr,
|
||||
|
||||
void module_arch_cleanup(struct module *mod)
|
||||
{
|
||||
module_bug_cleanup(mod);
|
||||
}
|
||||
|
@ -57,7 +57,7 @@ static struct clk *mpc5121_clk_get(struct device *dev, const char *id)
|
||||
int id_match = 0;
|
||||
|
||||
if (dev == NULL || id == NULL)
|
||||
return NULL;
|
||||
return clk;
|
||||
|
||||
mutex_lock(&clocks_mutex);
|
||||
list_for_each_entry(p, &clocks, node) {
|
||||
|
@ -99,7 +99,7 @@ static void __init efika_pcisetup(void)
|
||||
if (bus_range == NULL || len < 2 * sizeof(int)) {
|
||||
printk(KERN_WARNING EFIKA_PLATFORM_NAME
|
||||
": Can't get bus-range for %s\n", pcictrl->full_name);
|
||||
return;
|
||||
goto out_put;
|
||||
}
|
||||
|
||||
if (bus_range[1] == bus_range[0])
|
||||
@ -111,12 +111,12 @@ static void __init efika_pcisetup(void)
|
||||
printk(" controlled by %s\n", pcictrl->full_name);
|
||||
printk("\n");
|
||||
|
||||
hose = pcibios_alloc_controller(of_node_get(pcictrl));
|
||||
hose = pcibios_alloc_controller(pcictrl);
|
||||
if (!hose) {
|
||||
printk(KERN_WARNING EFIKA_PLATFORM_NAME
|
||||
": Can't allocate PCI controller structure for %s\n",
|
||||
pcictrl->full_name);
|
||||
return;
|
||||
goto out_put;
|
||||
}
|
||||
|
||||
hose->first_busno = bus_range[0];
|
||||
@ -124,6 +124,9 @@ static void __init efika_pcisetup(void)
|
||||
hose->ops = &rtas_pci_ops;
|
||||
|
||||
pci_process_bridge_OF_ranges(hose, pcictrl, 0);
|
||||
return;
|
||||
out_put:
|
||||
of_node_put(pcictrl);
|
||||
}
|
||||
|
||||
#else
|
||||
|
@ -325,12 +325,16 @@ int mpc5200_psc_ac97_gpio_reset(int psc_number)
|
||||
clrbits32(&simple_gpio->simple_dvo, sync | out);
|
||||
clrbits8(&wkup_gpio->wkup_dvo, reset);
|
||||
|
||||
/* wait at lease 1 us */
|
||||
udelay(2);
|
||||
/* wait for 1 us */
|
||||
udelay(1);
|
||||
|
||||
/* Deassert reset */
|
||||
setbits8(&wkup_gpio->wkup_dvo, reset);
|
||||
|
||||
/* wait at least 200ns */
|
||||
/* 7 ~= (200ns * timebase) / ns2sec */
|
||||
__delay(7);
|
||||
|
||||
/* Restore pin-muxing */
|
||||
out_be32(&simple_gpio->port_config, mux);
|
||||
|
||||
|
@ -407,10 +407,9 @@ int module_finalize(const Elf_Ehdr *hdr,
|
||||
{
|
||||
vfree(me->arch.syminfo);
|
||||
me->arch.syminfo = NULL;
|
||||
return module_bug_finalize(hdr, sechdrs, me);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void module_arch_cleanup(struct module *mod)
|
||||
{
|
||||
module_bug_cleanup(mod);
|
||||
}
|
||||
|
@ -149,13 +149,11 @@ int module_finalize(const Elf_Ehdr *hdr,
|
||||
int ret = 0;
|
||||
|
||||
ret |= module_dwarf_finalize(hdr, sechdrs, me);
|
||||
ret |= module_bug_finalize(hdr, sechdrs, me);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
void module_arch_cleanup(struct module *mod)
|
||||
{
|
||||
module_bug_cleanup(mod);
|
||||
module_dwarf_cleanup(mod);
|
||||
}
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user