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Pin control fixes for the v5.0 series:

Browse Source 
- Mediatek Kconfig fix
 - Sunxi regulator, IRQ banks and pin base fixup
 - Intel Cherryview Strago DMI workaround
 - Potential regmap problem on mcp23s08
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJcWpVcAAoJEEEQszewGV1z2TQP/0dTB96i4VxpQuJSed2ery3X
 CClF6YjCdWuNX4T25TrkT+5Ovavg8hKySIus3yItx0BgqrEb2cXo1F9+RNOH3Azx
 XorOmBBA6pOHPsvm70Skr/wnMX9RVct6vU5yyj5+izPtwxgt/SsvRIXYHADVbhWP
 9n/ZCcCIOehnNoAIN2DYoQdsYWb/0986h3kJNXEy1jtxZbHHnxZxqOGdP51OxkqV
 TwuCRTsgnYc4Xxuf2OyHXlS/kZOnLGXyZSwJP/djHBguQMkSOo/w83KSraPJt1DH
 EbXY5KIVSOmvQ8xLw0/5iqV0ImQ0f0HF+Byf0DL0UkXXnGDh3SPLKayGoMTy2KmR
 GGIxwZ47Kwl51O40zz7aSX9tn+XiAAD+I0qxJZQ3JkOxHiu8AVnc8aLrdjMejKyM
 5gZwPfexJDHFnmGwwpiTTsvv1sxppqdMqf+w25XS9C7a1gGZkzA0R80rrv19MqLh
 KmQrp+Jz1tyvku6eU7RltqR2sS8XHjOE9qz/Tr28T/J/bTBvXqe1Ci7JWTcpoWz4
 M1muV4a3W91xGJG9S/v3vHCJTrmlwZQ+vC9qlUzRamJ1EZ9Rz3WoKjEqQgKqGf3R
 4+mT+sXrbvN+LMwlvOoS1mYMULpZVQ3oTnYGwefLViuLwK/SOHyZ7CYuQnaWhOwX
 r/ETB1S02VCDFOT8jBJD
 =mYO4
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v5.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control fixes from Linus Walleij:

 - Mediatek Kconfig fix

 - Sunxi regulator, IRQ banks and pin base fixup

 - Intel Cherryview Strago DMI workaround

 - Potential regmap problem on mcp23s08

* tag 'pinctrl-v5.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: sunxi: Correct number of IRQ banks on H6 main pin controller
  pinctrl: mcp23s08: spi: Fix regmap allocation for mcp23s18
  pinctrl: cherryview: fix Strago DMI workaround
  pinctrl: sunxi: Consider pin_base when calculating regulator array index
  pinctrl: sunxi: Fix and simplify pin bank regulator handling
  pinctrl: mediatek: fix Kconfig build errors for moore core
This commit is contained in:
Linus Torvalds 2019-02-07 07:47:08 +00:00
commit b66bc77767
6 changed files with 37 additions and 29 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/pinctrl/intel/pinctrl-cherryview.c
View File

@ -1513,7 +1513,7 @@ static const struct dmi_system_id chv_no_valid_mask[] = {
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
DMI_MATCH(DMI_PRODUCT_FAMILY, "Intel_Strago"),
DMI_MATCH(DMI_BOARD_VERSION, "1.0"),
DMI_MATCH(DMI_PRODUCT_VERSION, "1.0"),
},
},
{
@ -1521,7 +1521,7 @@ static const struct dmi_system_id chv_no_valid_mask[] = {
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
DMI_MATCH(DMI_PRODUCT_NAME, "Setzer"),
DMI_MATCH(DMI_BOARD_VERSION, "1.0"),
DMI_MATCH(DMI_PRODUCT_VERSION, "1.0"),
},
},
{
@ -1529,7 +1529,7 @@ static const struct dmi_system_id chv_no_valid_mask[] = {
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
DMI_MATCH(DMI_PRODUCT_NAME, "Cyan"),
DMI_MATCH(DMI_BOARD_VERSION, "1.0"),
DMI_MATCH(DMI_PRODUCT_VERSION, "1.0"),
},
},
{
@ -1537,7 +1537,7 @@ static const struct dmi_system_id chv_no_valid_mask[] = {
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
DMI_MATCH(DMI_PRODUCT_NAME, "Celes"),
DMI_MATCH(DMI_BOARD_VERSION, "1.0"),
DMI_MATCH(DMI_PRODUCT_VERSION, "1.0"),
},
},
{}

3
drivers/pinctrl/mediatek/Kconfig
View File

@ -45,12 +45,14 @@ config PINCTRL_MT2701
config PINCTRL_MT7623
bool "Mediatek MT7623 pin control with generic binding"
depends on MACH_MT7623 || COMPILE_TEST
depends on OF
default MACH_MT7623
select PINCTRL_MTK_MOORE
config PINCTRL_MT7629
bool "Mediatek MT7629 pin control"
depends on MACH_MT7629 || COMPILE_TEST
depends on OF
default MACH_MT7629
select PINCTRL_MTK_MOORE
@ -92,6 +94,7 @@ config PINCTRL_MT6797
config PINCTRL_MT7622
bool "MediaTek MT7622 pin control"
depends on OF
depends on ARM64 || COMPILE_TEST
default ARM64 && ARCH_MEDIATEK
select PINCTRL_MTK_MOORE

7
drivers/pinctrl/pinctrl-mcp23s08.c
View File

@ -832,8 +832,13 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
break;
case MCP_TYPE_S18:
one_regmap_config =
devm_kmemdup(dev, &mcp23x17_regmap,
sizeof(struct regmap_config), GFP_KERNEL);
if (!one_regmap_config)
return -ENOMEM;
mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
&mcp23x17_regmap);
one_regmap_config);
mcp->reg_shift = 1;
mcp->chip.ngpio = 16;
mcp->chip.label = "mcp23s18";

2
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
View File

@ -588,7 +588,7 @@ static const unsigned int h6_irq_bank_map[] = { 1, 5, 6, 7 };
static const struct sunxi_pinctrl_desc h6_pinctrl_data = {
.pins = h6_pins,
.npins = ARRAY_SIZE(h6_pins),
.irq_banks = 3,
.irq_banks = 4,
.irq_bank_map = h6_irq_bank_map,
.irq_read_needs_mux = true,
};

44
drivers/pinctrl/sunxi/pinctrl-sunxi.c
View File

@ -698,26 +698,24 @@ static int sunxi_pmx_request(struct pinctrl_dev *pctldev, unsigned offset)
{
struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
unsigned short bank = offset / PINS_PER_BANK;
struct sunxi_pinctrl_regulator *s_reg = &pctl->regulators[bank];
struct regulator *reg;
unsigned short bank_offset = bank - pctl->desc->pin_base /
PINS_PER_BANK;
struct sunxi_pinctrl_regulator *s_reg = &pctl->regulators[bank_offset];
struct regulator *reg = s_reg->regulator;
char supply[16];
int ret;
reg = s_reg->regulator;
if (!reg) {
char supply[16];
snprintf(supply, sizeof(supply), "vcc-p%c", 'a' + bank);
reg = regulator_get(pctl->dev, supply);
if (IS_ERR(reg)) {
dev_err(pctl->dev, "Couldn't get bank P%c regulator\n",
'A' + bank);
return PTR_ERR(reg);
}
s_reg->regulator = reg;
refcount_set(&s_reg->refcount, 1);
} else {
if (reg) {
refcount_inc(&s_reg->refcount);
return 0;
}
snprintf(supply, sizeof(supply), "vcc-p%c", 'a' + bank);
reg = regulator_get(pctl->dev, supply);
if (IS_ERR(reg)) {
dev_err(pctl->dev, "Couldn't get bank P%c regulator\n",
'A' + bank);
return PTR_ERR(reg);
}
ret = regulator_enable(reg);
@ -727,13 +725,13 @@ static int sunxi_pmx_request(struct pinctrl_dev *pctldev, unsigned offset)
goto out;
}
s_reg->regulator = reg;
refcount_set(&s_reg->refcount, 1);
return 0;
out:
if (refcount_dec_and_test(&s_reg->refcount)) {
regulator_put(s_reg->regulator);
s_reg->regulator = NULL;
}
regulator_put(s_reg->regulator);
return ret;
}
@ -742,7 +740,9 @@ static int sunxi_pmx_free(struct pinctrl_dev *pctldev, unsigned offset)
{
struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
unsigned short bank = offset / PINS_PER_BANK;
struct sunxi_pinctrl_regulator *s_reg = &pctl->regulators[bank];
unsigned short bank_offset = bank - pctl->desc->pin_base /
PINS_PER_BANK;
struct sunxi_pinctrl_regulator *s_reg = &pctl->regulators[bank_offset];
if (!refcount_dec_and_test(&s_reg->refcount))
return 0;

2
drivers/pinctrl/sunxi/pinctrl-sunxi.h
View File

@ -136,7 +136,7 @@ struct sunxi_pinctrl {
struct gpio_chip *chip;
const struct sunxi_pinctrl_desc *desc;
struct device *dev;
struct sunxi_pinctrl_regulator regulators[12];
struct sunxi_pinctrl_regulator regulators[9];
struct irq_domain *domain;
struct sunxi_pinctrl_function *functions;
unsigned nfunctions;