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arm64: KVM: remove misleading comment on pmu status
Comment about how PMU access is handled is not relavant since v4.6 where proper PMU support was added in. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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@ -823,14 +823,6 @@ static bool access_pmuserenr(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
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* Architected system registers.
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* Important: Must be sorted ascending by Op0, Op1, CRn, CRm, Op2
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*
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* We could trap ID_DFR0 and tell the guest we don't support performance
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* monitoring. Unfortunately the patch to make the kernel check ID_DFR0 was
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* NAKed, so it will read the PMCR anyway.
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*
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* Therefore we tell the guest we have 0 counters. Unfortunately, we
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* must always support PMCCNTR (the cycle counter): we just RAZ/WI for
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* all PM registers, which doesn't crash the guest kernel at least.
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*
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* Debug handling: We do trap most, if not all debug related system
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* registers. The implementation is good enough to ensure that a guest
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* can use these with minimal performance degradation. The drawback is
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