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locking/barriers, tile: Provide TILE specific smp_acquire__after_ctrl_dep()

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Since TILE doesn't do read speculation, its control dependencies also
guarantee LOAD->LOAD order and we don't need the additional RMB
otherwise required to provide ACQUIRE semantics.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Chris Metcalf <cmetcalf@mellanox.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Peter Zijlstra 2016-05-30 14:32:04 +02:00 committed by Ingo Molnar
parent 7cb45c0fe9
commit b464d1270a
1 changed files with 7 additions and 0 deletions
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7
arch/tile/include/asm/barrier.h
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@ -87,6 +87,13 @@ mb_incoherent(void)
#define __smp_mb__after_atomic() __smp_mb() #define __smp_mb__after_atomic() __smp_mb()
#endif #endif
/*
* The TILE architecture does not do speculative reads; this ensures
* that a control dependency also orders against loads and already provides
* a LOAD->{LOAD,STORE} order and can forgo the additional RMB.
*/
#define smp_acquire__after_ctrl_dep() barrier()
#include <asm-generic/barrier.h> #include <asm-generic/barrier.h>
#endif /* !__ASSEMBLY__ */ #endif /* !__ASSEMBLY__ */