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net: mscc: ocelot: un-export unused regmap symbols
There are no external users of the vsc7514_*_regmap[] symbols or vsc7514_vcap_* functions. They were exported in commit32ecd22ba6
("net: mscc: ocelot: split register definitions to a separate file") with the intention of being used, but the actual structure used in commit2efaca411c
("net: mscc: ocelot: expose vsc7514_regmap definition") ended up being all that was needed. Bury these unnecessary symbols. Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Suggested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20230204182056.25502-1-colin.foster@in-advantage.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
parent
9ac543c06f
commit
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@ -68,7 +68,7 @@ const struct reg_field vsc7514_regfields[REGFIELD_MAX] = {
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};
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EXPORT_SYMBOL(vsc7514_regfields);
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const u32 vsc7514_ana_regmap[] = {
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static const u32 vsc7514_ana_regmap[] = {
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REG(ANA_ADVLEARN, 0x009000),
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REG(ANA_VLANMASK, 0x009004),
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REG(ANA_PORT_B_DOMAIN, 0x009008),
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@ -148,9 +148,8 @@ const u32 vsc7514_ana_regmap[] = {
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REG(ANA_POL_HYST, 0x008bec),
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REG(ANA_POL_MISC_CFG, 0x008bf0),
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};
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EXPORT_SYMBOL(vsc7514_ana_regmap);
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const u32 vsc7514_qs_regmap[] = {
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static const u32 vsc7514_qs_regmap[] = {
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REG(QS_XTR_GRP_CFG, 0x000000),
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REG(QS_XTR_RD, 0x000008),
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REG(QS_XTR_FRM_PRUNING, 0x000010),
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@ -164,9 +163,8 @@ const u32 vsc7514_qs_regmap[] = {
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REG(QS_INJ_ERR, 0x000040),
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REG(QS_INH_DBG, 0x000048),
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};
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EXPORT_SYMBOL(vsc7514_qs_regmap);
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const u32 vsc7514_qsys_regmap[] = {
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static const u32 vsc7514_qsys_regmap[] = {
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REG(QSYS_PORT_MODE, 0x011200),
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REG(QSYS_SWITCH_PORT_MODE, 0x011234),
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REG(QSYS_STAT_CNT_CFG, 0x011264),
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@ -209,9 +207,8 @@ const u32 vsc7514_qsys_regmap[] = {
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REG(QSYS_SE_STATE, 0x00004c),
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REG(QSYS_HSCH_MISC_CFG, 0x011388),
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};
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EXPORT_SYMBOL(vsc7514_qsys_regmap);
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const u32 vsc7514_rew_regmap[] = {
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static const u32 vsc7514_rew_regmap[] = {
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REG(REW_PORT_VLAN_CFG, 0x000000),
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REG(REW_TAG_CFG, 0x000004),
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REG(REW_PORT_CFG, 0x000008),
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@ -224,9 +221,8 @@ const u32 vsc7514_rew_regmap[] = {
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REG(REW_STAT_CFG, 0x000890),
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REG(REW_PPT, 0x000680),
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};
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EXPORT_SYMBOL(vsc7514_rew_regmap);
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const u32 vsc7514_sys_regmap[] = {
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static const u32 vsc7514_sys_regmap[] = {
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REG(SYS_COUNT_RX_OCTETS, 0x000000),
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REG(SYS_COUNT_RX_UNICAST, 0x000004),
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REG(SYS_COUNT_RX_MULTICAST, 0x000008),
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@ -347,9 +343,8 @@ const u32 vsc7514_sys_regmap[] = {
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REG(SYS_PTP_NXT, 0x0006c0),
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REG(SYS_PTP_CFG, 0x0006c4),
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};
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EXPORT_SYMBOL(vsc7514_sys_regmap);
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const u32 vsc7514_vcap_regmap[] = {
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static const u32 vsc7514_vcap_regmap[] = {
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/* VCAP_CORE_CFG */
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REG(VCAP_CORE_UPDATE_CTRL, 0x000000),
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REG(VCAP_CORE_MV_CFG, 0x000004),
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@ -371,9 +366,8 @@ const u32 vsc7514_vcap_regmap[] = {
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REG(VCAP_CONST_CORE_CNT, 0x0003b8),
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REG(VCAP_CONST_IF_CNT, 0x0003bc),
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};
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EXPORT_SYMBOL(vsc7514_vcap_regmap);
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const u32 vsc7514_ptp_regmap[] = {
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static const u32 vsc7514_ptp_regmap[] = {
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REG(PTP_PIN_CFG, 0x000000),
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REG(PTP_PIN_TOD_SEC_MSB, 0x000004),
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REG(PTP_PIN_TOD_SEC_LSB, 0x000008),
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@ -384,9 +378,8 @@ const u32 vsc7514_ptp_regmap[] = {
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REG(PTP_CLK_CFG_ADJ_CFG, 0x0000a4),
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REG(PTP_CLK_CFG_ADJ_FREQ, 0x0000a8),
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};
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EXPORT_SYMBOL(vsc7514_ptp_regmap);
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const u32 vsc7514_dev_gmii_regmap[] = {
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static const u32 vsc7514_dev_gmii_regmap[] = {
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REG(DEV_CLOCK_CFG, 0x0),
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REG(DEV_PORT_MISC, 0x4),
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REG(DEV_EVENTS, 0x8),
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@ -427,7 +420,6 @@ const u32 vsc7514_dev_gmii_regmap[] = {
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REG(DEV_PCS_FX100_CFG, 0x94),
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REG(DEV_PCS_FX100_STATUS, 0x98),
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};
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EXPORT_SYMBOL(vsc7514_dev_gmii_regmap);
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const u32 *vsc7514_regmap[TARGET_MAX] = {
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[ANA] = vsc7514_ana_regmap,
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@ -443,7 +435,7 @@ const u32 *vsc7514_regmap[TARGET_MAX] = {
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};
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EXPORT_SYMBOL(vsc7514_regmap);
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const struct vcap_field vsc7514_vcap_es0_keys[] = {
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static const struct vcap_field vsc7514_vcap_es0_keys[] = {
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[VCAP_ES0_EGR_PORT] = { 0, 4 },
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[VCAP_ES0_IGR_PORT] = { 4, 4 },
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[VCAP_ES0_RSV] = { 8, 2 },
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@ -453,9 +445,8 @@ const struct vcap_field vsc7514_vcap_es0_keys[] = {
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[VCAP_ES0_DP] = { 24, 1 },
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[VCAP_ES0_PCP] = { 25, 3 },
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};
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EXPORT_SYMBOL(vsc7514_vcap_es0_keys);
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const struct vcap_field vsc7514_vcap_es0_actions[] = {
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static const struct vcap_field vsc7514_vcap_es0_actions[] = {
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[VCAP_ES0_ACT_PUSH_OUTER_TAG] = { 0, 2 },
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[VCAP_ES0_ACT_PUSH_INNER_TAG] = { 2, 1 },
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[VCAP_ES0_ACT_TAG_A_TPID_SEL] = { 3, 2 },
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@ -475,9 +466,8 @@ const struct vcap_field vsc7514_vcap_es0_actions[] = {
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[VCAP_ES0_ACT_RSV] = { 49, 24 },
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[VCAP_ES0_ACT_HIT_STICKY] = { 73, 1 },
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};
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EXPORT_SYMBOL(vsc7514_vcap_es0_actions);
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const struct vcap_field vsc7514_vcap_is1_keys[] = {
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static const struct vcap_field vsc7514_vcap_is1_keys[] = {
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[VCAP_IS1_HK_TYPE] = { 0, 1 },
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[VCAP_IS1_HK_LOOKUP] = { 1, 2 },
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[VCAP_IS1_HK_IGR_PORT_MASK] = { 3, 12 },
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@ -527,9 +517,8 @@ const struct vcap_field vsc7514_vcap_is1_keys[] = {
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[VCAP_IS1_HK_IP4_L4_RNG] = { 148, 8 },
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[VCAP_IS1_HK_IP4_IP_PAYLOAD_S1_5TUPLE] = { 156, 32 },
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};
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EXPORT_SYMBOL(vsc7514_vcap_is1_keys);
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const struct vcap_field vsc7514_vcap_is1_actions[] = {
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static const struct vcap_field vsc7514_vcap_is1_actions[] = {
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[VCAP_IS1_ACT_DSCP_ENA] = { 0, 1 },
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[VCAP_IS1_ACT_DSCP_VAL] = { 1, 6 },
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[VCAP_IS1_ACT_QOS_ENA] = { 7, 1 },
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@ -552,9 +541,8 @@ const struct vcap_field vsc7514_vcap_is1_actions[] = {
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[VCAP_IS1_ACT_CUSTOM_ACE_TYPE_ENA] = { 74, 4 },
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[VCAP_IS1_ACT_HIT_STICKY] = { 78, 1 },
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};
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EXPORT_SYMBOL(vsc7514_vcap_is1_actions);
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const struct vcap_field vsc7514_vcap_is2_keys[] = {
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static const struct vcap_field vsc7514_vcap_is2_keys[] = {
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/* Common: 46 bits */
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[VCAP_IS2_TYPE] = { 0, 4 },
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[VCAP_IS2_HK_FIRST] = { 4, 1 },
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@ -633,9 +621,8 @@ const struct vcap_field vsc7514_vcap_is2_keys[] = {
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[VCAP_IS2_HK_OAM_CCM_CNTS_EQ0] = { 186, 1 },
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[VCAP_IS2_HK_OAM_IS_Y1731] = { 187, 1 },
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};
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EXPORT_SYMBOL(vsc7514_vcap_is2_keys);
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const struct vcap_field vsc7514_vcap_is2_actions[] = {
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static const struct vcap_field vsc7514_vcap_is2_actions[] = {
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[VCAP_IS2_ACT_HIT_ME_ONCE] = { 0, 1 },
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[VCAP_IS2_ACT_CPU_COPY_ENA] = { 1, 1 },
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[VCAP_IS2_ACT_CPU_QU_NUM] = { 2, 3 },
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@ -652,7 +639,6 @@ const struct vcap_field vsc7514_vcap_is2_actions[] = {
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[VCAP_IS2_ACT_ACL_ID] = { 43, 6 },
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[VCAP_IS2_ACT_HIT_CNT] = { 49, 32 },
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};
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EXPORT_SYMBOL(vsc7514_vcap_is2_actions);
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struct vcap_props vsc7514_vcap_props[] = {
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[VCAP_ES0] = {
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@ -14,22 +14,6 @@ extern struct vcap_props vsc7514_vcap_props[];
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extern const struct reg_field vsc7514_regfields[REGFIELD_MAX];
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extern const u32 vsc7514_ana_regmap[];
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extern const u32 vsc7514_qs_regmap[];
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extern const u32 vsc7514_qsys_regmap[];
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extern const u32 vsc7514_rew_regmap[];
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extern const u32 vsc7514_sys_regmap[];
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extern const u32 vsc7514_vcap_regmap[];
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extern const u32 vsc7514_ptp_regmap[];
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extern const u32 vsc7514_dev_gmii_regmap[];
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extern const u32 *vsc7514_regmap[TARGET_MAX];
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extern const struct vcap_field vsc7514_vcap_es0_keys[];
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extern const struct vcap_field vsc7514_vcap_es0_actions[];
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extern const struct vcap_field vsc7514_vcap_is1_keys[];
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extern const struct vcap_field vsc7514_vcap_is1_actions[];
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extern const struct vcap_field vsc7514_vcap_is2_keys[];
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extern const struct vcap_field vsc7514_vcap_is2_actions[];
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#endif
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