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ARM: prima2: move to use REGMAP APIs for rtciobrg
all devices behind rtciobrg needs a special way to access. currently they are using a platform-specific API. this patch moves to REGMAP, then clients can use regmap APIs to read/write. for the moment, old APIs are still kept, once all clients move to regmap, old APIs will be dropped. this patch also does minor clean for comments, authors statement. Signed-off-by: Guo Zeng <Guo.Zeng@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com>
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@ -4,6 +4,7 @@ menuconfig ARCH_SIRF
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select ARCH_REQUIRE_GPIOLIB
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select GENERIC_IRQ_CHIP
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select NO_IOPORT_MAP
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select REGMAP
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select PINCTRL
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select PINCTRL_SIRF
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help
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@ -1,5 +1,5 @@
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/*
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* RTC I/O Bridge interfaces for CSR SiRFprimaII
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* RTC I/O Bridge interfaces for CSR SiRFprimaII/atlas7
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* ARM access the registers of SYSRTC, GPSRTC and PWRC through this module
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*
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* Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
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@ -10,6 +10,7 @@
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/regmap.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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@ -66,6 +67,7 @@ u32 sirfsoc_rtc_iobrg_readl(u32 addr)
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{
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unsigned long flags, val;
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/* TODO: add hwspinlock to sync with M3 */
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spin_lock_irqsave(&rtciobrg_lock, flags);
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val = __sirfsoc_rtc_iobrg_readl(addr);
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@ -90,6 +92,7 @@ void sirfsoc_rtc_iobrg_writel(u32 val, u32 addr)
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{
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unsigned long flags;
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/* TODO: add hwspinlock to sync with M3 */
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spin_lock_irqsave(&rtciobrg_lock, flags);
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sirfsoc_rtc_iobrg_pre_writel(val, addr);
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@ -102,6 +105,45 @@ void sirfsoc_rtc_iobrg_writel(u32 val, u32 addr)
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}
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EXPORT_SYMBOL_GPL(sirfsoc_rtc_iobrg_writel);
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static int regmap_iobg_regwrite(void *context, unsigned int reg,
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unsigned int val)
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{
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sirfsoc_rtc_iobrg_writel(val, reg);
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return 0;
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}
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static int regmap_iobg_regread(void *context, unsigned int reg,
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unsigned int *val)
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{
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*val = (u32)sirfsoc_rtc_iobrg_readl(reg);
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return 0;
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}
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static struct regmap_bus regmap_iobg = {
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.reg_write = regmap_iobg_regwrite,
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.reg_read = regmap_iobg_regread,
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};
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/**
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* devm_regmap_init_iobg(): Initialise managed register map
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*
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* @iobg: Device that will be interacted with
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* @config: Configuration for register map
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*
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* The return value will be an ERR_PTR() on error or a valid pointer
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* to a struct regmap. The regmap will be automatically freed by the
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* device management code.
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*/
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struct regmap *devm_regmap_init_iobg(struct device *dev,
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const struct regmap_config *config)
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{
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const struct regmap_bus *bus = ®map_iobg;
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return devm_regmap_init(dev, bus, dev, config);
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}
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EXPORT_SYMBOL_GPL(devm_regmap_init_iobg);
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static const struct of_device_id rtciobrg_ids[] = {
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{ .compatible = "sirf,prima2-rtciobg" },
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{}
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@ -132,7 +174,7 @@ static int __init sirfsoc_rtciobrg_init(void)
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}
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postcore_initcall(sirfsoc_rtciobrg_init);
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MODULE_AUTHOR("Zhiwu Song <zhiwu.song@csr.com>, "
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"Barry Song <baohua.song@csr.com>");
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MODULE_AUTHOR("Zhiwu Song <zhiwu.song@csr.com>");
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MODULE_AUTHOR("Barry Song <baohua.song@csr.com>");
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MODULE_DESCRIPTION("CSR SiRFprimaII rtc io bridge");
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MODULE_LICENSE("GPL v2");
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@ -9,10 +9,14 @@
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#ifndef _SIRFSOC_RTC_IOBRG_H_
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#define _SIRFSOC_RTC_IOBRG_H_
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struct regmap_config;
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extern void sirfsoc_rtc_iobrg_besyncing(void);
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extern u32 sirfsoc_rtc_iobrg_readl(u32 addr);
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extern void sirfsoc_rtc_iobrg_writel(u32 val, u32 addr);
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struct regmap *devm_regmap_init_iobg(struct device *dev,
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const struct regmap_config *config);
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#endif
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