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ARM: OMAP2+: PRCM: consolidate PRCM-related timeout macros
Consolidate all of the copies of MAX_MODULE_HARDRESET_WAIT and MAX_MODULE_SOFTRESET_WAIT into one place, arch/arm/mach-omap2/prm.h. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
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@ -35,6 +35,7 @@
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#include "mux.h"
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#include "mux.h"
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#include "control.h"
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#include "control.h"
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#include "display.h"
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#include "display.h"
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#include "prm.h"
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#define DISPC_CONTROL 0x0040
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#define DISPC_CONTROL 0x0040
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#define DISPC_CONTROL2 0x0238
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#define DISPC_CONTROL2 0x0238
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@ -512,7 +513,6 @@ static void dispc_disable_outputs(void)
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}
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}
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}
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}
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#define MAX_MODULE_SOFTRESET_WAIT 10000
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int omap_dss_reset(struct omap_hwmod *oh)
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int omap_dss_reset(struct omap_hwmod *oh)
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{
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{
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struct omap_hwmod_opt_clk *oc;
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struct omap_hwmod_opt_clk *oc;
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@ -31,11 +31,9 @@
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#include "omap_device.h"
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#include "omap_device.h"
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#include "hdq1w.h"
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#include "hdq1w.h"
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#include "prm.h"
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#include "common.h"
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#include "common.h"
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/* Maximum microseconds to wait for OMAP module to softreset */
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#define MAX_MODULE_SOFTRESET_WAIT 10000
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/**
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/**
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* omap_hdq1w_reset - reset the OMAP HDQ1W module
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* omap_hdq1w_reset - reset the OMAP HDQ1W module
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* @oh: struct omap_hwmod *
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* @oh: struct omap_hwmod *
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@ -20,10 +20,11 @@
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*/
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*/
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#include "soc.h"
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#include "soc.h"
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#include "common.h"
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#include "omap_hwmod.h"
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#include "omap_hwmod.h"
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#include "omap_device.h"
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#include "omap_device.h"
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#include "prm.h"
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#include "common.h"
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#include "mux.h"
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#include "mux.h"
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#include "i2c.h"
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#include "i2c.h"
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@ -32,9 +33,6 @@
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#define OMAP2_I2C_CON_OFFSET 0x24
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#define OMAP2_I2C_CON_OFFSET 0x24
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#define OMAP4_I2C_CON_OFFSET 0xA4
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#define OMAP4_I2C_CON_OFFSET 0xA4
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/* Maximum microseconds to wait for OMAP module to softreset */
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#define MAX_MODULE_SOFTRESET_WAIT 10000
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#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
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#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
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static void __init omap2_i2c_mux_pins(int bus_id)
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static void __init omap2_i2c_mux_pins(int bus_id)
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@ -25,6 +25,7 @@
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#include <linux/err.h>
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#include <linux/err.h>
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#include <linux/platform_data/gpio-omap.h>
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#include <linux/platform_data/gpio-omap.h>
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#include "prm.h"
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#include "common.h"
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#include "common.h"
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#include "control.h"
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#include "control.h"
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#include "omap_hwmod.h"
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#include "omap_hwmod.h"
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@ -43,9 +44,6 @@
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#define MSDI_CON_CLKD_MASK (0x3f << 0)
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#define MSDI_CON_CLKD_MASK (0x3f << 0)
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#define MSDI_CON_CLKD_SHIFT 0
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#define MSDI_CON_CLKD_SHIFT 0
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/* Maximum microseconds to wait for OMAP module to softreset */
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#define MAX_MODULE_SOFTRESET_WAIT 10000
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/* MSDI_TARGET_RESET_CLKD: clock divisor to use throughout the reset */
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/* MSDI_TARGET_RESET_CLKD: clock divisor to use throughout the reset */
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#define MSDI_TARGET_RESET_CLKD 0x3ff
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#define MSDI_TARGET_RESET_CLKD 0x3ff
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@ -151,6 +151,7 @@
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#include "cm3xxx.h"
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#include "cm3xxx.h"
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#include "cminst44xx.h"
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#include "cminst44xx.h"
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#include "cm33xx.h"
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#include "cm33xx.h"
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#include "prm.h"
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#include "prm3xxx.h"
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#include "prm3xxx.h"
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#include "prm44xx.h"
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#include "prm44xx.h"
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#include "prm33xx.h"
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#include "prm33xx.h"
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@ -158,9 +159,6 @@
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#include "mux.h"
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#include "mux.h"
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#include "pm.h"
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#include "pm.h"
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/* Maximum microseconds to wait for OMAP module to softreset */
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#define MAX_MODULE_SOFTRESET_WAIT 10000
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/* Name of the OMAP hwmod for the MPU */
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/* Name of the OMAP hwmod for the MPU */
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#define MPU_INITIATOR_NAME "mpu"
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#define MPU_INITIATOR_NAME "mpu"
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@ -406,11 +406,6 @@
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#define OMAP3430_EN_CORE_MASK (1 << 0)
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#define OMAP3430_EN_CORE_MASK (1 << 0)
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/*
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* MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP
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* submodule to exit hardreset
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*/
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#define MAX_MODULE_HARDRESET_WAIT 10000
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/*
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/*
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* Maximum time(us) it takes to output the signal WUCLKOUT of the last
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* Maximum time(us) it takes to output the signal WUCLKOUT of the last
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@ -419,7 +414,6 @@
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* microseconds on OMAP4, so this timeout may be too high.
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* microseconds on OMAP4, so this timeout may be too high.
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*/
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*/
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#define MAX_IOPAD_LATCH_TIME 100
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#define MAX_IOPAD_LATCH_TIME 100
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# ifndef __ASSEMBLER__
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# ifndef __ASSEMBLER__
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/**
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/**
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@ -20,6 +20,23 @@ extern void __iomem *prm_base;
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extern void omap2_set_globals_prm(void __iomem *prm);
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extern void omap2_set_globals_prm(void __iomem *prm);
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# endif
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# endif
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/*
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* MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP
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* module to softreset
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*/
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#define MAX_MODULE_SOFTRESET_WAIT 10000
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/*
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* MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP
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* submodule to exit hardreset
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*/
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#define MAX_MODULE_HARDRESET_WAIT 10000
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/*
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* Register bitfields
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*/
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/*
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/*
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* 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP
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* 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP
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*
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*
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@ -241,11 +241,4 @@ extern int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm);
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#define OMAP_LOGICRETSTATE_MASK (1 << 2)
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#define OMAP_LOGICRETSTATE_MASK (1 << 2)
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/*
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* MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP
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* submodule to exit hardreset
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*/
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#define MAX_MODULE_HARDRESET_WAIT 10000
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#endif
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#endif
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@ -1,6 +1,8 @@
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/*
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/*
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* OMAP2+ MPU WD_TIMER-specific code
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* OMAP2+ MPU WD_TIMER-specific code
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*
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*
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* Copyright (C) 2012 Texas Instruments, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* the Free Software Foundation; either version 2 of the License, or
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@ -30,9 +32,6 @@
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#define OMAP_WDT_WPS 0x34
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#define OMAP_WDT_WPS 0x34
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#define OMAP_WDT_SPR 0x48
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#define OMAP_WDT_SPR 0x48
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/* Maximum microseconds to wait for OMAP module to softreset */
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#define MAX_MODULE_SOFTRESET_WAIT 10000
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int omap2_wd_timer_disable(struct omap_hwmod *oh)
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int omap2_wd_timer_disable(struct omap_hwmod *oh)
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{
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{
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void __iomem *base;
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void __iomem *base;
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