mirror of
https://github.com/edk2-porting/linux-next.git
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Merge branch 'renesas-r8a7740' into renesas-soc
* renesas-r8a7740: ARM: mach-shmobile: r8a7740 generic board support via DT ARM: shmobile: r8a7740: add A4LC pm domain support ARM: shmobile: r8a7740: add A3SP pm domain support ARM: shmobile: r8a7740: add A4S pm domain support ARM: shmobile: r8a7740: fixup: MSEL1CR 7bit control ARM: shmobile: use common DMAEngine definitions on r8a7740 ARM: shmobile: r8a7740: add DMAEngine support for USB ARM: shmobile: r8a7740: add DMAEngine support for SDHI ARM: shmobile: r8a7740: add DMAEngine support for FSI
This commit is contained in:
Rafael J. Wysocki
commit
b0a1e7532b
21
arch/arm/boot/dts/r8a7740.dtsi
Normal file
21
arch/arm/boot/dts/r8a7740.dtsi
Normal file
@ -0,0 +1,21 @@
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/*
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* Device Tree Source for the r8a7740 SoC
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*
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* Copyright (C) 2012 Renesas Solutions Corp.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
|
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* kind, whether express or implied.
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*/
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/include/ "skeleton.dtsi"
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/ {
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compatible = "renesas,r8a7740";
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cpus {
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cpu@0 {
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compatible = "arm,cortex-a9";
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};
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};
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};
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@ -41,6 +41,7 @@ obj-$(CONFIG_SUSPEND) += suspend.o
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obj-$(CONFIG_CPU_IDLE) += cpuidle.o
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obj-$(CONFIG_ARCH_SHMOBILE) += pm-rmobile.o
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obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o
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obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o
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obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o
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# Board objects
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@ -463,6 +463,7 @@ enum {
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MSTP230,
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MSTP222,
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MSTP218, MSTP217, MSTP216, MSTP214,
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MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
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MSTP329, MSTP328, MSTP323, MSTP320,
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@ -485,6 +486,10 @@ static struct clk mstp_clks[MSTP_NR] = {
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[MSTP230] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 30, 0), /* SCIFA6 */
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[MSTP222] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 22, 0), /* SCIFA7 */
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[MSTP218] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* DMAC1 */
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[MSTP217] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 17, 0), /* DMAC2 */
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[MSTP216] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 16, 0), /* DMAC3 */
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[MSTP214] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 14, 0), /* USBDMAC */
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[MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
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[MSTP206] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
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[MSTP204] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
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@ -563,7 +568,10 @@ static struct clk_lookup lookups[] = {
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CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
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CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]),
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CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]),
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CLKDEV_DEV_ID("sh-dma-engine.3", &mstp_clks[MSTP214]),
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CLKDEV_DEV_ID("sh-dma-engine.2", &mstp_clks[MSTP216]),
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CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP217]),
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CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]),
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CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP222]),
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CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP230]),
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@ -19,6 +19,8 @@
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#ifndef __ASM_R8A7740_H__
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#define __ASM_R8A7740_H__
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#include <mach/pm-rmobile.h>
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/*
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* MD_CKx pin
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*/
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@ -588,4 +590,26 @@ enum {
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GPIO_FN_TRACEAUD_FROM_MEMC,
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};
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/* DMA slave IDs */
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enum {
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SHDMA_SLAVE_INVALID,
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SHDMA_SLAVE_SDHI0_RX,
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SHDMA_SLAVE_SDHI0_TX,
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SHDMA_SLAVE_SDHI1_RX,
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SHDMA_SLAVE_SDHI1_TX,
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SHDMA_SLAVE_SDHI2_RX,
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SHDMA_SLAVE_SDHI2_TX,
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SHDMA_SLAVE_FSIA_RX,
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SHDMA_SLAVE_FSIA_TX,
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SHDMA_SLAVE_FSIB_TX,
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SHDMA_SLAVE_USBHS_TX,
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SHDMA_SLAVE_USBHS_RX,
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};
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#ifdef CONFIG_PM
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extern struct rmobile_pm_domain r8a7740_pd_a4s;
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extern struct rmobile_pm_domain r8a7740_pd_a3sp;
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extern struct rmobile_pm_domain r8a7740_pd_a4lc;
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#endif /* CONFIG_PM */
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#endif /* __ASM_R8A7740_H__ */
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@ -1261,7 +1261,7 @@ static pinmux_enum_t pinmux_data[] = {
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PINMUX_DATA(A21_MARK, PORT120_FN1),
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PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT120_FN2),
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PINMUX_DATA(MSIOF1_TSYNC_PORT120_MARK, PORT120_FN3, MSEL4CR_10_0),
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PINMUX_DATA(IRQ7_PORT120_MARK, PORT120_FN0, MSEL1CR_7_0),
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PINMUX_DATA(IRQ7_PORT120_MARK, PORT120_FN0, MSEL1CR_7_1),
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/* Port121 */
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PINMUX_DATA(A20_MARK, PORT121_FN1),
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@ -1623,7 +1623,7 @@ static pinmux_enum_t pinmux_data[] = {
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/* Port209 */
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PINMUX_DATA(VBUS_MARK, PORT209_FN1),
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PINMUX_DATA(IRQ7_PORT209_MARK, PORT209_FN0, MSEL1CR_7_1),
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PINMUX_DATA(IRQ7_PORT209_MARK, PORT209_FN0, MSEL1CR_7_0),
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/* Port210 */
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PINMUX_DATA(IRQ9_PORT210_MARK, PORT210_FN0, MSEL1CR_9_1),
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54
arch/arm/mach-shmobile/pm-r8a7740.c
Normal file
54
arch/arm/mach-shmobile/pm-r8a7740.c
Normal file
@ -0,0 +1,54 @@
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/*
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* r8a7740 power management support
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*
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* Copyright (C) 2012 Renesas Solutions Corp.
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* Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/console.h>
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#include <mach/pm-rmobile.h>
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#ifdef CONFIG_PM
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static int r8a7740_pd_a4s_suspend(void)
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{
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/*
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* The A4S domain contains the CPU core and therefore it should
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* only be turned off if the CPU is in use.
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*/
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return -EBUSY;
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}
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struct rmobile_pm_domain r8a7740_pd_a4s = {
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.genpd.name = "A4S",
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.bit_shift = 10,
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.gov = &pm_domain_always_on_gov,
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.no_debug = true,
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.suspend = r8a7740_pd_a4s_suspend,
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};
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static int r8a7740_pd_a3sp_suspend(void)
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{
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/*
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* Serial consoles make use of SCIF hardware located in A3SP,
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* keep such power domain on if "no_console_suspend" is set.
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*/
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return console_suspend_enabled ? 0 : -EBUSY;
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}
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struct rmobile_pm_domain r8a7740_pd_a3sp = {
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.genpd.name = "A3SP",
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.bit_shift = 11,
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.gov = &pm_domain_always_on_gov,
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.no_debug = true,
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.suspend = r8a7740_pd_a3sp_suspend,
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};
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struct rmobile_pm_domain r8a7740_pd_a4lc = {
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.genpd.name = "A4LC",
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.bit_shift = 1,
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};
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#endif /* CONFIG_PM */
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@ -23,9 +23,14 @@
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/of_platform.h>
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#include <linux/serial_sci.h>
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#include <linux/sh_dma.h>
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#include <linux/sh_timer.h>
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#include <linux/dma-mapping.h>
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#include <mach/dma-register.h>
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#include <mach/r8a7740.h>
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#include <mach/pm-rmobile.h>
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#include <mach/common.h>
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#include <mach/irqs.h>
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#include <asm/mach-types.h>
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@ -276,6 +281,272 @@ static struct platform_device *r8a7740_early_devices[] __initdata = {
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&cmt10_device,
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};
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/* DMA */
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static const struct sh_dmae_slave_config r8a7740_dmae_slaves[] = {
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{
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.slave_id = SHDMA_SLAVE_SDHI0_TX,
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.addr = 0xe6850030,
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.chcr = CHCR_TX(XMIT_SZ_16BIT),
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.mid_rid = 0xc1,
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}, {
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.slave_id = SHDMA_SLAVE_SDHI0_RX,
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.addr = 0xe6850030,
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.chcr = CHCR_RX(XMIT_SZ_16BIT),
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.mid_rid = 0xc2,
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}, {
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.slave_id = SHDMA_SLAVE_SDHI1_TX,
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.addr = 0xe6860030,
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.chcr = CHCR_TX(XMIT_SZ_16BIT),
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.mid_rid = 0xc9,
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}, {
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.slave_id = SHDMA_SLAVE_SDHI1_RX,
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.addr = 0xe6860030,
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.chcr = CHCR_RX(XMIT_SZ_16BIT),
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.mid_rid = 0xca,
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}, {
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.slave_id = SHDMA_SLAVE_SDHI2_TX,
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.addr = 0xe6870030,
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.chcr = CHCR_TX(XMIT_SZ_16BIT),
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.mid_rid = 0xcd,
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}, {
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.slave_id = SHDMA_SLAVE_SDHI2_RX,
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.addr = 0xe6870030,
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.chcr = CHCR_RX(XMIT_SZ_16BIT),
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.mid_rid = 0xce,
|
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}, {
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.slave_id = SHDMA_SLAVE_FSIA_TX,
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.addr = 0xfe1f0024,
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.chcr = CHCR_TX(XMIT_SZ_32BIT),
|
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.mid_rid = 0xb1,
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}, {
|
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.slave_id = SHDMA_SLAVE_FSIA_RX,
|
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.addr = 0xfe1f0020,
|
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.chcr = CHCR_RX(XMIT_SZ_32BIT),
|
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.mid_rid = 0xb2,
|
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}, {
|
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.slave_id = SHDMA_SLAVE_FSIB_TX,
|
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.addr = 0xfe1f0064,
|
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.chcr = CHCR_TX(XMIT_SZ_32BIT),
|
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.mid_rid = 0xb5,
|
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},
|
||||
};
|
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|
||||
#define DMA_CHANNEL(a, b, c) \
|
||||
{ \
|
||||
.offset = a, \
|
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.dmars = b, \
|
||||
.dmars_bit = c, \
|
||||
.chclr_offset = (0x220 - 0x20) + a \
|
||||
}
|
||||
|
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static const struct sh_dmae_channel r8a7740_dmae_channels[] = {
|
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DMA_CHANNEL(0x00, 0, 0),
|
||||
DMA_CHANNEL(0x10, 0, 8),
|
||||
DMA_CHANNEL(0x20, 4, 0),
|
||||
DMA_CHANNEL(0x30, 4, 8),
|
||||
DMA_CHANNEL(0x50, 8, 0),
|
||||
DMA_CHANNEL(0x60, 8, 8),
|
||||
};
|
||||
|
||||
static struct sh_dmae_pdata dma_platform_data = {
|
||||
.slave = r8a7740_dmae_slaves,
|
||||
.slave_num = ARRAY_SIZE(r8a7740_dmae_slaves),
|
||||
.channel = r8a7740_dmae_channels,
|
||||
.channel_num = ARRAY_SIZE(r8a7740_dmae_channels),
|
||||
.ts_low_shift = TS_LOW_SHIFT,
|
||||
.ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT,
|
||||
.ts_high_shift = TS_HI_SHIFT,
|
||||
.ts_high_mask = TS_HI_BIT << TS_HI_SHIFT,
|
||||
.ts_shift = dma_ts_shift,
|
||||
.ts_shift_num = ARRAY_SIZE(dma_ts_shift),
|
||||
.dmaor_init = DMAOR_DME,
|
||||
.chclr_present = 1,
|
||||
};
|
||||
|
||||
/* Resource order important! */
|
||||
static struct resource r8a7740_dmae0_resources[] = {
|
||||
{
|
||||
/* Channel registers and DMAOR */
|
||||
.start = 0xfe008020,
|
||||
.end = 0xfe00828f,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
/* DMARSx */
|
||||
.start = 0xfe009000,
|
||||
.end = 0xfe00900b,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.name = "error_irq",
|
||||
.start = evt2irq(0x20c0),
|
||||
.end = evt2irq(0x20c0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 0-5 */
|
||||
.start = evt2irq(0x2000),
|
||||
.end = evt2irq(0x20a0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
/* Resource order important! */
|
||||
static struct resource r8a7740_dmae1_resources[] = {
|
||||
{
|
||||
/* Channel registers and DMAOR */
|
||||
.start = 0xfe018020,
|
||||
.end = 0xfe01828f,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
/* DMARSx */
|
||||
.start = 0xfe019000,
|
||||
.end = 0xfe01900b,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.name = "error_irq",
|
||||
.start = evt2irq(0x21c0),
|
||||
.end = evt2irq(0x21c0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 0-5 */
|
||||
.start = evt2irq(0x2100),
|
||||
.end = evt2irq(0x21a0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
/* Resource order important! */
|
||||
static struct resource r8a7740_dmae2_resources[] = {
|
||||
{
|
||||
/* Channel registers and DMAOR */
|
||||
.start = 0xfe028020,
|
||||
.end = 0xfe02828f,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
/* DMARSx */
|
||||
.start = 0xfe029000,
|
||||
.end = 0xfe02900b,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.name = "error_irq",
|
||||
.start = evt2irq(0x22c0),
|
||||
.end = evt2irq(0x22c0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 0-5 */
|
||||
.start = evt2irq(0x2200),
|
||||
.end = evt2irq(0x22a0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device dma0_device = {
|
||||
.name = "sh-dma-engine",
|
||||
.id = 0,
|
||||
.resource = r8a7740_dmae0_resources,
|
||||
.num_resources = ARRAY_SIZE(r8a7740_dmae0_resources),
|
||||
.dev = {
|
||||
.platform_data = &dma_platform_data,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device dma1_device = {
|
||||
.name = "sh-dma-engine",
|
||||
.id = 1,
|
||||
.resource = r8a7740_dmae1_resources,
|
||||
.num_resources = ARRAY_SIZE(r8a7740_dmae1_resources),
|
||||
.dev = {
|
||||
.platform_data = &dma_platform_data,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device dma2_device = {
|
||||
.name = "sh-dma-engine",
|
||||
.id = 2,
|
||||
.resource = r8a7740_dmae2_resources,
|
||||
.num_resources = ARRAY_SIZE(r8a7740_dmae2_resources),
|
||||
.dev = {
|
||||
.platform_data = &dma_platform_data,
|
||||
},
|
||||
};
|
||||
|
||||
/* USB-DMAC */
|
||||
static const struct sh_dmae_channel r8a7740_usb_dma_channels[] = {
|
||||
{
|
||||
.offset = 0,
|
||||
}, {
|
||||
.offset = 0x20,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct sh_dmae_slave_config r8a7740_usb_dma_slaves[] = {
|
||||
{
|
||||
.slave_id = SHDMA_SLAVE_USBHS_TX,
|
||||
.chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
|
||||
}, {
|
||||
.slave_id = SHDMA_SLAVE_USBHS_RX,
|
||||
.chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
|
||||
},
|
||||
};
|
||||
|
||||
static struct sh_dmae_pdata usb_dma_platform_data = {
|
||||
.slave = r8a7740_usb_dma_slaves,
|
||||
.slave_num = ARRAY_SIZE(r8a7740_usb_dma_slaves),
|
||||
.channel = r8a7740_usb_dma_channels,
|
||||
.channel_num = ARRAY_SIZE(r8a7740_usb_dma_channels),
|
||||
.ts_low_shift = USBTS_LOW_SHIFT,
|
||||
.ts_low_mask = USBTS_LOW_BIT << USBTS_LOW_SHIFT,
|
||||
.ts_high_shift = USBTS_HI_SHIFT,
|
||||
.ts_high_mask = USBTS_HI_BIT << USBTS_HI_SHIFT,
|
||||
.ts_shift = dma_usbts_shift,
|
||||
.ts_shift_num = ARRAY_SIZE(dma_usbts_shift),
|
||||
.dmaor_init = DMAOR_DME,
|
||||
.chcr_offset = 0x14,
|
||||
.chcr_ie_bit = 1 << 5,
|
||||
.dmaor_is_32bit = 1,
|
||||
.needs_tend_set = 1,
|
||||
.no_dmars = 1,
|
||||
.slave_only = 1,
|
||||
};
|
||||
|
||||
static struct resource r8a7740_usb_dma_resources[] = {
|
||||
{
|
||||
/* Channel registers and DMAOR */
|
||||
.start = 0xe68a0020,
|
||||
.end = 0xe68a0064 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
/* VCR/SWR/DMICR */
|
||||
.start = 0xe68a0000,
|
||||
.end = 0xe68a0014 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels */
|
||||
.start = evt2irq(0x0a00),
|
||||
.end = evt2irq(0x0a00),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device usb_dma_device = {
|
||||
.name = "sh-dma-engine",
|
||||
.id = 3,
|
||||
.resource = r8a7740_usb_dma_resources,
|
||||
.num_resources = ARRAY_SIZE(r8a7740_usb_dma_resources),
|
||||
.dev = {
|
||||
.platform_data = &usb_dma_platform_data,
|
||||
},
|
||||
};
|
||||
|
||||
/* I2C */
|
||||
static struct resource i2c0_resources[] = {
|
||||
[0] = {
|
||||
@ -322,6 +593,10 @@ static struct platform_device i2c1_device = {
|
||||
static struct platform_device *r8a7740_late_devices[] __initdata = {
|
||||
&i2c0_device,
|
||||
&i2c1_device,
|
||||
&dma0_device,
|
||||
&dma1_device,
|
||||
&dma2_device,
|
||||
&usb_dma_device,
|
||||
};
|
||||
|
||||
/*
|
||||
@ -398,10 +673,31 @@ void __init r8a7740_add_standard_devices(void)
|
||||
r8a7740_i2c_workaround(&i2c0_device);
|
||||
r8a7740_i2c_workaround(&i2c1_device);
|
||||
|
||||
/* PM domain */
|
||||
rmobile_init_pm_domain(&r8a7740_pd_a4s);
|
||||
rmobile_init_pm_domain(&r8a7740_pd_a3sp);
|
||||
rmobile_init_pm_domain(&r8a7740_pd_a4lc);
|
||||
|
||||
rmobile_pm_add_subdomain(&r8a7740_pd_a4s, &r8a7740_pd_a3sp);
|
||||
|
||||
/* add devices */
|
||||
platform_add_devices(r8a7740_early_devices,
|
||||
ARRAY_SIZE(r8a7740_early_devices));
|
||||
platform_add_devices(r8a7740_late_devices,
|
||||
ARRAY_SIZE(r8a7740_late_devices));
|
||||
|
||||
/* add devices to PM domain */
|
||||
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif0_device);
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif1_device);
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif2_device);
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif3_device);
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif4_device);
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif5_device);
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif6_device);
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif7_device);
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scifb_device);
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &i2c1_device);
|
||||
}
|
||||
|
||||
static void __init r8a7740_earlytimer_init(void)
|
||||
@ -421,3 +717,49 @@ void __init r8a7740_add_early_devices(void)
|
||||
/* override timer setup with soc-specific code */
|
||||
shmobile_timer.init = r8a7740_earlytimer_init;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_USE_OF
|
||||
|
||||
void __init r8a7740_add_early_devices_dt(void)
|
||||
{
|
||||
shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
|
||||
|
||||
early_platform_add_devices(r8a7740_early_devices,
|
||||
ARRAY_SIZE(r8a7740_early_devices));
|
||||
|
||||
/* setup early console here as well */
|
||||
shmobile_setup_console();
|
||||
}
|
||||
|
||||
static const struct of_dev_auxdata r8a7740_auxdata_lookup[] __initconst = {
|
||||
{ }
|
||||
};
|
||||
|
||||
void __init r8a7740_add_standard_devices_dt(void)
|
||||
{
|
||||
/* clocks are setup late during boot in the case of DT */
|
||||
r8a7740_clock_init(0);
|
||||
|
||||
platform_add_devices(r8a7740_early_devices,
|
||||
ARRAY_SIZE(r8a7740_early_devices));
|
||||
|
||||
of_platform_populate(NULL, of_default_bus_match_table,
|
||||
r8a7740_auxdata_lookup, NULL);
|
||||
}
|
||||
|
||||
static const char *r8a7740_boards_compat_dt[] __initdata = {
|
||||
"renesas,r8a7740",
|
||||
NULL,
|
||||
};
|
||||
|
||||
DT_MACHINE_START(SH7372_DT, "Generic R8A7740 (Flattened Device Tree)")
|
||||
.map_io = r8a7740_map_io,
|
||||
.init_early = r8a7740_add_early_devices_dt,
|
||||
.init_irq = r8a7740_init_irq,
|
||||
.handle_irq = shmobile_handle_irq_intc,
|
||||
.init_machine = r8a7740_add_standard_devices_dt,
|
||||
.timer = &shmobile_timer,
|
||||
.dt_compat = r8a7740_boards_compat_dt,
|
||||
MACHINE_END
|
||||
|
||||
#endif /* CONFIG_USE_OF */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user