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mv643xx_eth: identify ports by struct mv643xx_private *
Instead of identifying individual mv643xx ethernet ports by only their port number, identify them by their struct mv643xx_private *, as just a port number has no meaning when there are multiple mv643xx_eth silicon blocks in the system. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
This commit is contained in:
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c0d0f2caa1
commit
afdb57a249
@ -564,42 +564,44 @@ struct mv643xx_private {
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/* Static function declarations */
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static void eth_port_init(struct mv643xx_private *mp);
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static void eth_port_reset(unsigned int eth_port_num);
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static void eth_port_reset(struct mv643xx_private *mp);
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static void eth_port_start(struct net_device *dev);
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static void ethernet_phy_reset(unsigned int eth_port_num);
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static void ethernet_phy_reset(struct mv643xx_private *mp);
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static void eth_port_write_smi_reg(unsigned int eth_port_num,
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static void eth_port_write_smi_reg(struct mv643xx_private *mp,
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unsigned int phy_reg, unsigned int value);
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static void eth_port_read_smi_reg(unsigned int eth_port_num,
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static void eth_port_read_smi_reg(struct mv643xx_private *mp,
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unsigned int phy_reg, unsigned int *value);
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static void eth_clear_mib_counters(unsigned int eth_port_num);
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static void eth_clear_mib_counters(struct mv643xx_private *mp);
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static ETH_FUNC_RET_STATUS eth_port_receive(struct mv643xx_private *mp,
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struct pkt_info *p_pkt_info);
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static ETH_FUNC_RET_STATUS eth_rx_return_buff(struct mv643xx_private *mp,
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struct pkt_info *p_pkt_info);
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static void eth_port_uc_addr_get(unsigned int port_num, unsigned char *p_addr);
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static void eth_port_uc_addr_set(unsigned int port_num, unsigned char *p_addr);
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static void eth_port_uc_addr_get(struct mv643xx_private *mp,
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unsigned char *p_addr);
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static void eth_port_uc_addr_set(struct mv643xx_private *mp,
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unsigned char *p_addr);
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static void eth_port_set_multicast_list(struct net_device *);
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static void mv643xx_eth_port_enable_tx(unsigned int port_num,
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static void mv643xx_eth_port_enable_tx(struct mv643xx_private *mp,
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unsigned int queues);
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static void mv643xx_eth_port_enable_rx(unsigned int port_num,
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static void mv643xx_eth_port_enable_rx(struct mv643xx_private *mp,
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unsigned int queues);
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static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num);
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static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num);
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static unsigned int mv643xx_eth_port_disable_tx(struct mv643xx_private *mp);
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static unsigned int mv643xx_eth_port_disable_rx(struct mv643xx_private *mp);
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static int mv643xx_eth_open(struct net_device *);
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static int mv643xx_eth_stop(struct net_device *);
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static void eth_port_init_mac_tables(unsigned int eth_port_num);
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static void eth_port_init_mac_tables(struct mv643xx_private *mp);
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#ifdef MV643XX_NAPI
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static int mv643xx_poll(struct napi_struct *napi, int budget);
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#endif
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static int ethernet_phy_get(unsigned int eth_port_num);
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static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr);
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static int ethernet_phy_detect(unsigned int eth_port_num);
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static int ethernet_phy_get(struct mv643xx_private *mp);
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static void ethernet_phy_set(struct mv643xx_private *mp, int phy_addr);
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static int ethernet_phy_detect(struct mv643xx_private *mp);
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static int mv643xx_mdio_read(struct net_device *dev, int phy_id, int location);
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static void mv643xx_mdio_write(struct net_device *dev, int phy_id, int location, int val);
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static int mv643xx_eth_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
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@ -726,10 +728,9 @@ static inline void mv643xx_eth_rx_refill_descs_timer_wrapper(unsigned long data)
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static void mv643xx_eth_update_mac_address(struct net_device *dev)
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{
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struct mv643xx_private *mp = netdev_priv(dev);
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unsigned int port_num = mp->port_num;
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eth_port_init_mac_tables(port_num);
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eth_port_uc_addr_set(port_num, dev->dev_addr);
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eth_port_init_mac_tables(mp);
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eth_port_uc_addr_set(mp, dev->dev_addr);
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}
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/*
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@ -811,7 +812,7 @@ static void mv643xx_eth_tx_timeout_task(struct work_struct *ugly)
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netif_stop_queue(dev);
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eth_port_reset(mp->port_num);
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eth_port_reset(mp);
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eth_port_start(dev);
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if (mp->tx_ring_size - mp->tx_desc_count >= MAX_DESCS_PER_SKB)
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@ -1011,14 +1012,14 @@ static void mv643xx_eth_update_pscr(struct net_device *dev,
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if ((o_pscr & SERIAL_PORT_ENABLE) == 0)
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mv_write(PORT_SERIAL_CONTROL_REG(port_num), n_pscr);
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else {
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queues = mv643xx_eth_port_disable_tx(port_num);
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queues = mv643xx_eth_port_disable_tx(mp);
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o_pscr &= ~SERIAL_PORT_ENABLE;
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mv_write(PORT_SERIAL_CONTROL_REG(port_num), o_pscr);
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mv_write(PORT_SERIAL_CONTROL_REG(port_num), n_pscr);
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mv_write(PORT_SERIAL_CONTROL_REG(port_num), n_pscr);
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if (queues)
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mv643xx_eth_port_enable_tx(port_num, queues);
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mv643xx_eth_port_enable_tx(mp, queues);
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}
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}
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}
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@ -1059,8 +1060,7 @@ static irqreturn_t mv643xx_eth_int_handler(int irq, void *dev_id)
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if (mii_link_ok(&mp->mii)) {
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mii_ethtool_gset(&mp->mii, &cmd);
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mv643xx_eth_update_pscr(dev, &cmd);
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mv643xx_eth_port_enable_tx(port_num,
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ETH_TX_QUEUES_ENABLED);
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mv643xx_eth_port_enable_tx(mp, ETH_TX_QUEUES_ENABLED);
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if (!netif_carrier_ok(dev)) {
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netif_carrier_on(dev);
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if (mp->tx_ring_size - mp->tx_desc_count >=
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@ -1114,7 +1114,7 @@ static irqreturn_t mv643xx_eth_int_handler(int irq, void *dev_id)
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* , and the required delay of the interrupt in usec.
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*
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* INPUT:
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* unsigned int eth_port_num Ethernet port number
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* struct mv643xx_private *mp Ethernet port
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* unsigned int t_clk t_clk of the MV-643xx chip in HZ units
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* unsigned int delay Delay in usec
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*
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@ -1125,15 +1125,16 @@ static irqreturn_t mv643xx_eth_int_handler(int irq, void *dev_id)
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* The interrupt coalescing value set in the gigE port.
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*
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*/
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static unsigned int eth_port_set_rx_coal(unsigned int eth_port_num,
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static unsigned int eth_port_set_rx_coal(struct mv643xx_private *mp,
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unsigned int t_clk, unsigned int delay)
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{
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unsigned int port_num = mp->port_num;
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unsigned int coal = ((t_clk / 1000000) * delay) / 64;
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/* Set RX Coalescing mechanism */
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mv_write(SDMA_CONFIG_REG(eth_port_num),
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mv_write(SDMA_CONFIG_REG(port_num),
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((coal & 0x3fff) << 8) |
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(mv_read(SDMA_CONFIG_REG(eth_port_num))
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(mv_read(SDMA_CONFIG_REG(port_num))
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& 0xffc000ff));
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return coal;
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@ -1152,7 +1153,7 @@ static unsigned int eth_port_set_rx_coal(unsigned int eth_port_num,
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* MV-643xx chip and the required delay in the interrupt in uSec
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*
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* INPUT:
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* unsigned int eth_port_num Ethernet port number
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* struct mv643xx_private *mp Ethernet port
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* unsigned int t_clk t_clk of the MV-643xx chip in HZ units
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* unsigned int delay Delay in uSeconds
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*
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@ -1163,13 +1164,14 @@ static unsigned int eth_port_set_rx_coal(unsigned int eth_port_num,
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* The interrupt coalescing value set in the gigE port.
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*
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*/
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static unsigned int eth_port_set_tx_coal(unsigned int eth_port_num,
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static unsigned int eth_port_set_tx_coal(struct mv643xx_private *mp,
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unsigned int t_clk, unsigned int delay)
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{
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unsigned int coal;
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coal = ((t_clk / 1000000) * delay) / 64;
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unsigned int coal = ((t_clk / 1000000) * delay) / 64;
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/* Set TX Coalescing mechanism */
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mv_write(TX_FIFO_URGENT_THRESHOLD_REG(eth_port_num), coal << 4);
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mv_write(TX_FIFO_URGENT_THRESHOLD_REG(mp->port_num), coal << 4);
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return coal;
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}
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@ -1408,11 +1410,11 @@ static int mv643xx_eth_open(struct net_device *dev)
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#ifdef MV643XX_COAL
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mp->rx_int_coal =
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eth_port_set_rx_coal(port_num, 133000000, MV643XX_RX_COAL);
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eth_port_set_rx_coal(mp, 133000000, MV643XX_RX_COAL);
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#endif
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mp->tx_int_coal =
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eth_port_set_tx_coal(port_num, 133000000, MV643XX_TX_COAL);
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eth_port_set_tx_coal(mp, 133000000, MV643XX_TX_COAL);
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/* Unmask phy and link status changes interrupts */
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mv_write(INTERRUPT_EXTEND_MASK_REG(port_num), ETH_INT_UNMASK_ALL_EXT);
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@ -1437,7 +1439,7 @@ static void mv643xx_eth_free_tx_rings(struct net_device *dev)
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struct mv643xx_private *mp = netdev_priv(dev);
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/* Stop Tx Queues */
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mv643xx_eth_port_disable_tx(mp->port_num);
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mv643xx_eth_port_disable_tx(mp);
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/* Free outstanding skb's on TX ring */
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mv643xx_eth_free_all_tx_descs(dev);
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@ -1455,11 +1457,10 @@ static void mv643xx_eth_free_tx_rings(struct net_device *dev)
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static void mv643xx_eth_free_rx_rings(struct net_device *dev)
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{
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struct mv643xx_private *mp = netdev_priv(dev);
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unsigned int port_num = mp->port_num;
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int curr;
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/* Stop RX Queues */
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mv643xx_eth_port_disable_rx(port_num);
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mv643xx_eth_port_disable_rx(mp);
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/* Free preallocated skb's on RX rings */
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for (curr = 0; mp->rx_desc_count && curr < mp->rx_ring_size; curr++) {
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@ -1508,7 +1509,7 @@ static int mv643xx_eth_stop(struct net_device *dev)
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netif_carrier_off(dev);
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netif_stop_queue(dev);
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eth_port_reset(mp->port_num);
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eth_port_reset(mp);
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mv643xx_eth_free_tx_rings(dev);
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mv643xx_eth_free_rx_rings(dev);
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@ -1701,7 +1702,7 @@ static void eth_tx_submit_descs_for_skb(struct mv643xx_private *mp,
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/* ensure all descriptors are written before poking hardware */
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wmb();
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mv643xx_eth_port_enable_tx(mp->port_num, ETH_TX_QUEUES_ENABLED);
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mv643xx_eth_port_enable_tx(mp, ETH_TX_QUEUES_ENABLED);
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mp->tx_desc_count += nr_frags + 1;
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}
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@ -1876,7 +1877,7 @@ static int mv643xx_eth_probe(struct platform_device *pdev)
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port_num = mp->port_num = pd->port_number;
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/* set default config values */
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eth_port_uc_addr_get(port_num, dev->dev_addr);
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eth_port_uc_addr_get(mp, dev->dev_addr);
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mp->rx_ring_size = PORT_DEFAULT_RECEIVE_QUEUE_SIZE;
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mp->tx_ring_size = PORT_DEFAULT_TRANSMIT_QUEUE_SIZE;
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@ -1884,7 +1885,7 @@ static int mv643xx_eth_probe(struct platform_device *pdev)
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memcpy(dev->dev_addr, pd->mac_addr, 6);
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if (pd->phy_addr || pd->force_phy_addr)
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ethernet_phy_set(port_num, pd->phy_addr);
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ethernet_phy_set(mp, pd->phy_addr);
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if (pd->rx_queue_size)
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mp->rx_ring_size = pd->rx_queue_size;
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@ -1909,19 +1910,19 @@ static int mv643xx_eth_probe(struct platform_device *pdev)
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mp->mii.dev = dev;
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mp->mii.mdio_read = mv643xx_mdio_read;
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mp->mii.mdio_write = mv643xx_mdio_write;
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mp->mii.phy_id = ethernet_phy_get(port_num);
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mp->mii.phy_id = ethernet_phy_get(mp);
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mp->mii.phy_id_mask = 0x3f;
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mp->mii.reg_num_mask = 0x1f;
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err = ethernet_phy_detect(port_num);
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err = ethernet_phy_detect(mp);
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if (err) {
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pr_debug("MV643xx ethernet port %d: "
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"No PHY detected at addr %d\n",
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port_num, ethernet_phy_get(port_num));
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port_num, ethernet_phy_get(mp));
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goto out;
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}
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ethernet_phy_reset(port_num);
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ethernet_phy_reset(mp);
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mp->mii.supports_gmii = mii_check_gmii_support(&mp->mii);
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mv643xx_init_ethtool_cmd(dev, mp->mii.phy_id, speed, duplex, &cmd);
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mv643xx_eth_update_pscr(dev, &cmd);
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@ -2016,7 +2017,7 @@ static void mv643xx_eth_shutdown(struct platform_device *pdev)
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mv_write(INTERRUPT_MASK_REG(port_num), 0);
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mv_read (INTERRUPT_MASK_REG(port_num));
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eth_port_reset(port_num);
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eth_port_reset(mp);
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}
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static struct platform_driver mv643xx_eth_driver = {
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@ -2205,12 +2206,9 @@ MODULE_ALIAS("platform:mv643xx_eth");
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* return_info Tx/Rx user resource return information.
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*/
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/* PHY routines */
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static int ethernet_phy_get(unsigned int eth_port_num);
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static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr);
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/* Ethernet Port routines */
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static void eth_port_set_filter_table_entry(int table, unsigned char entry);
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static void eth_port_set_filter_table_entry(struct mv643xx_private *mp,
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int table, unsigned char entry);
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/*
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* eth_port_init - Initialize the Ethernet port driver
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@ -2240,9 +2238,9 @@ static void eth_port_init(struct mv643xx_private *mp)
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{
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mp->rx_resource_err = 0;
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eth_port_reset(mp->port_num);
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eth_port_reset(mp);
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eth_port_init_mac_tables(mp->port_num);
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eth_port_init_mac_tables(mp);
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}
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/*
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@ -2291,7 +2289,7 @@ static void eth_port_start(struct net_device *dev)
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(u32)((struct eth_rx_desc *)mp->rx_desc_dma + rx_curr_desc));
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/* Add the assigned Ethernet address to the port's address table */
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eth_port_uc_addr_set(port_num, dev->dev_addr);
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eth_port_uc_addr_set(mp, dev->dev_addr);
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/* Assign port configuration and command. */
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mv_write(PORT_CONFIG_REG(port_num),
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@ -2321,22 +2319,24 @@ static void eth_port_start(struct net_device *dev)
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PORT_SDMA_CONFIG_DEFAULT_VALUE);
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/* Enable port Rx. */
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mv643xx_eth_port_enable_rx(port_num, ETH_RX_QUEUES_ENABLED);
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mv643xx_eth_port_enable_rx(mp, ETH_RX_QUEUES_ENABLED);
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/* Disable port bandwidth limits by clearing MTU register */
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mv_write(MAXIMUM_TRANSMIT_UNIT(port_num), 0);
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/* save phy settings across reset */
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mv643xx_get_settings(dev, ðtool_cmd);
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ethernet_phy_reset(mp->port_num);
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ethernet_phy_reset(mp);
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mv643xx_set_settings(dev, ðtool_cmd);
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}
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/*
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* eth_port_uc_addr_set - Write a MAC address into the port's hw registers
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*/
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static void eth_port_uc_addr_set(unsigned int port_num, unsigned char *p_addr)
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static void eth_port_uc_addr_set(struct mv643xx_private *mp,
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unsigned char *p_addr)
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{
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unsigned int port_num = mp->port_num;
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unsigned int mac_h;
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unsigned int mac_l;
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int table;
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@ -2350,14 +2350,16 @@ static void eth_port_uc_addr_set(unsigned int port_num, unsigned char *p_addr)
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/* Accept frames with this address */
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table = DA_FILTER_UNICAST_TABLE_BASE(port_num);
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eth_port_set_filter_table_entry(table, p_addr[5] & 0x0f);
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eth_port_set_filter_table_entry(mp, table, p_addr[5] & 0x0f);
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}
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/*
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* eth_port_uc_addr_get - Read the MAC address from the port's hw registers
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*/
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static void eth_port_uc_addr_get(unsigned int port_num, unsigned char *p_addr)
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static void eth_port_uc_addr_get(struct mv643xx_private *mp,
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unsigned char *p_addr)
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{
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unsigned int port_num = mp->port_num;
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unsigned int mac_h;
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unsigned int mac_l;
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@ -2381,7 +2383,8 @@ static void eth_port_uc_addr_get(unsigned int port_num, unsigned char *p_addr)
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* 3-1 Queue (ETH_Q0=0)
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* 7-4 Reserved = 0;
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*/
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static void eth_port_set_filter_table_entry(int table, unsigned char entry)
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static void eth_port_set_filter_table_entry(struct mv643xx_private *mp,
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int table, unsigned char entry)
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{
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unsigned int table_reg;
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unsigned int tbl_offset;
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@ -2410,8 +2413,9 @@ static void eth_port_set_filter_table_entry(int table, unsigned char entry)
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* In either case, eth_port_set_filter_table_entry() is then called
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* to set to set the actual table entry.
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*/
|
||||
static void eth_port_mc_addr(unsigned int eth_port_num, unsigned char *p_addr)
|
||||
static void eth_port_mc_addr(struct mv643xx_private *mp, unsigned char *p_addr)
|
||||
{
|
||||
unsigned int port_num = mp->port_num;
|
||||
unsigned int mac_h;
|
||||
unsigned int mac_l;
|
||||
unsigned char crc_result = 0;
|
||||
@ -2422,9 +2426,8 @@ static void eth_port_mc_addr(unsigned int eth_port_num, unsigned char *p_addr)
|
||||
|
||||
if ((p_addr[0] == 0x01) && (p_addr[1] == 0x00) &&
|
||||
(p_addr[2] == 0x5E) && (p_addr[3] == 0x00) && (p_addr[4] == 0x00)) {
|
||||
table = DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
|
||||
(eth_port_num);
|
||||
eth_port_set_filter_table_entry(table, p_addr[5]);
|
||||
table = DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(port_num);
|
||||
eth_port_set_filter_table_entry(mp, table, p_addr[5]);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -2496,8 +2499,8 @@ static void eth_port_mc_addr(unsigned int eth_port_num, unsigned char *p_addr)
|
||||
for (i = 0; i < 8; i++)
|
||||
crc_result = crc_result | (crc[i] << i);
|
||||
|
||||
table = DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num);
|
||||
eth_port_set_filter_table_entry(table, crc_result);
|
||||
table = DA_FILTER_OTHER_MULTICAST_TABLE_BASE(port_num);
|
||||
eth_port_set_filter_table_entry(mp, table, crc_result);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -2559,7 +2562,7 @@ static void eth_port_set_multicast_list(struct net_device *dev)
|
||||
(i < 256) && (mc_list != NULL) && (i < dev->mc_count);
|
||||
i++, mc_list = mc_list->next)
|
||||
if (mc_list->dmi_addrlen == 6)
|
||||
eth_port_mc_addr(eth_port_num, mc_list->dmi_addr);
|
||||
eth_port_mc_addr(mp, mc_list->dmi_addr);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -2570,7 +2573,7 @@ static void eth_port_set_multicast_list(struct net_device *dev)
|
||||
* Other Multicast) and set each entry to 0.
|
||||
*
|
||||
* INPUT:
|
||||
* unsigned int eth_port_num Ethernet Port number.
|
||||
* struct mv643xx_private *mp Ethernet Port.
|
||||
*
|
||||
* OUTPUT:
|
||||
* Multicast and Unicast packets are rejected.
|
||||
@ -2578,22 +2581,23 @@ static void eth_port_set_multicast_list(struct net_device *dev)
|
||||
* RETURN:
|
||||
* None.
|
||||
*/
|
||||
static void eth_port_init_mac_tables(unsigned int eth_port_num)
|
||||
static void eth_port_init_mac_tables(struct mv643xx_private *mp)
|
||||
{
|
||||
unsigned int port_num = mp->port_num;
|
||||
int table_index;
|
||||
|
||||
/* Clear DA filter unicast table (Ex_dFUT) */
|
||||
for (table_index = 0; table_index <= 0xC; table_index += 4)
|
||||
mv_write(DA_FILTER_UNICAST_TABLE_BASE
|
||||
(eth_port_num) + table_index, 0);
|
||||
mv_write(DA_FILTER_UNICAST_TABLE_BASE(port_num) +
|
||||
table_index, 0);
|
||||
|
||||
for (table_index = 0; table_index <= 0xFC; table_index += 4) {
|
||||
/* Clear DA filter special multicast table (Ex_dFSMT) */
|
||||
mv_write(DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
|
||||
(eth_port_num) + table_index, 0);
|
||||
mv_write(DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(port_num) +
|
||||
table_index, 0);
|
||||
/* Clear DA filter other multicast table (Ex_dFOMT) */
|
||||
mv_write(DA_FILTER_OTHER_MULTICAST_TABLE_BASE
|
||||
(eth_port_num) + table_index, 0);
|
||||
mv_write(DA_FILTER_OTHER_MULTICAST_TABLE_BASE(port_num) +
|
||||
table_index, 0);
|
||||
}
|
||||
}
|
||||
|
||||
@ -2605,7 +2609,7 @@ static void eth_port_init_mac_tables(unsigned int eth_port_num)
|
||||
* A read from the MIB counter will reset the counter.
|
||||
*
|
||||
* INPUT:
|
||||
* unsigned int eth_port_num Ethernet Port number.
|
||||
* struct mv643xx_private *mp Ethernet Port.
|
||||
*
|
||||
* OUTPUT:
|
||||
* After reading all MIB counters, the counters resets.
|
||||
@ -2614,14 +2618,15 @@ static void eth_port_init_mac_tables(unsigned int eth_port_num)
|
||||
* MIB counter value.
|
||||
*
|
||||
*/
|
||||
static void eth_clear_mib_counters(unsigned int eth_port_num)
|
||||
static void eth_clear_mib_counters(struct mv643xx_private *mp)
|
||||
{
|
||||
unsigned int port_num = mp->port_num;
|
||||
int i;
|
||||
|
||||
/* Perform dummy reads from MIB counters */
|
||||
for (i = ETH_MIB_GOOD_OCTETS_RECEIVED_LOW; i < ETH_MIB_LATE_COLLISION;
|
||||
i += 4)
|
||||
mv_read(MIB_COUNTERS_BASE(eth_port_num) + i);
|
||||
mv_read(MIB_COUNTERS_BASE(port_num) + i);
|
||||
}
|
||||
|
||||
static inline u32 read_mib(struct mv643xx_private *mp, int offset)
|
||||
@ -2662,7 +2667,7 @@ static void eth_update_mib_counters(struct mv643xx_private *mp)
|
||||
* the specified port.
|
||||
*
|
||||
* INPUT:
|
||||
* unsigned int eth_port_num Ethernet Port number.
|
||||
* struct mv643xx_private *mp Ethernet Port.
|
||||
*
|
||||
* OUTPUT:
|
||||
* None
|
||||
@ -2672,22 +2677,22 @@ static void eth_update_mib_counters(struct mv643xx_private *mp)
|
||||
* -ENODEV on failure
|
||||
*
|
||||
*/
|
||||
static int ethernet_phy_detect(unsigned int port_num)
|
||||
static int ethernet_phy_detect(struct mv643xx_private *mp)
|
||||
{
|
||||
unsigned int phy_reg_data0;
|
||||
int auto_neg;
|
||||
|
||||
eth_port_read_smi_reg(port_num, 0, &phy_reg_data0);
|
||||
eth_port_read_smi_reg(mp, 0, &phy_reg_data0);
|
||||
auto_neg = phy_reg_data0 & 0x1000;
|
||||
phy_reg_data0 ^= 0x1000; /* invert auto_neg */
|
||||
eth_port_write_smi_reg(port_num, 0, phy_reg_data0);
|
||||
eth_port_write_smi_reg(mp, 0, phy_reg_data0);
|
||||
|
||||
eth_port_read_smi_reg(port_num, 0, &phy_reg_data0);
|
||||
eth_port_read_smi_reg(mp, 0, &phy_reg_data0);
|
||||
if ((phy_reg_data0 & 0x1000) == auto_neg)
|
||||
return -ENODEV; /* change didn't take */
|
||||
|
||||
phy_reg_data0 ^= 0x1000;
|
||||
eth_port_write_smi_reg(port_num, 0, phy_reg_data0);
|
||||
eth_port_write_smi_reg(mp, 0, phy_reg_data0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -2698,7 +2703,7 @@ static int ethernet_phy_detect(unsigned int port_num)
|
||||
* This routine returns the given ethernet port PHY address.
|
||||
*
|
||||
* INPUT:
|
||||
* unsigned int eth_port_num Ethernet Port number.
|
||||
* struct mv643xx_private *mp Ethernet Port.
|
||||
*
|
||||
* OUTPUT:
|
||||
* None.
|
||||
@ -2707,13 +2712,13 @@ static int ethernet_phy_detect(unsigned int port_num)
|
||||
* PHY address.
|
||||
*
|
||||
*/
|
||||
static int ethernet_phy_get(unsigned int eth_port_num)
|
||||
static int ethernet_phy_get(struct mv643xx_private *mp)
|
||||
{
|
||||
unsigned int reg_data;
|
||||
|
||||
reg_data = mv_read(PHY_ADDR_REG);
|
||||
|
||||
return ((reg_data >> (5 * eth_port_num)) & 0x1f);
|
||||
return ((reg_data >> (5 * mp->port_num)) & 0x1f);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -2723,7 +2728,7 @@ static int ethernet_phy_get(unsigned int eth_port_num)
|
||||
* This routine sets the given ethernet port PHY address.
|
||||
*
|
||||
* INPUT:
|
||||
* unsigned int eth_port_num Ethernet Port number.
|
||||
* struct mv643xx_private *mp Ethernet Port.
|
||||
* int phy_addr PHY address.
|
||||
*
|
||||
* OUTPUT:
|
||||
@ -2733,10 +2738,10 @@ static int ethernet_phy_get(unsigned int eth_port_num)
|
||||
* None.
|
||||
*
|
||||
*/
|
||||
static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr)
|
||||
static void ethernet_phy_set(struct mv643xx_private *mp, int phy_addr)
|
||||
{
|
||||
u32 reg_data;
|
||||
int addr_shift = 5 * eth_port_num;
|
||||
int addr_shift = 5 * mp->port_num;
|
||||
|
||||
reg_data = mv_read(PHY_ADDR_REG);
|
||||
reg_data &= ~(0x1f << addr_shift);
|
||||
@ -2751,7 +2756,7 @@ static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr)
|
||||
* This routine utilizes the SMI interface to reset the ethernet port PHY.
|
||||
*
|
||||
* INPUT:
|
||||
* unsigned int eth_port_num Ethernet Port number.
|
||||
* struct mv643xx_private *mp Ethernet Port.
|
||||
*
|
||||
* OUTPUT:
|
||||
* The PHY is reset.
|
||||
@ -2760,36 +2765,37 @@ static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr)
|
||||
* None.
|
||||
*
|
||||
*/
|
||||
static void ethernet_phy_reset(unsigned int eth_port_num)
|
||||
static void ethernet_phy_reset(struct mv643xx_private *mp)
|
||||
{
|
||||
unsigned int phy_reg_data;
|
||||
|
||||
/* Reset the PHY */
|
||||
eth_port_read_smi_reg(eth_port_num, 0, &phy_reg_data);
|
||||
eth_port_read_smi_reg(mp, 0, &phy_reg_data);
|
||||
phy_reg_data |= 0x8000; /* Set bit 15 to reset the PHY */
|
||||
eth_port_write_smi_reg(eth_port_num, 0, phy_reg_data);
|
||||
eth_port_write_smi_reg(mp, 0, phy_reg_data);
|
||||
|
||||
/* wait for PHY to come out of reset */
|
||||
do {
|
||||
udelay(1);
|
||||
eth_port_read_smi_reg(eth_port_num, 0, &phy_reg_data);
|
||||
eth_port_read_smi_reg(mp, 0, &phy_reg_data);
|
||||
} while (phy_reg_data & 0x8000);
|
||||
}
|
||||
|
||||
static void mv643xx_eth_port_enable_tx(unsigned int port_num,
|
||||
static void mv643xx_eth_port_enable_tx(struct mv643xx_private *mp,
|
||||
unsigned int queues)
|
||||
{
|
||||
mv_write(TRANSMIT_QUEUE_COMMAND_REG(port_num), queues);
|
||||
mv_write(TRANSMIT_QUEUE_COMMAND_REG(mp->port_num), queues);
|
||||
}
|
||||
|
||||
static void mv643xx_eth_port_enable_rx(unsigned int port_num,
|
||||
static void mv643xx_eth_port_enable_rx(struct mv643xx_private *mp,
|
||||
unsigned int queues)
|
||||
{
|
||||
mv_write(RECEIVE_QUEUE_COMMAND_REG(port_num), queues);
|
||||
mv_write(RECEIVE_QUEUE_COMMAND_REG(mp->port_num), queues);
|
||||
}
|
||||
|
||||
static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num)
|
||||
static unsigned int mv643xx_eth_port_disable_tx(struct mv643xx_private *mp)
|
||||
{
|
||||
unsigned int port_num = mp->port_num;
|
||||
u32 queues;
|
||||
|
||||
/* Stop Tx port activity. Check port Tx activity. */
|
||||
@ -2812,8 +2818,9 @@ static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num)
|
||||
return queues;
|
||||
}
|
||||
|
||||
static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num)
|
||||
static unsigned int mv643xx_eth_port_disable_rx(struct mv643xx_private *mp)
|
||||
{
|
||||
unsigned int port_num = mp->port_num;
|
||||
u32 queues;
|
||||
|
||||
/* Stop Rx port activity. Check port Rx activity. */
|
||||
@ -2840,7 +2847,7 @@ static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num)
|
||||
* idle state after this command is performed and the port is disabled.
|
||||
*
|
||||
* INPUT:
|
||||
* unsigned int eth_port_num Ethernet Port number.
|
||||
* struct mv643xx_private *mp Ethernet Port.
|
||||
*
|
||||
* OUTPUT:
|
||||
* Channel activity is halted.
|
||||
@ -2849,15 +2856,16 @@ static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num)
|
||||
* None.
|
||||
*
|
||||
*/
|
||||
static void eth_port_reset(unsigned int port_num)
|
||||
static void eth_port_reset(struct mv643xx_private *mp)
|
||||
{
|
||||
unsigned int port_num = mp->port_num;
|
||||
unsigned int reg_data;
|
||||
|
||||
mv643xx_eth_port_disable_tx(port_num);
|
||||
mv643xx_eth_port_disable_rx(port_num);
|
||||
mv643xx_eth_port_disable_tx(mp);
|
||||
mv643xx_eth_port_disable_rx(mp);
|
||||
|
||||
/* Clear all MIB counters */
|
||||
eth_clear_mib_counters(port_num);
|
||||
eth_clear_mib_counters(mp);
|
||||
|
||||
/* Reset the Enable bit in the Configuration Register */
|
||||
reg_data = mv_read(PORT_SERIAL_CONTROL_REG(port_num));
|
||||
@ -2876,7 +2884,7 @@ static void eth_port_reset(unsigned int port_num)
|
||||
* order to perform PHY register read.
|
||||
*
|
||||
* INPUT:
|
||||
* unsigned int port_num Ethernet Port number.
|
||||
* struct mv643xx_private *mp Ethernet Port.
|
||||
* unsigned int phy_reg PHY register address offset.
|
||||
* unsigned int *value Register value buffer.
|
||||
*
|
||||
@ -2888,10 +2896,10 @@ static void eth_port_reset(unsigned int port_num)
|
||||
* true otherwise.
|
||||
*
|
||||
*/
|
||||
static void eth_port_read_smi_reg(unsigned int port_num,
|
||||
static void eth_port_read_smi_reg(struct mv643xx_private *mp,
|
||||
unsigned int phy_reg, unsigned int *value)
|
||||
{
|
||||
int phy_addr = ethernet_phy_get(port_num);
|
||||
int phy_addr = ethernet_phy_get(mp);
|
||||
unsigned long flags;
|
||||
int i;
|
||||
|
||||
@ -2901,7 +2909,8 @@ static void eth_port_read_smi_reg(unsigned int port_num,
|
||||
/* wait for the SMI register to become available */
|
||||
for (i = 0; mv_read(SMI_REG) & ETH_SMI_BUSY; i++) {
|
||||
if (i == PHY_WAIT_ITERATIONS) {
|
||||
printk("mv643xx PHY busy timeout, port %d\n", port_num);
|
||||
printk("mv643xx PHY busy timeout, port %d\n",
|
||||
mp->port_num);
|
||||
goto out;
|
||||
}
|
||||
udelay(PHY_WAIT_MICRO_SECONDS);
|
||||
@ -2913,7 +2922,8 @@ static void eth_port_read_smi_reg(unsigned int port_num,
|
||||
/* now wait for the data to be valid */
|
||||
for (i = 0; !(mv_read(SMI_REG) & ETH_SMI_READ_VALID); i++) {
|
||||
if (i == PHY_WAIT_ITERATIONS) {
|
||||
printk("mv643xx PHY read timeout, port %d\n", port_num);
|
||||
printk("mv643xx PHY read timeout, port %d\n",
|
||||
mp->port_num);
|
||||
goto out;
|
||||
}
|
||||
udelay(PHY_WAIT_MICRO_SECONDS);
|
||||
@ -2932,7 +2942,7 @@ out:
|
||||
* order to perform writes to PHY registers.
|
||||
*
|
||||
* INPUT:
|
||||
* unsigned int eth_port_num Ethernet Port number.
|
||||
* struct mv643xx_private *mp Ethernet Port.
|
||||
* unsigned int phy_reg PHY register address offset.
|
||||
* unsigned int value Register value.
|
||||
*
|
||||
@ -2944,14 +2954,14 @@ out:
|
||||
* true otherwise.
|
||||
*
|
||||
*/
|
||||
static void eth_port_write_smi_reg(unsigned int eth_port_num,
|
||||
static void eth_port_write_smi_reg(struct mv643xx_private *mp,
|
||||
unsigned int phy_reg, unsigned int value)
|
||||
{
|
||||
int phy_addr;
|
||||
int i;
|
||||
unsigned long flags;
|
||||
|
||||
phy_addr = ethernet_phy_get(eth_port_num);
|
||||
phy_addr = ethernet_phy_get(mp);
|
||||
|
||||
/* the SMI register is a shared resource */
|
||||
spin_lock_irqsave(&mv643xx_eth_phy_lock, flags);
|
||||
@ -2960,7 +2970,7 @@ static void eth_port_write_smi_reg(unsigned int eth_port_num,
|
||||
for (i = 0; mv_read(SMI_REG) & ETH_SMI_BUSY; i++) {
|
||||
if (i == PHY_WAIT_ITERATIONS) {
|
||||
printk("mv643xx PHY busy timeout, port %d\n",
|
||||
eth_port_num);
|
||||
mp->port_num);
|
||||
goto out;
|
||||
}
|
||||
udelay(PHY_WAIT_MICRO_SECONDS);
|
||||
@ -2977,17 +2987,17 @@ out:
|
||||
*/
|
||||
static int mv643xx_mdio_read(struct net_device *dev, int phy_id, int location)
|
||||
{
|
||||
int val;
|
||||
struct mv643xx_private *mp = netdev_priv(dev);
|
||||
int val;
|
||||
|
||||
eth_port_read_smi_reg(mp->port_num, location, &val);
|
||||
eth_port_read_smi_reg(mp, location, &val);
|
||||
return val;
|
||||
}
|
||||
|
||||
static void mv643xx_mdio_write(struct net_device *dev, int phy_id, int location, int val)
|
||||
{
|
||||
struct mv643xx_private *mp = netdev_priv(dev);
|
||||
eth_port_write_smi_reg(mp->port_num, location, val);
|
||||
eth_port_write_smi_reg(mp, location, val);
|
||||
}
|
||||
|
||||
/*
|
||||
|
Loading…
Reference in New Issue
Block a user