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clk: bd718x7: Support ROHM BD71828 clk block

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BD71828GW is a single-chip power management IC for battery-powered portable
devices. Add support for controlling BD71828 clk using bd718x7 driver.

Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This commit is contained in:
Matti Vaittinen 2020-01-20 15:44:19 +02:00 committed by Lee Jones
parent e795bf725d
commit ae866dec74
5 changed files with 31 additions and 29 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/clk/Kconfig
View File

@ -305,10 +305,10 @@ config COMMON_CLK_MMP2
Support for Marvell MMP2 and MMP3 SoC clocks
config COMMON_CLK_BD718XX
tristate "Clock driver for ROHM BD718x7 PMIC"
depends on MFD_ROHM_BD718XX || MFD_ROHM_BD70528
tristate "Clock driver for 32K clk gates on ROHM PMICs"
depends on MFD_ROHM_BD718XX || MFD_ROHM_BD70528 || MFD_ROHM_BD71828
help
This driver supports ROHM BD71837, ROHM BD71847 and
This driver supports ROHM BD71837, ROHM BD71847, ROHM BD71828 and
ROHM BD70528 PMICs clock gates.
config COMMON_CLK_FIXED_MMIO

38
drivers/clk/clk-bd718x7.c
View File

@ -7,12 +7,25 @@
#include <linux/err.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/mfd/rohm-bd718x7.h>
#include <linux/mfd/rohm-bd70528.h>
#include <linux/mfd/rohm-generic.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/regmap.h>
/* clk control registers */
/* BD70528 */
#define BD70528_REG_OUT32K 0x2c
/* BD71828 */
#define BD71828_REG_OUT32K 0x4B
/* BD71837 and BD71847 */
#define BD718XX_REG_OUT32K 0x2E
/*
* BD71837, BD71847, BD70528 and BD71828 all use bit [0] to clk output control
*/
#define CLK_OUT_EN_MASK BIT(0)
struct bd718xx_clk {
struct clk_hw hw;
u8 reg;
@ -21,10 +34,8 @@ struct bd718xx_clk {
struct rohm_regmap_dev *mfd;
};
static int bd71837_clk_set(struct clk_hw *hw, int status)
static int bd71837_clk_set(struct bd718xx_clk *c, unsigned int status)
{
struct bd718xx_clk *c = container_of(hw, struct bd718xx_clk, hw);
return regmap_update_bits(c->mfd->regmap, c->reg, c->mask, status);
}
@ -33,14 +44,16 @@ static void bd71837_clk_disable(struct clk_hw *hw)
int rv;
struct bd718xx_clk *c = container_of(hw, struct bd718xx_clk, hw);
rv = bd71837_clk_set(hw, 0);
rv = bd71837_clk_set(c, 0);
if (rv)
dev_dbg(&c->pdev->dev, "Failed to disable 32K clk (%d)\n", rv);
}
static int bd71837_clk_enable(struct clk_hw *hw)
{
return bd71837_clk_set(hw, 1);
struct bd718xx_clk *c = container_of(hw, struct bd718xx_clk, hw);
return bd71837_clk_set(c, 0xffffffff);
}
static int bd71837_clk_is_enabled(struct clk_hw *hw)
@ -92,11 +105,15 @@ static int bd71837_clk_probe(struct platform_device *pdev)
case ROHM_CHIP_TYPE_BD71837:
case ROHM_CHIP_TYPE_BD71847:
c->reg = BD718XX_REG_OUT32K;
c->mask = BD718XX_OUT32K_EN;
c->mask = CLK_OUT_EN_MASK;
break;
case ROHM_CHIP_TYPE_BD71828:
c->reg = BD71828_REG_OUT32K;
c->mask = CLK_OUT_EN_MASK;
break;
case ROHM_CHIP_TYPE_BD70528:
c->reg = BD70528_REG_CLK_OUT;
c->mask = BD70528_CLK_OUT_EN_MASK;
c->reg = BD70528_REG_OUT32K;
c->mask = CLK_OUT_EN_MASK;
break;
default:
dev_err(&pdev->dev, "Unknown clk chip\n");
@ -126,6 +143,7 @@ static const struct platform_device_id bd718x7_clk_id[] = {
{ "bd71837-clk", ROHM_CHIP_TYPE_BD71837 },
{ "bd71847-clk", ROHM_CHIP_TYPE_BD71847 },
{ "bd70528-clk", ROHM_CHIP_TYPE_BD70528 },
{ "bd71828-clk", ROHM_CHIP_TYPE_BD71828 },
{ },
};
MODULE_DEVICE_TABLE(platform, bd718x7_clk_id);

6
include/linux/mfd/rohm-bd70528.h
View File

@ -89,10 +89,6 @@ struct bd70528_data {
#define BD70528_REG_GPIO3_OUT 0x52
#define BD70528_REG_GPIO4_OUT 0x54
/* clk control */
#define BD70528_REG_CLK_OUT 0x2c
/* RTC */
#define BD70528_REG_RTC_COUNT_H 0x2d
@ -309,8 +305,6 @@ enum {
#define BD70528_GPIO_IN_STATE_BASE 1
#define BD70528_CLK_OUT_EN_MASK 0x1
/* RTC masks to mask out reserved bits */
#define BD70528_MASK_RTC_SEC 0x7f

4
include/linux/mfd/rohm-bd71828.h
View File

@ -183,9 +183,6 @@ enum {
#define BD71828_REG_CHG_STATE 0x65
#define BD71828_REG_CHG_FULL 0xd2
/* CLK */
#define BD71828_REG_OUT32K 0x4B
/* LEDs */
#define BD71828_REG_LED_CTRL 0x4A
#define BD71828_MASK_LED_AMBER 0x80
@ -417,7 +414,6 @@ enum {
#define BD71828_INT_RTC1_MASK 0x2
#define BD71828_INT_RTC2_MASK 0x4
#define BD71828_OUT32K_EN 0x1
#define BD71828_OUT_TYPE_MASK 0x2
#define BD71828_OUT_TYPE_OPEN_DRAIN 0x0
#define BD71828_OUT_TYPE_CMOS 0x2

6
include/linux/mfd/rohm-bd718x7.h
View File

@ -191,12 +191,6 @@ enum {
#define IRQ_ON_REQ 0x02
#define IRQ_STBY_REQ 0x01
/* BD718XX_REG_OUT32K bits */
#define BD718XX_OUT32K_EN 0x01
/* BD7183XX gated clock rate */
#define BD718XX_CLK_RATE 32768
/* ROHM BD718XX irqs */
enum {
BD718XX_INT_STBY_REQ,