mirror of
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iommu/shmobile: Remove unused Renesas IPMMU/IPMMUI driver
As of commit 44d88c754e ("ARM: shmobile: Remove legacy SoC code
for R-Mobile A1"), the Renesas IPMMU/IPMMUI driver is no longer used.
In theory it could still be used on SH-Mobile AG5 and R-Mobile A1 SoCs,
but that requires adding DT support to the driver, which is not
planned.
Remove the driver, it can be resurrected from git history when needed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
Geert Uytterhoeven
Joerg Roedel
parent
9f9499ae8e
commit
ae50dc4874
@ -263,81 +263,6 @@ config EXYNOS_IOMMU_DEBUG
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Say N unless you need kernel log message for IOMMU debugging.
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config SHMOBILE_IPMMU
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bool
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config SHMOBILE_IPMMU_TLB
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bool
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config SHMOBILE_IOMMU
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bool "IOMMU for Renesas IPMMU/IPMMUI"
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default n
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depends on ARM && MMU
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depends on ARCH_SHMOBILE || COMPILE_TEST
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select IOMMU_API
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select ARM_DMA_USE_IOMMU
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select SHMOBILE_IPMMU
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select SHMOBILE_IPMMU_TLB
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help
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Support for Renesas IPMMU/IPMMUI. This option enables
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remapping of DMA memory accesses from all of the IP blocks
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on the ICB.
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Warning: Drivers (including userspace drivers of UIO
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devices) of the IP blocks on the ICB *must* use addresses
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allocated from the IPMMU (iova) for DMA with this option
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enabled.
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If unsure, say N.
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choice
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prompt "IPMMU/IPMMUI address space size"
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default SHMOBILE_IOMMU_ADDRSIZE_2048MB
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depends on SHMOBILE_IOMMU
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help
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This option sets IPMMU/IPMMUI address space size by
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adjusting the 1st level page table size. The page table size
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is calculated as follows:
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page table size = number of page table entries * 4 bytes
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number of page table entries = address space size / 1 MiB
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For example, when the address space size is 2048 MiB, the
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1st level page table size is 8192 bytes.
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config SHMOBILE_IOMMU_ADDRSIZE_2048MB
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bool "2 GiB"
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config SHMOBILE_IOMMU_ADDRSIZE_1024MB
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bool "1 GiB"
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config SHMOBILE_IOMMU_ADDRSIZE_512MB
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bool "512 MiB"
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config SHMOBILE_IOMMU_ADDRSIZE_256MB
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bool "256 MiB"
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config SHMOBILE_IOMMU_ADDRSIZE_128MB
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bool "128 MiB"
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config SHMOBILE_IOMMU_ADDRSIZE_64MB
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bool "64 MiB"
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config SHMOBILE_IOMMU_ADDRSIZE_32MB
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bool "32 MiB"
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endchoice
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config SHMOBILE_IOMMU_L1SIZE
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int
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default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
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default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
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default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
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default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
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default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
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default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
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default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
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config IPMMU_VMSA
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bool "Renesas VMSA-compatible IPMMU"
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depends on ARM_LPAE
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@ -22,7 +22,5 @@ obj-$(CONFIG_ROCKCHIP_IOMMU) += rockchip-iommu.o
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obj-$(CONFIG_TEGRA_IOMMU_GART) += tegra-gart.o
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obj-$(CONFIG_TEGRA_IOMMU_SMMU) += tegra-smmu.o
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obj-$(CONFIG_EXYNOS_IOMMU) += exynos-iommu.o
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obj-$(CONFIG_SHMOBILE_IOMMU) += shmobile-iommu.o
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obj-$(CONFIG_SHMOBILE_IPMMU) += shmobile-ipmmu.o
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obj-$(CONFIG_FSL_PAMU) += fsl_pamu.o fsl_pamu_domain.o
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obj-$(CONFIG_S390_IOMMU) += s390-iommu.o
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@ -1,402 +0,0 @@
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/*
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* IOMMU for IPMMU/IPMMUI
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* Copyright (C) 2012 Hideki EIRAKU
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*/
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#include <linux/dma-mapping.h>
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#include <linux/io.h>
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#include <linux/iommu.h>
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#include <linux/platform_device.h>
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#include <linux/sizes.h>
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#include <linux/slab.h>
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#include <asm/dma-iommu.h>
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#include "shmobile-ipmmu.h"
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#define L1_SIZE CONFIG_SHMOBILE_IOMMU_L1SIZE
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#define L1_LEN (L1_SIZE / 4)
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#define L1_ALIGN L1_SIZE
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#define L2_SIZE SZ_1K
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#define L2_LEN (L2_SIZE / 4)
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#define L2_ALIGN L2_SIZE
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struct shmobile_iommu_domain_pgtable {
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uint32_t *pgtable;
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dma_addr_t handle;
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};
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struct shmobile_iommu_archdata {
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struct list_head attached_list;
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struct dma_iommu_mapping *iommu_mapping;
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spinlock_t attach_lock;
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struct shmobile_iommu_domain *attached;
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int num_attached_devices;
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struct shmobile_ipmmu *ipmmu;
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};
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struct shmobile_iommu_domain {
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struct shmobile_iommu_domain_pgtable l1, l2[L1_LEN];
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spinlock_t map_lock;
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spinlock_t attached_list_lock;
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struct list_head attached_list;
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struct iommu_domain domain;
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};
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static struct shmobile_iommu_archdata *ipmmu_archdata;
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static struct kmem_cache *l1cache, *l2cache;
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static struct shmobile_iommu_domain *to_sh_domain(struct iommu_domain *dom)
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{
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return container_of(dom, struct shmobile_iommu_domain, domain);
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}
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static int pgtable_alloc(struct shmobile_iommu_domain_pgtable *pgtable,
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struct kmem_cache *cache, size_t size)
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{
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pgtable->pgtable = kmem_cache_zalloc(cache, GFP_ATOMIC);
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if (!pgtable->pgtable)
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return -ENOMEM;
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pgtable->handle = dma_map_single(NULL, pgtable->pgtable, size,
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DMA_TO_DEVICE);
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return 0;
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}
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static void pgtable_free(struct shmobile_iommu_domain_pgtable *pgtable,
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struct kmem_cache *cache, size_t size)
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{
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dma_unmap_single(NULL, pgtable->handle, size, DMA_TO_DEVICE);
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kmem_cache_free(cache, pgtable->pgtable);
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}
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static uint32_t pgtable_read(struct shmobile_iommu_domain_pgtable *pgtable,
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unsigned int index)
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{
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return pgtable->pgtable[index];
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}
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static void pgtable_write(struct shmobile_iommu_domain_pgtable *pgtable,
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unsigned int index, unsigned int count, uint32_t val)
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{
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unsigned int i;
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for (i = 0; i < count; i++)
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pgtable->pgtable[index + i] = val;
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dma_sync_single_for_device(NULL, pgtable->handle + index * sizeof(val),
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sizeof(val) * count, DMA_TO_DEVICE);
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}
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static struct iommu_domain *shmobile_iommu_domain_alloc(unsigned type)
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{
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struct shmobile_iommu_domain *sh_domain;
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int i, ret;
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if (type != IOMMU_DOMAIN_UNMANAGED)
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return NULL;
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sh_domain = kzalloc(sizeof(*sh_domain), GFP_KERNEL);
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if (!sh_domain)
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return NULL;
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ret = pgtable_alloc(&sh_domain->l1, l1cache, L1_SIZE);
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if (ret < 0) {
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kfree(sh_domain);
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return NULL;
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}
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for (i = 0; i < L1_LEN; i++)
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sh_domain->l2[i].pgtable = NULL;
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spin_lock_init(&sh_domain->map_lock);
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spin_lock_init(&sh_domain->attached_list_lock);
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INIT_LIST_HEAD(&sh_domain->attached_list);
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return &sh_domain->domain;
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}
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static void shmobile_iommu_domain_free(struct iommu_domain *domain)
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{
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struct shmobile_iommu_domain *sh_domain = to_sh_domain(domain);
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int i;
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for (i = 0; i < L1_LEN; i++) {
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if (sh_domain->l2[i].pgtable)
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pgtable_free(&sh_domain->l2[i], l2cache, L2_SIZE);
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}
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pgtable_free(&sh_domain->l1, l1cache, L1_SIZE);
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kfree(sh_domain);
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}
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static int shmobile_iommu_attach_device(struct iommu_domain *domain,
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struct device *dev)
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{
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struct shmobile_iommu_archdata *archdata = dev->archdata.iommu;
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struct shmobile_iommu_domain *sh_domain = to_sh_domain(domain);
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int ret = -EBUSY;
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if (!archdata)
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return -ENODEV;
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spin_lock(&sh_domain->attached_list_lock);
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spin_lock(&archdata->attach_lock);
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if (archdata->attached != sh_domain) {
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if (archdata->attached)
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goto err;
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ipmmu_tlb_set(archdata->ipmmu, sh_domain->l1.handle, L1_SIZE,
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0);
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ipmmu_tlb_flush(archdata->ipmmu);
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archdata->attached = sh_domain;
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archdata->num_attached_devices = 0;
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list_add(&archdata->attached_list, &sh_domain->attached_list);
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}
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archdata->num_attached_devices++;
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ret = 0;
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err:
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spin_unlock(&archdata->attach_lock);
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spin_unlock(&sh_domain->attached_list_lock);
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return ret;
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}
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static void shmobile_iommu_detach_device(struct iommu_domain *domain,
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struct device *dev)
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{
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struct shmobile_iommu_archdata *archdata = dev->archdata.iommu;
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struct shmobile_iommu_domain *sh_domain = to_sh_domain(domain);
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if (!archdata)
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return;
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spin_lock(&sh_domain->attached_list_lock);
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spin_lock(&archdata->attach_lock);
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archdata->num_attached_devices--;
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if (!archdata->num_attached_devices) {
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ipmmu_tlb_set(archdata->ipmmu, 0, 0, 0);
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ipmmu_tlb_flush(archdata->ipmmu);
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archdata->attached = NULL;
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list_del(&archdata->attached_list);
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}
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spin_unlock(&archdata->attach_lock);
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spin_unlock(&sh_domain->attached_list_lock);
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}
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static void domain_tlb_flush(struct shmobile_iommu_domain *sh_domain)
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{
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struct shmobile_iommu_archdata *archdata;
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spin_lock(&sh_domain->attached_list_lock);
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list_for_each_entry(archdata, &sh_domain->attached_list, attached_list)
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ipmmu_tlb_flush(archdata->ipmmu);
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spin_unlock(&sh_domain->attached_list_lock);
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}
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static int l2alloc(struct shmobile_iommu_domain *sh_domain,
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unsigned int l1index)
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{
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int ret;
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if (!sh_domain->l2[l1index].pgtable) {
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ret = pgtable_alloc(&sh_domain->l2[l1index], l2cache, L2_SIZE);
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if (ret < 0)
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return ret;
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}
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pgtable_write(&sh_domain->l1, l1index, 1,
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sh_domain->l2[l1index].handle | 0x1);
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return 0;
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}
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static void l2realfree(struct shmobile_iommu_domain_pgtable *l2)
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{
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if (l2->pgtable)
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pgtable_free(l2, l2cache, L2_SIZE);
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}
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static void l2free(struct shmobile_iommu_domain *sh_domain,
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unsigned int l1index,
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struct shmobile_iommu_domain_pgtable *l2)
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{
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pgtable_write(&sh_domain->l1, l1index, 1, 0);
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if (sh_domain->l2[l1index].pgtable) {
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*l2 = sh_domain->l2[l1index];
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sh_domain->l2[l1index].pgtable = NULL;
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}
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}
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static int shmobile_iommu_map(struct iommu_domain *domain, unsigned long iova,
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phys_addr_t paddr, size_t size, int prot)
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{
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struct shmobile_iommu_domain_pgtable l2 = { .pgtable = NULL };
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struct shmobile_iommu_domain *sh_domain = to_sh_domain(domain);
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unsigned int l1index, l2index;
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int ret;
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l1index = iova >> 20;
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switch (size) {
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case SZ_4K:
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l2index = (iova >> 12) & 0xff;
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spin_lock(&sh_domain->map_lock);
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ret = l2alloc(sh_domain, l1index);
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if (!ret)
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pgtable_write(&sh_domain->l2[l1index], l2index, 1,
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paddr | 0xff2);
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spin_unlock(&sh_domain->map_lock);
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break;
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case SZ_64K:
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l2index = (iova >> 12) & 0xf0;
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spin_lock(&sh_domain->map_lock);
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ret = l2alloc(sh_domain, l1index);
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if (!ret)
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pgtable_write(&sh_domain->l2[l1index], l2index, 0x10,
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paddr | 0xff1);
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spin_unlock(&sh_domain->map_lock);
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break;
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case SZ_1M:
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spin_lock(&sh_domain->map_lock);
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l2free(sh_domain, l1index, &l2);
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pgtable_write(&sh_domain->l1, l1index, 1, paddr | 0xc02);
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spin_unlock(&sh_domain->map_lock);
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ret = 0;
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break;
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default:
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ret = -EINVAL;
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}
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if (!ret)
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domain_tlb_flush(sh_domain);
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l2realfree(&l2);
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return ret;
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}
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static size_t shmobile_iommu_unmap(struct iommu_domain *domain,
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unsigned long iova, size_t size)
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{
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struct shmobile_iommu_domain_pgtable l2 = { .pgtable = NULL };
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struct shmobile_iommu_domain *sh_domain = to_sh_domain(domain);
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unsigned int l1index, l2index;
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uint32_t l2entry = 0;
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size_t ret = 0;
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l1index = iova >> 20;
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if (!(iova & 0xfffff) && size >= SZ_1M) {
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spin_lock(&sh_domain->map_lock);
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l2free(sh_domain, l1index, &l2);
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spin_unlock(&sh_domain->map_lock);
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ret = SZ_1M;
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goto done;
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}
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l2index = (iova >> 12) & 0xff;
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spin_lock(&sh_domain->map_lock);
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if (sh_domain->l2[l1index].pgtable)
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l2entry = pgtable_read(&sh_domain->l2[l1index], l2index);
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switch (l2entry & 3) {
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case 1:
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if (l2index & 0xf)
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break;
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pgtable_write(&sh_domain->l2[l1index], l2index, 0x10, 0);
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ret = SZ_64K;
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break;
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case 2:
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pgtable_write(&sh_domain->l2[l1index], l2index, 1, 0);
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ret = SZ_4K;
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break;
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}
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spin_unlock(&sh_domain->map_lock);
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done:
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if (ret)
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domain_tlb_flush(sh_domain);
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l2realfree(&l2);
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return ret;
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}
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static phys_addr_t shmobile_iommu_iova_to_phys(struct iommu_domain *domain,
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dma_addr_t iova)
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{
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struct shmobile_iommu_domain *sh_domain = to_sh_domain(domain);
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uint32_t l1entry = 0, l2entry = 0;
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unsigned int l1index, l2index;
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l1index = iova >> 20;
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l2index = (iova >> 12) & 0xff;
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spin_lock(&sh_domain->map_lock);
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if (sh_domain->l2[l1index].pgtable)
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l2entry = pgtable_read(&sh_domain->l2[l1index], l2index);
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else
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l1entry = pgtable_read(&sh_domain->l1, l1index);
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spin_unlock(&sh_domain->map_lock);
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switch (l2entry & 3) {
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case 1:
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return (l2entry & ~0xffff) | (iova & 0xffff);
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case 2:
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return (l2entry & ~0xfff) | (iova & 0xfff);
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default:
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if ((l1entry & 3) == 2)
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return (l1entry & ~0xfffff) | (iova & 0xfffff);
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return 0;
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}
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}
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static int find_dev_name(struct shmobile_ipmmu *ipmmu, const char *dev_name)
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{
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unsigned int i, n = ipmmu->num_dev_names;
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for (i = 0; i < n; i++) {
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if (strcmp(ipmmu->dev_names[i], dev_name) == 0)
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return 1;
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}
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return 0;
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}
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|
||||
static int shmobile_iommu_add_device(struct device *dev)
|
||||
{
|
||||
struct shmobile_iommu_archdata *archdata = ipmmu_archdata;
|
||||
struct dma_iommu_mapping *mapping;
|
||||
|
||||
if (!find_dev_name(archdata->ipmmu, dev_name(dev)))
|
||||
return 0;
|
||||
mapping = archdata->iommu_mapping;
|
||||
if (!mapping) {
|
||||
mapping = arm_iommu_create_mapping(&platform_bus_type, 0,
|
||||
L1_LEN << 20);
|
||||
if (IS_ERR(mapping))
|
||||
return PTR_ERR(mapping);
|
||||
archdata->iommu_mapping = mapping;
|
||||
}
|
||||
dev->archdata.iommu = archdata;
|
||||
if (arm_iommu_attach_device(dev, mapping))
|
||||
pr_err("arm_iommu_attach_device failed\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct iommu_ops shmobile_iommu_ops = {
|
||||
.domain_alloc = shmobile_iommu_domain_alloc,
|
||||
.domain_free = shmobile_iommu_domain_free,
|
||||
.attach_dev = shmobile_iommu_attach_device,
|
||||
.detach_dev = shmobile_iommu_detach_device,
|
||||
.map = shmobile_iommu_map,
|
||||
.unmap = shmobile_iommu_unmap,
|
||||
.map_sg = default_iommu_map_sg,
|
||||
.iova_to_phys = shmobile_iommu_iova_to_phys,
|
||||
.add_device = shmobile_iommu_add_device,
|
||||
.pgsize_bitmap = SZ_1M | SZ_64K | SZ_4K,
|
||||
};
|
||||
|
||||
int ipmmu_iommu_init(struct shmobile_ipmmu *ipmmu)
|
||||
{
|
||||
static struct shmobile_iommu_archdata *archdata;
|
||||
|
||||
l1cache = kmem_cache_create("shmobile-iommu-pgtable1", L1_SIZE,
|
||||
L1_ALIGN, SLAB_HWCACHE_ALIGN, NULL);
|
||||
if (!l1cache)
|
||||
return -ENOMEM;
|
||||
l2cache = kmem_cache_create("shmobile-iommu-pgtable2", L2_SIZE,
|
||||
L2_ALIGN, SLAB_HWCACHE_ALIGN, NULL);
|
||||
if (!l2cache) {
|
||||
kmem_cache_destroy(l1cache);
|
||||
return -ENOMEM;
|
||||
}
|
||||
archdata = kzalloc(sizeof(*archdata), GFP_KERNEL);
|
||||
if (!archdata) {
|
||||
kmem_cache_destroy(l1cache);
|
||||
kmem_cache_destroy(l2cache);
|
||||
return -ENOMEM;
|
||||
}
|
||||
spin_lock_init(&archdata->attach_lock);
|
||||
archdata->ipmmu = ipmmu;
|
||||
ipmmu_archdata = archdata;
|
||||
bus_set_iommu(&platform_bus_type, &shmobile_iommu_ops);
|
||||
return 0;
|
||||
}
|
||||
@ -1,129 +0,0 @@
|
||||
/*
|
||||
* IPMMU/IPMMUI
|
||||
* Copyright (C) 2012 Hideki EIRAKU
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*/
|
||||
|
||||
#include <linux/err.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/platform_data/sh_ipmmu.h>
|
||||
#include "shmobile-ipmmu.h"
|
||||
|
||||
#define IMCTR1 0x000
|
||||
#define IMCTR2 0x004
|
||||
#define IMASID 0x010
|
||||
#define IMTTBR 0x014
|
||||
#define IMTTBCR 0x018
|
||||
|
||||
#define IMCTR1_TLBEN (1 << 0)
|
||||
#define IMCTR1_FLUSH (1 << 1)
|
||||
|
||||
static void ipmmu_reg_write(struct shmobile_ipmmu *ipmmu, unsigned long reg_off,
|
||||
unsigned long data)
|
||||
{
|
||||
iowrite32(data, ipmmu->ipmmu_base + reg_off);
|
||||
}
|
||||
|
||||
void ipmmu_tlb_flush(struct shmobile_ipmmu *ipmmu)
|
||||
{
|
||||
if (!ipmmu)
|
||||
return;
|
||||
|
||||
spin_lock(&ipmmu->flush_lock);
|
||||
if (ipmmu->tlb_enabled)
|
||||
ipmmu_reg_write(ipmmu, IMCTR1, IMCTR1_FLUSH | IMCTR1_TLBEN);
|
||||
else
|
||||
ipmmu_reg_write(ipmmu, IMCTR1, IMCTR1_FLUSH);
|
||||
spin_unlock(&ipmmu->flush_lock);
|
||||
}
|
||||
|
||||
void ipmmu_tlb_set(struct shmobile_ipmmu *ipmmu, unsigned long phys, int size,
|
||||
int asid)
|
||||
{
|
||||
if (!ipmmu)
|
||||
return;
|
||||
|
||||
spin_lock(&ipmmu->flush_lock);
|
||||
switch (size) {
|
||||
default:
|
||||
ipmmu->tlb_enabled = 0;
|
||||
break;
|
||||
case 0x2000:
|
||||
ipmmu_reg_write(ipmmu, IMTTBCR, 1);
|
||||
ipmmu->tlb_enabled = 1;
|
||||
break;
|
||||
case 0x1000:
|
||||
ipmmu_reg_write(ipmmu, IMTTBCR, 2);
|
||||
ipmmu->tlb_enabled = 1;
|
||||
break;
|
||||
case 0x800:
|
||||
ipmmu_reg_write(ipmmu, IMTTBCR, 3);
|
||||
ipmmu->tlb_enabled = 1;
|
||||
break;
|
||||
case 0x400:
|
||||
ipmmu_reg_write(ipmmu, IMTTBCR, 4);
|
||||
ipmmu->tlb_enabled = 1;
|
||||
break;
|
||||
case 0x200:
|
||||
ipmmu_reg_write(ipmmu, IMTTBCR, 5);
|
||||
ipmmu->tlb_enabled = 1;
|
||||
break;
|
||||
case 0x100:
|
||||
ipmmu_reg_write(ipmmu, IMTTBCR, 6);
|
||||
ipmmu->tlb_enabled = 1;
|
||||
break;
|
||||
case 0x80:
|
||||
ipmmu_reg_write(ipmmu, IMTTBCR, 7);
|
||||
ipmmu->tlb_enabled = 1;
|
||||
break;
|
||||
}
|
||||
ipmmu_reg_write(ipmmu, IMTTBR, phys);
|
||||
ipmmu_reg_write(ipmmu, IMASID, asid);
|
||||
spin_unlock(&ipmmu->flush_lock);
|
||||
}
|
||||
|
||||
static int ipmmu_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct shmobile_ipmmu *ipmmu;
|
||||
struct resource *res;
|
||||
struct shmobile_ipmmu_platform_data *pdata = pdev->dev.platform_data;
|
||||
|
||||
ipmmu = devm_kzalloc(&pdev->dev, sizeof(*ipmmu), GFP_KERNEL);
|
||||
if (!ipmmu) {
|
||||
dev_err(&pdev->dev, "cannot allocate device data\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
spin_lock_init(&ipmmu->flush_lock);
|
||||
ipmmu->dev = &pdev->dev;
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
ipmmu->ipmmu_base = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(ipmmu->ipmmu_base))
|
||||
return PTR_ERR(ipmmu->ipmmu_base);
|
||||
|
||||
ipmmu->dev_names = pdata->dev_names;
|
||||
ipmmu->num_dev_names = pdata->num_dev_names;
|
||||
platform_set_drvdata(pdev, ipmmu);
|
||||
ipmmu_reg_write(ipmmu, IMCTR1, 0x0); /* disable TLB */
|
||||
ipmmu_reg_write(ipmmu, IMCTR2, 0x0); /* disable PMB */
|
||||
return ipmmu_iommu_init(ipmmu);
|
||||
}
|
||||
|
||||
static struct platform_driver ipmmu_driver = {
|
||||
.probe = ipmmu_probe,
|
||||
.driver = {
|
||||
.name = "ipmmu",
|
||||
},
|
||||
};
|
||||
|
||||
static int __init ipmmu_init(void)
|
||||
{
|
||||
return platform_driver_register(&ipmmu_driver);
|
||||
}
|
||||
subsys_initcall(ipmmu_init);
|
||||
@ -1,34 +0,0 @@
|
||||
/* shmobile-ipmmu.h
|
||||
*
|
||||
* Copyright (C) 2012 Hideki EIRAKU
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*/
|
||||
|
||||
#ifndef __SHMOBILE_IPMMU_H__
|
||||
#define __SHMOBILE_IPMMU_H__
|
||||
|
||||
struct shmobile_ipmmu {
|
||||
struct device *dev;
|
||||
void __iomem *ipmmu_base;
|
||||
int tlb_enabled;
|
||||
spinlock_t flush_lock;
|
||||
const char * const *dev_names;
|
||||
unsigned int num_dev_names;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_SHMOBILE_IPMMU_TLB
|
||||
void ipmmu_tlb_flush(struct shmobile_ipmmu *ipmmu);
|
||||
void ipmmu_tlb_set(struct shmobile_ipmmu *ipmmu, unsigned long phys, int size,
|
||||
int asid);
|
||||
int ipmmu_iommu_init(struct shmobile_ipmmu *ipmmu);
|
||||
#else
|
||||
static inline int ipmmu_iommu_init(struct shmobile_ipmmu *ipmmu)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __SHMOBILE_IPMMU_H__ */
|
||||
Loading…
Reference in New Issue
Block a user