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https://github.com/edk2-porting/linux-next.git
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Merge tag 'amd-drm-fixes-5.8-2020-07-15' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
amd-drm-fixes-5.8-2020-07-15: amdgpu: - Fix a race condition with KIQ - Preemption fix - Fix handling of fake MST encoders - OLED panel fix - Handle allocation failure in stream construction - Renoir SMC fix - SDMA 5.x fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200715213914.3994-1-alexander.deucher@amd.com
This commit is contained in:
commit
adbe8a3cae
@ -1295,27 +1295,37 @@ static void amdgpu_ib_preempt_job_recovery(struct drm_gpu_scheduler *sched)
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static void amdgpu_ib_preempt_mark_partial_job(struct amdgpu_ring *ring)
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{
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struct amdgpu_job *job;
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struct drm_sched_job *s_job;
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struct drm_sched_job *s_job, *tmp;
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uint32_t preempt_seq;
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struct dma_fence *fence, **ptr;
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struct amdgpu_fence_driver *drv = &ring->fence_drv;
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struct drm_gpu_scheduler *sched = &ring->sched;
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bool preempted = true;
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if (ring->funcs->type != AMDGPU_RING_TYPE_GFX)
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return;
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preempt_seq = le32_to_cpu(*(drv->cpu_addr + 2));
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if (preempt_seq <= atomic_read(&drv->last_seq))
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return;
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if (preempt_seq <= atomic_read(&drv->last_seq)) {
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preempted = false;
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goto no_preempt;
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}
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preempt_seq &= drv->num_fences_mask;
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ptr = &drv->fences[preempt_seq];
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fence = rcu_dereference_protected(*ptr, 1);
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no_preempt:
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spin_lock(&sched->job_list_lock);
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list_for_each_entry(s_job, &sched->ring_mirror_list, node) {
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list_for_each_entry_safe(s_job, tmp, &sched->ring_mirror_list, node) {
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if (dma_fence_is_signaled(&s_job->s_fence->finished)) {
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/* remove job from ring_mirror_list */
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list_del_init(&s_job->node);
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sched->ops->free_job(s_job);
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continue;
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}
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job = to_amdgpu_job(s_job);
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if (job->fence == fence)
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if (preempted && job->fence == fence)
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/* mark the job as preempted */
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job->preemption_status |= AMDGPU_IB_PREEMPTED;
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}
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@ -7513,12 +7513,17 @@ static int gfx_v10_0_ring_preempt_ib(struct amdgpu_ring *ring)
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struct amdgpu_device *adev = ring->adev;
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struct amdgpu_kiq *kiq = &adev->gfx.kiq;
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struct amdgpu_ring *kiq_ring = &kiq->ring;
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unsigned long flags;
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if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)
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return -EINVAL;
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if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size))
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spin_lock_irqsave(&kiq->ring_lock, flags);
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if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size)) {
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spin_unlock_irqrestore(&kiq->ring_lock, flags);
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return -ENOMEM;
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}
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/* assert preemption condition */
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amdgpu_ring_set_preempt_cond_exec(ring, false);
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@ -7529,6 +7534,8 @@ static int gfx_v10_0_ring_preempt_ib(struct amdgpu_ring *ring)
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++ring->trail_seq);
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amdgpu_ring_commit(kiq_ring);
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spin_unlock_irqrestore(&kiq->ring_lock, flags);
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/* poll the trailing fence */
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for (i = 0; i < adev->usec_timeout; i++) {
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if (ring->trail_seq ==
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@ -314,30 +314,20 @@ static uint64_t sdma_v5_0_ring_get_rptr(struct amdgpu_ring *ring)
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static uint64_t sdma_v5_0_ring_get_wptr(struct amdgpu_ring *ring)
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{
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struct amdgpu_device *adev = ring->adev;
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u64 *wptr = NULL;
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uint64_t local_wptr = 0;
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u64 wptr;
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if (ring->use_doorbell) {
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/* XXX check if swapping is necessary on BE */
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wptr = ((u64 *)&adev->wb.wb[ring->wptr_offs]);
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DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", *wptr);
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*wptr = (*wptr) >> 2;
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DRM_DEBUG("wptr/doorbell after shift == 0x%016llx\n", *wptr);
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wptr = READ_ONCE(*((u64 *)&adev->wb.wb[ring->wptr_offs]));
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DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr);
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} else {
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u32 lowbit, highbit;
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wptr = &local_wptr;
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lowbit = RREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR)) >> 2;
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highbit = RREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI)) >> 2;
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DRM_DEBUG("wptr [%i]high== 0x%08x low==0x%08x\n",
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ring->me, highbit, lowbit);
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*wptr = highbit;
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*wptr = (*wptr) << 32;
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*wptr |= lowbit;
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wptr = RREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI));
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wptr = wptr << 32;
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wptr |= RREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR));
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DRM_DEBUG("wptr before shift [%i] wptr == 0x%016llx\n", ring->me, wptr);
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}
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return *wptr;
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return wptr >> 2;
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}
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/**
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@ -974,6 +974,9 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
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/* Update the actual used number of crtc */
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adev->mode_info.num_crtc = adev->dm.display_indexes_num;
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/* create fake encoders for MST */
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dm_dp_create_fake_mst_encoders(adev);
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/* TODO: Add_display_info? */
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/* TODO use dynamic cursor width */
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@ -997,6 +1000,12 @@ error:
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static void amdgpu_dm_fini(struct amdgpu_device *adev)
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{
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int i;
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for (i = 0; i < adev->dm.display_indexes_num; i++) {
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drm_encoder_cleanup(&adev->dm.mst_encoders[i].base);
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}
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amdgpu_dm_audio_fini(adev);
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amdgpu_dm_destroy_drm_device(&adev->dm);
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@ -2010,6 +2019,7 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
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struct amdgpu_display_manager *dm;
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struct drm_connector *conn_base;
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struct amdgpu_device *adev;
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struct dc_link *link = NULL;
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static const u8 pre_computed_values[] = {
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50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69,
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71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98};
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@ -2017,6 +2027,10 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
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if (!aconnector || !aconnector->dc_link)
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return;
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link = aconnector->dc_link;
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if (link->connector_signal != SIGNAL_TYPE_EDP)
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return;
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conn_base = &aconnector->base;
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adev = conn_base->dev->dev_private;
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dm = &adev->dm;
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@ -43,6 +43,9 @@
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*/
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#define AMDGPU_DM_MAX_DISPLAY_INDEX 31
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#define AMDGPU_DM_MAX_CRTC 6
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/*
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#include "include/amdgpu_dal_power_if.h"
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#include "amdgpu_dm_irq.h"
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@ -328,6 +331,13 @@ struct amdgpu_display_manager {
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* available in FW
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*/
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const struct gpu_info_soc_bounding_box_v1_0 *soc_bounding_box;
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/**
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* @mst_encoders:
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*
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* fake encoders used for DP MST.
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*/
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struct amdgpu_encoder mst_encoders[AMDGPU_DM_MAX_CRTC];
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};
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struct amdgpu_dm_connector {
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@ -356,7 +366,6 @@ struct amdgpu_dm_connector {
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struct amdgpu_dm_dp_aux dm_dp_aux;
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struct drm_dp_mst_port *port;
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struct amdgpu_dm_connector *mst_port;
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struct amdgpu_encoder *mst_encoder;
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struct drm_dp_aux *dsc_aux;
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/* TODO see if we can merge with ddc_bus or make a dm_connector */
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@ -95,7 +95,6 @@ dm_dp_mst_connector_destroy(struct drm_connector *connector)
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{
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struct amdgpu_dm_connector *aconnector =
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to_amdgpu_dm_connector(connector);
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struct amdgpu_encoder *amdgpu_encoder = aconnector->mst_encoder;
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if (aconnector->dc_sink) {
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dc_link_remove_remote_sink(aconnector->dc_link,
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@ -105,8 +104,6 @@ dm_dp_mst_connector_destroy(struct drm_connector *connector)
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kfree(aconnector->edid);
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drm_encoder_cleanup(&amdgpu_encoder->base);
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kfree(amdgpu_encoder);
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drm_connector_cleanup(connector);
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drm_dp_mst_put_port_malloc(aconnector->port);
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kfree(aconnector);
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@ -243,7 +240,11 @@ static struct drm_encoder *
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dm_mst_atomic_best_encoder(struct drm_connector *connector,
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struct drm_connector_state *connector_state)
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{
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return &to_amdgpu_dm_connector(connector)->mst_encoder->base;
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struct drm_device *dev = connector->dev;
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struct amdgpu_device *adev = dev->dev_private;
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struct amdgpu_crtc *acrtc = to_amdgpu_crtc(connector_state->crtc);
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return &adev->dm.mst_encoders[acrtc->crtc_id].base;
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}
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static int
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@ -306,31 +307,27 @@ static const struct drm_encoder_funcs amdgpu_dm_encoder_funcs = {
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.destroy = amdgpu_dm_encoder_destroy,
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};
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static struct amdgpu_encoder *
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dm_dp_create_fake_mst_encoder(struct amdgpu_dm_connector *connector)
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void
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dm_dp_create_fake_mst_encoders(struct amdgpu_device *adev)
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{
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struct drm_device *dev = connector->base.dev;
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struct amdgpu_device *adev = dev->dev_private;
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struct amdgpu_encoder *amdgpu_encoder;
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struct drm_encoder *encoder;
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struct drm_device *dev = adev->ddev;
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int i;
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amdgpu_encoder = kzalloc(sizeof(*amdgpu_encoder), GFP_KERNEL);
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if (!amdgpu_encoder)
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return NULL;
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for (i = 0; i < adev->dm.display_indexes_num; i++) {
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struct amdgpu_encoder *amdgpu_encoder = &adev->dm.mst_encoders[i];
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struct drm_encoder *encoder = &amdgpu_encoder->base;
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encoder = &amdgpu_encoder->base;
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encoder->possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev);
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encoder->possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev);
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drm_encoder_init(
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dev,
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&amdgpu_encoder->base,
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&amdgpu_dm_encoder_funcs,
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DRM_MODE_ENCODER_DPMST,
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NULL);
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drm_encoder_init(
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dev,
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&amdgpu_encoder->base,
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&amdgpu_dm_encoder_funcs,
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DRM_MODE_ENCODER_DPMST,
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NULL);
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drm_encoder_helper_add(encoder, &amdgpu_dm_encoder_helper_funcs);
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return amdgpu_encoder;
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drm_encoder_helper_add(encoder, &amdgpu_dm_encoder_helper_funcs);
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}
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}
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static struct drm_connector *
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@ -343,6 +340,7 @@ dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
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struct amdgpu_device *adev = dev->dev_private;
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struct amdgpu_dm_connector *aconnector;
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struct drm_connector *connector;
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int i;
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aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL);
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if (!aconnector)
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@ -369,9 +367,10 @@ dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
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master->dc_link,
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master->connector_id);
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aconnector->mst_encoder = dm_dp_create_fake_mst_encoder(master);
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drm_connector_attach_encoder(&aconnector->base,
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&aconnector->mst_encoder->base);
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for (i = 0; i < adev->dm.display_indexes_num; i++) {
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drm_connector_attach_encoder(&aconnector->base,
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&adev->dm.mst_encoders[i].base);
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}
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connector->max_bpc_property = master->base.max_bpc_property;
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if (connector->max_bpc_property)
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@ -35,6 +35,9 @@ void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,
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struct amdgpu_dm_connector *aconnector,
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int link_index);
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void
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dm_dp_create_fake_mst_encoders(struct amdgpu_device *adev);
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#if defined(CONFIG_DRM_AMD_DC_DCN)
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bool compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,
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struct dc_state *dc_state);
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@ -56,7 +56,7 @@ void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink)
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}
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}
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static void dc_stream_construct(struct dc_stream_state *stream,
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static bool dc_stream_construct(struct dc_stream_state *stream,
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struct dc_sink *dc_sink_data)
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{
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uint32_t i = 0;
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@ -118,11 +118,17 @@ static void dc_stream_construct(struct dc_stream_state *stream,
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update_stream_signal(stream, dc_sink_data);
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stream->out_transfer_func = dc_create_transfer_func();
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if (stream->out_transfer_func == NULL) {
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dc_sink_release(dc_sink_data);
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return false;
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}
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stream->out_transfer_func->type = TF_TYPE_BYPASS;
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stream->out_transfer_func->ctx = stream->ctx;
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stream->stream_id = stream->ctx->dc_stream_id_count;
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stream->ctx->dc_stream_id_count++;
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return true;
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}
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static void dc_stream_destruct(struct dc_stream_state *stream)
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@ -164,13 +170,20 @@ struct dc_stream_state *dc_create_stream_for_sink(
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stream = kzalloc(sizeof(struct dc_stream_state), GFP_KERNEL);
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if (stream == NULL)
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return NULL;
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goto alloc_fail;
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dc_stream_construct(stream, sink);
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if (dc_stream_construct(stream, sink) == false)
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goto construct_fail;
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kref_init(&stream->refcount);
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return stream;
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construct_fail:
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kfree(stream);
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alloc_fail:
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return NULL;
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}
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struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream)
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|
@ -689,7 +689,7 @@ static int renoir_set_power_profile_mode(struct smu_context *smu, long *input, u
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return -EINVAL;
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}
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ret = smu_send_smc_msg_with_param(smu, SMU_MSG_SetWorkloadMask,
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ret = smu_send_smc_msg_with_param(smu, SMU_MSG_ActiveProcessNotify,
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1 << workload_type,
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NULL);
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if (ret) {
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