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iommu/mediatek: Refine protect memory definition
The protect memory setting is a little different in the different SoCs. In the register REG_MMU_CTRL_REG(0x110), the TF_PROT(translation fault protect) shift bit is normally 4 while it shift 5 bits only in the mt8173. This patch delete the complex MACRO and use a common if-else instead. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: Evan Green <evgreen@chromium.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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@ -44,12 +44,9 @@
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#define REG_MMU_DCM_DIS 0x050
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#define REG_MMU_CTRL_REG 0x110
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#define F_MMU_TF_PROT_TO_PROGRAM_ADDR (2 << 4)
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#define F_MMU_PREFETCH_RT_REPLACE_MOD BIT(4)
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#define F_MMU_TF_PROTECT_SEL_SHIFT(data) \
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((data)->plat_data->m4u_plat == M4U_MT2712 ? 4 : 5)
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/* It's named by F_MMU_TF_PROT_SEL in mt2712. */
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#define F_MMU_TF_PROTECT_SEL(prot, data) \
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(((prot) & 0x3) << F_MMU_TF_PROTECT_SEL_SHIFT(data))
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#define F_MMU_TF_PROT_TO_PROGRAM_ADDR_MT8173 (2 << 5)
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#define REG_MMU_IVRP_PADDR 0x114
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@ -539,9 +536,11 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data)
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return ret;
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}
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regval = F_MMU_TF_PROTECT_SEL(2, data);
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if (data->plat_data->m4u_plat == M4U_MT8173)
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regval |= F_MMU_PREFETCH_RT_REPLACE_MOD;
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regval = F_MMU_PREFETCH_RT_REPLACE_MOD |
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F_MMU_TF_PROT_TO_PROGRAM_ADDR_MT8173;
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else
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regval = F_MMU_TF_PROT_TO_PROGRAM_ADDR;
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writel_relaxed(regval, data->base + REG_MMU_CTRL_REG);
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regval = F_L2_MULIT_HIT_EN |
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