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S2io: Move all the transmit completions to a single msi-x (alarm) vector
- Move all the transmit completions to a single msi-x (alarm) vector. - Enable the continuous timer interrupt for only one transmit fifo. Signed-off-by: Santosh Rastapur <santosh.rastapur@neterion.com> Signed-off-by: Ramkrishna Vepa <ram.vepa@neterion.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This commit is contained in:
Sreenivasa Honnur
Jeff Garzik
parent
25c16fffa8
commit
ac731ab669
@ -1220,15 +1220,33 @@ static int init_tti(struct s2io_nic *nic, int link)
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TTI_DATA1_MEM_TX_URNG_B(0x10) |
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TTI_DATA1_MEM_TX_URNG_C(0x30) |
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TTI_DATA1_MEM_TX_TIMER_AC_EN;
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if (use_continuous_tx_intrs && (link == LINK_UP))
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val64 |= TTI_DATA1_MEM_TX_TIMER_CI_EN;
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if (i == 0)
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if (use_continuous_tx_intrs && (link == LINK_UP))
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val64 |= TTI_DATA1_MEM_TX_TIMER_CI_EN;
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writeq(val64, &bar0->tti_data1_mem);
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val64 = TTI_DATA2_MEM_TX_UFC_A(0x10) |
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TTI_DATA2_MEM_TX_UFC_B(0x20) |
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TTI_DATA2_MEM_TX_UFC_C(0x40) |
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TTI_DATA2_MEM_TX_UFC_D(0x80);
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if (nic->config.intr_type == MSI_X) {
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val64 = TTI_DATA2_MEM_TX_UFC_A(0x10) |
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TTI_DATA2_MEM_TX_UFC_B(0x100) |
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TTI_DATA2_MEM_TX_UFC_C(0x200) |
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TTI_DATA2_MEM_TX_UFC_D(0x300);
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} else {
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if ((nic->config.tx_steering_type ==
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TX_DEFAULT_STEERING) &&
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(config->tx_fifo_num > 1) &&
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(i >= nic->udp_fifo_idx) &&
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(i < (nic->udp_fifo_idx +
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nic->total_udp_fifos)))
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val64 = TTI_DATA2_MEM_TX_UFC_A(0x50) |
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TTI_DATA2_MEM_TX_UFC_B(0x80) |
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TTI_DATA2_MEM_TX_UFC_C(0x100) |
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TTI_DATA2_MEM_TX_UFC_D(0x120);
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else
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val64 = TTI_DATA2_MEM_TX_UFC_A(0x10) |
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TTI_DATA2_MEM_TX_UFC_B(0x20) |
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TTI_DATA2_MEM_TX_UFC_C(0x40) |
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TTI_DATA2_MEM_TX_UFC_D(0x80);
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}
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writeq(val64, &bar0->tti_data2_mem);
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@ -3771,7 +3789,7 @@ static void store_xmsi_data(struct s2io_nic *nic)
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static int s2io_enable_msi_x(struct s2io_nic *nic)
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{
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struct XENA_dev_config __iomem *bar0 = nic->bar0;
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u64 tx_mat, rx_mat;
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u64 rx_mat;
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u16 msi_control; /* Temp variable */
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int ret, i, j, msix_indx = 1;
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@ -3801,22 +3819,19 @@ static int s2io_enable_msi_x(struct s2io_nic *nic)
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nic->mac_control.stats_info->sw_stat.mem_allocated
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+= (MAX_REQUESTED_MSI_X * sizeof(struct s2io_msix_entry));
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for (i=0; i< MAX_REQUESTED_MSI_X; i++) {
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nic->entries[0].entry = 0;
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nic->s2io_entries[0].entry = 0;
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nic->s2io_entries[0].in_use = MSIX_FLG;
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nic->s2io_entries[0].type = MSIX_ALARM_TYPE;
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nic->s2io_entries[0].arg = &nic->mac_control.fifos;
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for (i = 1; i < MAX_REQUESTED_MSI_X; i++) {
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nic->entries[i].entry = i;
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nic->s2io_entries[i].entry = i;
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nic->s2io_entries[i].arg = NULL;
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nic->s2io_entries[i].in_use = 0;
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}
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tx_mat = readq(&bar0->tx_mat0_n[0]);
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for (i=0; i<nic->config.tx_fifo_num; i++, msix_indx++) {
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tx_mat |= TX_MAT_SET(i, msix_indx);
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nic->s2io_entries[msix_indx].arg = &nic->mac_control.fifos[i];
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nic->s2io_entries[msix_indx].type = MSIX_FIFO_TYPE;
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nic->s2io_entries[msix_indx].in_use = MSIX_FLG;
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}
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writeq(tx_mat, &bar0->tx_mat0_n[0]);
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rx_mat = readq(&bar0->rx_mat);
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for (j = 0; j < nic->config.rx_ring_num; j++, msix_indx++) {
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rx_mat |= RX_MAT_SET(j, msix_indx);
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@ -4353,15 +4368,35 @@ static irqreturn_t s2io_msix_ring_handle(int irq, void *dev_id)
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static irqreturn_t s2io_msix_fifo_handle(int irq, void *dev_id)
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{
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struct fifo_info *fifo = (struct fifo_info *)dev_id;
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struct s2io_nic *sp = fifo->nic;
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int i;
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struct fifo_info *fifos = (struct fifo_info *)dev_id;
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struct s2io_nic *sp = fifos->nic;
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struct XENA_dev_config __iomem *bar0 = sp->bar0;
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struct config_param *config = &sp->config;
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u64 reason;
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if (!is_s2io_card_up(sp))
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if (unlikely(!is_s2io_card_up(sp)))
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return IRQ_NONE;
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reason = readq(&bar0->general_int_status);
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if (unlikely(reason == S2IO_MINUS_ONE))
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/* Nothing much can be done. Get out */
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return IRQ_HANDLED;
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tx_intr_handler(fifo);
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writeq(S2IO_MINUS_ONE, &bar0->general_int_mask);
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if (reason & GEN_INTR_TXTRAFFIC)
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writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int);
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for (i = 0; i < config->tx_fifo_num; i++)
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tx_intr_handler(&fifos[i]);
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writeq(sp->general_int_mask, &bar0->general_int_mask);
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readl(&bar0->general_int_status);
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return IRQ_HANDLED;
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}
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static void s2io_txpic_intr_handle(struct s2io_nic *sp)
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{
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struct XENA_dev_config __iomem *bar0 = sp->bar0;
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@ -6985,62 +7020,61 @@ static int s2io_add_isr(struct s2io_nic * sp)
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/* After proper initialization of H/W, register ISR */
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if (sp->config.intr_type == MSI_X) {
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int i, msix_tx_cnt=0,msix_rx_cnt=0;
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int i, msix_rx_cnt = 0;
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for (i=1; (sp->s2io_entries[i].in_use == MSIX_FLG); i++) {
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if (sp->s2io_entries[i].type == MSIX_FIFO_TYPE) {
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sprintf(sp->desc[i], "%s:MSI-X-%d-TX",
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for (i = 0; (sp->s2io_entries[i].in_use == MSIX_FLG); i++) {
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if (sp->s2io_entries[i].type ==
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MSIX_RING_TYPE) {
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sprintf(sp->desc[i], "%s:MSI-X-%d-RX",
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dev->name, i);
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err = request_irq(sp->entries[i].vector,
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s2io_msix_ring_handle, 0,
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sp->desc[i],
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sp->s2io_entries[i].arg);
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} else if (sp->s2io_entries[i].type ==
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MSIX_ALARM_TYPE) {
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sprintf(sp->desc[i], "%s:MSI-X-%d-TX",
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dev->name, i);
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err = request_irq(sp->entries[i].vector,
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s2io_msix_fifo_handle, 0, sp->desc[i],
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sp->s2io_entries[i].arg);
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/* If either data or addr is zero print it */
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if(!(sp->msix_info[i].addr &&
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sp->msix_info[i].data)) {
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DBG_PRINT(ERR_DBG, "%s @ Addr:0x%llx "
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"Data:0x%llx\n",sp->desc[i],
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(unsigned long long)
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sp->msix_info[i].addr,
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(unsigned long long)
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sp->msix_info[i].data);
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} else {
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msix_tx_cnt++;
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err = request_irq(sp->entries[i].vector,
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s2io_msix_fifo_handle, 0,
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sp->desc[i],
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sp->s2io_entries[i].arg);
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}
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} else {
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sprintf(sp->desc[i], "%s:MSI-X-%d-RX",
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dev->name, i);
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err = request_irq(sp->entries[i].vector,
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s2io_msix_ring_handle, 0, sp->desc[i],
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sp->s2io_entries[i].arg);
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/* If either data or addr is zero print it */
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if(!(sp->msix_info[i].addr &&
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/* if either data or addr is zero print it. */
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if (!(sp->msix_info[i].addr &&
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sp->msix_info[i].data)) {
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DBG_PRINT(ERR_DBG, "%s @ Addr:0x%llx "
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"Data:0x%llx\n",sp->desc[i],
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DBG_PRINT(ERR_DBG,
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"%s @Addr:0x%llx Data:0x%llx\n",
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sp->desc[i],
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(unsigned long long)
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sp->msix_info[i].addr,
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(unsigned long long)
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sp->msix_info[i].data);
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} else {
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ntohl(sp->msix_info[i].data));
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} else
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msix_rx_cnt++;
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if (err) {
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remove_msix_isr(sp);
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DBG_PRINT(ERR_DBG,
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"%s:MSI-X-%d registration "
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"failed\n", dev->name, i);
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DBG_PRINT(ERR_DBG,
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"%s: Defaulting to INTA\n",
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dev->name);
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sp->config.intr_type = INTA;
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break;
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}
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}
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if (err) {
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remove_msix_isr(sp);
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DBG_PRINT(ERR_DBG,"%s:MSI-X-%d registration "
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"failed\n", dev->name, i);
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DBG_PRINT(ERR_DBG, "%s: defaulting to INTA\n",
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dev->name);
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sp->config.intr_type = INTA;
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break;
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}
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sp->s2io_entries[i].in_use = MSIX_REGISTERED_SUCCESS;
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sp->s2io_entries[i].in_use =
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MSIX_REGISTERED_SUCCESS;
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}
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if (!err) {
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printk(KERN_INFO "MSI-X-TX %d entries enabled\n",
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msix_tx_cnt);
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printk(KERN_INFO "MSI-X-RX %d entries enabled\n",
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msix_rx_cnt);
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--msix_rx_cnt);
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DBG_PRINT(INFO_DBG, "MSI-X-TX entries enabled"
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" through alarm vector\n");
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}
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}
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if (sp->config.intr_type == INTA) {
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@ -7218,7 +7252,7 @@ static int s2io_card_up(struct s2io_nic * sp)
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/* Enable select interrupts */
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en_dis_err_alarms(sp, ENA_ALL_INTRS, ENABLE_INTRS);
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if (sp->config.intr_type != INTA)
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en_dis_able_nic_intrs(sp, ENA_ALL_INTRS, DISABLE_INTRS);
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en_dis_able_nic_intrs(sp, TX_TRAFFIC_INTR, ENABLE_INTRS);
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else {
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interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR;
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interruptible |= TX_PIC_INTR;
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@ -849,8 +849,8 @@ struct s2io_msix_entry
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void *arg;
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u8 type;
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#define MSIX_FIFO_TYPE 1
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#define MSIX_RING_TYPE 2
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#define MSIX_ALARM_TYPE 1
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#define MSIX_RING_TYPE 2
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u8 in_use;
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#define MSIX_REGISTERED_SUCCESS 0xAA
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@ -982,6 +982,7 @@ struct s2io_nic {
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u16 lro_max_aggr_per_sess;
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volatile unsigned long state;
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u64 general_int_mask;
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#define VPD_STRING_LEN 80
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u8 product_name[VPD_STRING_LEN];
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u8 serial_num[VPD_STRING_LEN];
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