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https://github.com/edk2-porting/linux-next.git
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b43: Convert usage of b43_phy_mask()
This patch converts code to use the new b43_phy_mask() API. The semantic patch that makes this change is as follows: // <smpl> @@ expression dev, addr, mask; @@ -b43_phy_write(dev, addr, b43_phy_read(dev, addr) & mask); +b43_phy_mask(dev, addr, mask); // </smpl> Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
e59be0b529
commit
ac1ea3959f
@ -426,15 +426,10 @@ static void lo_measure_setup(struct b43_wldev *dev,
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sav->phy_cck_3E = b43_phy_read(dev, B43_PHY_CCK(0x3E));
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sav->phy_crs0 = b43_phy_read(dev, B43_PHY_CRS0);
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b43_phy_write(dev, B43_PHY_CLASSCTL,
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b43_phy_read(dev, B43_PHY_CLASSCTL)
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& 0xFFFC);
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b43_phy_write(dev, B43_PHY_CRS0, b43_phy_read(dev, B43_PHY_CRS0)
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& 0x7FFF);
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b43_phy_mask(dev, B43_PHY_CLASSCTL, 0xFFFC);
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b43_phy_mask(dev, B43_PHY_CRS0, 0x7FFF);
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b43_phy_set(dev, B43_PHY_ANALOGOVER, 0x0003);
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b43_phy_write(dev, B43_PHY_ANALOGOVERVAL,
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b43_phy_read(dev, B43_PHY_ANALOGOVERVAL)
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& 0xFFFC);
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b43_phy_mask(dev, B43_PHY_ANALOGOVERVAL, 0xFFFC);
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if (phy->type == B43_PHYTYPE_G) {
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if ((phy->rev >= 7) &&
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(sprom->boardflags_lo & B43_BFL_EXTLNA)) {
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@ -224,8 +224,7 @@ static void b43_phy_ww(struct b43_wldev *dev)
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u16 b, curr_s, best_s = 0xFFFF;
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int i;
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b43_phy_write(dev, B43_PHY_CRS0,
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b43_phy_read(dev, B43_PHY_CRS0) & ~B43_PHY_CRS0_EN);
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b43_phy_mask(dev, B43_PHY_CRS0, ~B43_PHY_CRS0_EN);
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b43_phy_set(dev, B43_PHY_OFDM(0x1B), 0x1000);
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b43_phy_write(dev, B43_PHY_OFDM(0x82),
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(b43_phy_read(dev, B43_PHY_OFDM(0x82)) & 0xF0FF) | 0x0300);
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@ -298,13 +297,11 @@ void b43_phy_inita(struct b43_wldev *dev)
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if (phy->rev >= 6) {
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if (phy->type == B43_PHYTYPE_A)
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b43_phy_write(dev, B43_PHY_OFDM(0x1B),
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b43_phy_read(dev, B43_PHY_OFDM(0x1B)) & ~0x1000);
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b43_phy_mask(dev, B43_PHY_OFDM(0x1B), ~0x1000);
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if (b43_phy_read(dev, B43_PHY_ENCORE) & B43_PHY_ENCORE_EN)
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b43_phy_set(dev, B43_PHY_ENCORE, 0x0010);
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else
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b43_phy_write(dev, B43_PHY_ENCORE,
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b43_phy_read(dev, B43_PHY_ENCORE) & ~0x1010);
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b43_phy_mask(dev, B43_PHY_ENCORE, ~0x1010);
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}
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b43_wa_all(dev);
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@ -515,8 +512,8 @@ static void b43_aphy_op_software_rfkill(struct b43_wldev *dev,
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return;
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b43_radio_write16(dev, 0x0004, 0x00C0);
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b43_radio_write16(dev, 0x0005, 0x0008);
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b43_phy_write(dev, 0x0010, b43_phy_read(dev, 0x0010) & 0xFFF7);
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b43_phy_write(dev, 0x0011, b43_phy_read(dev, 0x0011) & 0xFFF7);
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b43_phy_mask(dev, 0x0010, 0xFFF7);
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b43_phy_mask(dev, 0x0011, 0xFFF7);
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b43_radio_init2060(dev);
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} else {
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b43_radio_write16(dev, 0x0004, 0x00FF);
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@ -454,13 +454,13 @@ static void b43_calc_nrssi_offset(struct b43_wldev *dev)
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backup[10] = b43_radio_read16(dev, 0x007A);
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backup[11] = b43_radio_read16(dev, 0x0043);
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b43_phy_write(dev, 0x0429, b43_phy_read(dev, 0x0429) & 0x7FFF);
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b43_phy_mask(dev, 0x0429, 0x7FFF);
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b43_phy_write(dev, 0x0001,
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(b43_phy_read(dev, 0x0001) & 0x3FFF) | 0x4000);
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b43_phy_set(dev, 0x0811, 0x000C);
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b43_phy_write(dev, 0x0812,
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(b43_phy_read(dev, 0x0812) & 0xFFF3) | 0x0004);
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b43_phy_write(dev, 0x0802, b43_phy_read(dev, 0x0802) & ~(0x1 | 0x2));
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b43_phy_mask(dev, 0x0802, ~(0x1 | 0x2));
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if (phy->rev >= 6) {
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backup[12] = b43_phy_read(dev, 0x002E);
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backup[13] = b43_phy_read(dev, 0x002F);
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@ -505,8 +505,7 @@ static void b43_calc_nrssi_offset(struct b43_wldev *dev)
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b43_radio_read16(dev, 0x007A) & 0x007F);
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if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */
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b43_phy_set(dev, 0x0814, 0x0001);
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b43_phy_write(dev, 0x0815,
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b43_phy_read(dev, 0x0815) & 0xFFFE);
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b43_phy_mask(dev, 0x0815, 0xFFFE);
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}
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b43_phy_set(dev, 0x0811, 0x000C);
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b43_phy_set(dev, 0x0812, 0x000C);
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@ -522,8 +521,7 @@ static void b43_calc_nrssi_offset(struct b43_wldev *dev)
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}
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if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */
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b43_phy_set(dev, 0x0814, 0x0004);
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b43_phy_write(dev, 0x0815,
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b43_phy_read(dev, 0x0815) & 0xFFFB);
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b43_phy_mask(dev, 0x0815, 0xFFFB);
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}
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b43_phy_write(dev, 0x0003, (b43_phy_read(dev, 0x0003) & 0xFF9F)
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| 0x0040);
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@ -601,9 +599,8 @@ static void b43_calc_nrssi_slope(struct b43_wldev *dev)
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if (phy->radio_rev == 8)
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b43_calc_nrssi_offset(dev);
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b43_phy_write(dev, B43_PHY_G_CRS,
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b43_phy_read(dev, B43_PHY_G_CRS) & 0x7FFF);
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b43_phy_write(dev, 0x0802, b43_phy_read(dev, 0x0802) & 0xFFFC);
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b43_phy_mask(dev, B43_PHY_G_CRS, 0x7FFF);
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b43_phy_mask(dev, 0x0802, 0xFFFC);
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backup[7] = b43_read16(dev, 0x03E2);
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b43_write16(dev, 0x03E2, b43_read16(dev, 0x03E2) | 0x8000);
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backup[0] = b43_radio_read16(dev, 0x007A);
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@ -635,9 +632,7 @@ static void b43_calc_nrssi_slope(struct b43_wldev *dev)
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break;
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case 3:
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case 5:
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b43_phy_write(dev, 0x0801,
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b43_phy_read(dev, 0x0801)
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& 0xFFBF);
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b43_phy_mask(dev, 0x0801, 0xFFBF);
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break;
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}
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b43_phy_set(dev, 0x0060, 0x0040);
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@ -717,10 +712,8 @@ static void b43_calc_nrssi_slope(struct b43_wldev *dev)
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b43_phy_write(dev, B43_PHY_G_LO_CONTROL, backup[13]);
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}
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if (phy->rev >= 2) {
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b43_phy_write(dev, 0x0812,
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b43_phy_read(dev, 0x0812) & 0xFFCF);
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b43_phy_write(dev, 0x0811,
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b43_phy_read(dev, 0x0811) & 0xFFCF);
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b43_phy_mask(dev, 0x0812, 0xFFCF);
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b43_phy_mask(dev, 0x0811, 0xFFCF);
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}
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b43_radio_write16(dev, 0x007A, backup[0]);
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@ -891,9 +884,7 @@ b43_radio_interference_mitigation_enable(struct b43_wldev *dev, int mode)
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case B43_INTERFMODE_NONWLAN:
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if (phy->rev != 1) {
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b43_phy_set(dev, 0x042B, 0x0800);
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b43_phy_write(dev, B43_PHY_G_CRS,
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b43_phy_read(dev,
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B43_PHY_G_CRS) & ~0x4000);
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b43_phy_mask(dev, B43_PHY_G_CRS, ~0x4000);
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break;
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}
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radio_stacksave(0x0078);
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@ -985,9 +976,7 @@ b43_radio_interference_mitigation_enable(struct b43_wldev *dev, int mode)
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phy_stacksave(0x042B);
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phy_stacksave(0x048C);
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b43_phy_write(dev, B43_PHY_RADIO_BITFIELD,
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b43_phy_read(dev, B43_PHY_RADIO_BITFIELD)
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& ~0x1000);
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b43_phy_mask(dev, B43_PHY_RADIO_BITFIELD, ~0x1000);
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b43_phy_write(dev, B43_PHY_G_CRS,
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(b43_phy_read(dev, B43_PHY_G_CRS)
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& 0xFFFC) | 0x0002);
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@ -1041,8 +1030,7 @@ b43_radio_interference_mitigation_enable(struct b43_wldev *dev, int mode)
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& 0xFFF0) | 0x000B);
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if (phy->rev >= 3) {
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b43_phy_write(dev, 0x048A, b43_phy_read(dev, 0x048A)
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& ~0x8000);
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b43_phy_mask(dev, 0x048A, ~0x8000);
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b43_phy_write(dev, 0x0415, (b43_phy_read(dev, 0x0415)
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& 0x8000) | 0x36D8);
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b43_phy_write(dev, 0x0416, (b43_phy_read(dev, 0x0416)
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@ -1068,8 +1056,7 @@ b43_radio_interference_mitigation_enable(struct b43_wldev *dev, int mode)
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} else if (phy->rev >= 6) {
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b43_ofdmtab_write16(dev, 0x1A00, 0x3, 0x007F);
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b43_ofdmtab_write16(dev, 0x1A00, 0x2, 0x007F);
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b43_phy_write(dev, 0x04AD, b43_phy_read(dev, 0x04AD)
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& 0x00FF);
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b43_phy_mask(dev, 0x04AD, 0x00FF);
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}
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b43_calc_nrssi_slope(dev);
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break;
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@ -1088,19 +1075,16 @@ b43_radio_interference_mitigation_disable(struct b43_wldev *dev, int mode)
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switch (mode) {
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case B43_INTERFMODE_NONWLAN:
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if (phy->rev != 1) {
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b43_phy_write(dev, 0x042B,
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b43_phy_read(dev, 0x042B) & ~0x0800);
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b43_phy_mask(dev, 0x042B, ~0x0800);
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b43_phy_set(dev, B43_PHY_G_CRS, 0x4000);
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break;
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}
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radio_stackrestore(0x0078);
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b43_calc_nrssi_threshold(dev);
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phy_stackrestore(0x0406);
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b43_phy_write(dev, 0x042B, b43_phy_read(dev, 0x042B) & ~0x0800);
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b43_phy_mask(dev, 0x042B, ~0x0800);
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if (!dev->bad_frames_preempt) {
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b43_phy_write(dev, B43_PHY_RADIO_BITFIELD,
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b43_phy_read(dev, B43_PHY_RADIO_BITFIELD)
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& ~(1 << 11));
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b43_phy_mask(dev, B43_PHY_RADIO_BITFIELD, ~(1 << 11));
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}
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b43_phy_set(dev, B43_PHY_G_CRS, 0x4000);
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phy_stackrestore(0x04A0);
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@ -1371,14 +1355,9 @@ static u16 b43_radio_init2050(struct b43_wldev *dev)
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sav.phy_classctl = b43_phy_read(dev, B43_PHY_CLASSCTL);
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b43_phy_set(dev, B43_PHY_ANALOGOVER, 0x0003);
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b43_phy_write(dev, B43_PHY_ANALOGOVERVAL,
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b43_phy_read(dev, B43_PHY_ANALOGOVERVAL)
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& 0xFFFC);
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b43_phy_write(dev, B43_PHY_CRS0, b43_phy_read(dev, B43_PHY_CRS0)
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& 0x7FFF);
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b43_phy_write(dev, B43_PHY_CLASSCTL,
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b43_phy_read(dev, B43_PHY_CLASSCTL)
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& 0xFFFC);
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b43_phy_mask(dev, B43_PHY_ANALOGOVERVAL, 0xFFFC);
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b43_phy_mask(dev, B43_PHY_CRS0, 0x7FFF);
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b43_phy_mask(dev, B43_PHY_CLASSCTL, 0xFFFC);
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if (has_loopback_gain(phy)) {
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sav.phy_lo_mask = b43_phy_read(dev, B43_PHY_LO_MASK);
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sav.phy_lo_ctl = b43_phy_read(dev, B43_PHY_LO_CTL);
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@ -1399,8 +1378,7 @@ static u16 b43_radio_init2050(struct b43_wldev *dev)
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b43_write16(dev, 0x3E2, b43_read16(dev, 0x3E2) | 0x8000);
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sav.phy_syncctl = b43_phy_read(dev, B43_PHY_SYNCCTL);
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b43_phy_write(dev, B43_PHY_SYNCCTL, b43_phy_read(dev, B43_PHY_SYNCCTL)
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& 0xFF7F);
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b43_phy_mask(dev, B43_PHY_SYNCCTL, 0xFF7F);
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sav.reg_3E6 = b43_read16(dev, 0x3E6);
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sav.reg_3F4 = b43_read16(dev, 0x3F4);
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@ -1799,8 +1777,7 @@ static void b43_phy_initb6(struct b43_wldev *dev)
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if (phy->analog == 4) {
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b43_write16(dev, 0x3E4, 9);
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b43_phy_write(dev, 0x61, b43_phy_read(dev, 0x61)
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& 0x0FFF);
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b43_phy_mask(dev, 0x61, 0x0FFF);
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} else {
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b43_phy_write(dev, 0x0002, (b43_phy_read(dev, 0x0002) & 0xFFC0)
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| 0x0004);
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@ -1845,24 +1822,17 @@ static void b43_calc_loopback_gain(struct b43_wldev *dev)
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backup_radio[1] = b43_radio_read16(dev, 0x43);
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backup_radio[2] = b43_radio_read16(dev, 0x7A);
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b43_phy_write(dev, B43_PHY_CRS0,
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b43_phy_read(dev, B43_PHY_CRS0) & 0x3FFF);
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b43_phy_mask(dev, B43_PHY_CRS0, 0x3FFF);
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b43_phy_set(dev, B43_PHY_CCKBBANDCFG, 0x8000);
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b43_phy_set(dev, B43_PHY_RFOVER, 0x0002);
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b43_phy_write(dev, B43_PHY_RFOVERVAL,
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b43_phy_read(dev, B43_PHY_RFOVERVAL) & 0xFFFD);
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b43_phy_mask(dev, B43_PHY_RFOVERVAL, 0xFFFD);
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b43_phy_set(dev, B43_PHY_RFOVER, 0x0001);
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b43_phy_write(dev, B43_PHY_RFOVERVAL,
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b43_phy_read(dev, B43_PHY_RFOVERVAL) & 0xFFFE);
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b43_phy_mask(dev, B43_PHY_RFOVERVAL, 0xFFFE);
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if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */
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b43_phy_set(dev, B43_PHY_ANALOGOVER, 0x0001);
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b43_phy_write(dev, B43_PHY_ANALOGOVERVAL,
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b43_phy_read(dev,
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B43_PHY_ANALOGOVERVAL) & 0xFFFE);
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b43_phy_mask(dev, B43_PHY_ANALOGOVERVAL, 0xFFFE);
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b43_phy_set(dev, B43_PHY_ANALOGOVER, 0x0002);
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b43_phy_write(dev, B43_PHY_ANALOGOVERVAL,
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b43_phy_read(dev,
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B43_PHY_ANALOGOVERVAL) & 0xFFFD);
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b43_phy_mask(dev, B43_PHY_ANALOGOVERVAL, 0xFFFD);
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}
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b43_phy_set(dev, B43_PHY_RFOVER, 0x000C);
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b43_phy_set(dev, B43_PHY_RFOVERVAL, 0x000C);
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@ -1878,9 +1848,7 @@ static void b43_calc_loopback_gain(struct b43_wldev *dev)
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b43_phy_set(dev, B43_PHY_CCK(0x0A), 0x2000);
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if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */
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b43_phy_set(dev, B43_PHY_ANALOGOVER, 0x0004);
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b43_phy_write(dev, B43_PHY_ANALOGOVERVAL,
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b43_phy_read(dev,
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B43_PHY_ANALOGOVERVAL) & 0xFFFB);
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b43_phy_mask(dev, B43_PHY_ANALOGOVERVAL, 0xFFFB);
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}
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b43_phy_write(dev, B43_PHY_CCK(0x03),
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(b43_phy_read(dev, B43_PHY_CCK(0x03))
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@ -1909,8 +1877,7 @@ static void b43_calc_loopback_gain(struct b43_wldev *dev)
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& 0xC0FF) | 0x800);
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b43_phy_set(dev, B43_PHY_RFOVER, 0x0100);
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b43_phy_write(dev, B43_PHY_RFOVERVAL,
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b43_phy_read(dev, B43_PHY_RFOVERVAL) & 0xCFFF);
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b43_phy_mask(dev, B43_PHY_RFOVERVAL, 0xCFFF);
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if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_EXTLNA) {
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if (phy->rev >= 7) {
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@ -2002,7 +1969,7 @@ static void b43_hardware_pctl_early_init(struct b43_wldev *dev)
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return;
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}
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b43_phy_write(dev, 0x0036, b43_phy_read(dev, 0x0036) & 0xFEFF);
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b43_phy_mask(dev, 0x0036, 0xFEFF);
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b43_phy_write(dev, 0x002F, 0x0202);
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b43_phy_set(dev, 0x047C, 0x0002);
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b43_phy_set(dev, 0x047A, 0xF000);
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@ -2017,10 +1984,8 @@ static void b43_hardware_pctl_early_init(struct b43_wldev *dev)
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} else {
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b43_phy_set(dev, 0x0036, 0x0200);
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b43_phy_set(dev, 0x0036, 0x0400);
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b43_phy_write(dev, 0x005D, b43_phy_read(dev, 0x005D)
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& 0x7FFF);
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b43_phy_write(dev, 0x004F, b43_phy_read(dev, 0x004F)
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& 0xFFFE);
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b43_phy_mask(dev, 0x005D, 0x7FFF);
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b43_phy_mask(dev, 0x004F, 0xFFFE);
|
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b43_phy_write(dev, 0x004E, (b43_phy_read(dev, 0x004E)
|
||||
& 0xFFC0) | 0x0010);
|
||||
b43_phy_write(dev, 0x002E, 0xC07F);
|
||||
@ -2047,15 +2012,13 @@ static void b43_hardware_pctl_init_gphy(struct b43_wldev *dev)
|
||||
| (gphy->tgt_idle_tssi - gphy->cur_idle_tssi));
|
||||
b43_gphy_tssi_power_lt_init(dev);
|
||||
b43_gphy_gain_lt_init(dev);
|
||||
b43_phy_write(dev, 0x0060, b43_phy_read(dev, 0x0060) & 0xFFBF);
|
||||
b43_phy_mask(dev, 0x0060, 0xFFBF);
|
||||
b43_phy_write(dev, 0x0014, 0x0000);
|
||||
|
||||
B43_WARN_ON(phy->rev < 6);
|
||||
b43_phy_set(dev, 0x0478, 0x0800);
|
||||
b43_phy_write(dev, 0x0478, b43_phy_read(dev, 0x0478)
|
||||
& 0xFEFF);
|
||||
b43_phy_write(dev, 0x0801, b43_phy_read(dev, 0x0801)
|
||||
& 0xFFBF);
|
||||
b43_phy_mask(dev, 0x0478, 0xFEFF);
|
||||
b43_phy_mask(dev, 0x0801, 0xFFBF);
|
||||
|
||||
b43_gphy_dc_lt_init(dev, 1);
|
||||
|
||||
@ -2245,11 +2208,8 @@ static void b43_phy_initg(struct b43_wldev *dev)
|
||||
but OFDM is legal everywhere */
|
||||
if ((dev->dev->bus->chip_id == 0x4306
|
||||
&& dev->dev->bus->chip_package == 2) || 0) {
|
||||
b43_phy_write(dev, B43_PHY_CRS0, b43_phy_read(dev, B43_PHY_CRS0)
|
||||
& 0xBFFF);
|
||||
b43_phy_write(dev, B43_PHY_OFDM(0xC3),
|
||||
b43_phy_read(dev, B43_PHY_OFDM(0xC3))
|
||||
& 0x7FFF);
|
||||
b43_phy_mask(dev, B43_PHY_CRS0, 0xBFFF);
|
||||
b43_phy_mask(dev, B43_PHY_OFDM(0xC3), 0x7FFF);
|
||||
}
|
||||
}
|
||||
|
||||
@ -2451,9 +2411,8 @@ static u8 b43_gphy_aci_scan(struct b43_wldev *dev)
|
||||
|
||||
b43_phy_lock(dev);
|
||||
b43_radio_lock(dev);
|
||||
b43_phy_write(dev, 0x0802, b43_phy_read(dev, 0x0802) & 0xFFFC);
|
||||
b43_phy_write(dev, B43_PHY_G_CRS,
|
||||
b43_phy_read(dev, B43_PHY_G_CRS) & 0x7FFF);
|
||||
b43_phy_mask(dev, 0x0802, 0xFFFC);
|
||||
b43_phy_mask(dev, B43_PHY_G_CRS, 0x7FFF);
|
||||
b43_set_all_gains(dev, 3, 8, 1);
|
||||
|
||||
start = (channel - 5 > 0) ? channel - 5 : 1;
|
||||
@ -2466,7 +2425,7 @@ static u8 b43_gphy_aci_scan(struct b43_wldev *dev)
|
||||
b43_switch_channel(dev, channel);
|
||||
b43_phy_write(dev, 0x0802,
|
||||
(b43_phy_read(dev, 0x0802) & 0xFFFC) | 0x0003);
|
||||
b43_phy_write(dev, 0x0403, b43_phy_read(dev, 0x0403) & 0xFFF8);
|
||||
b43_phy_mask(dev, 0x0403, 0xFFF8);
|
||||
b43_phy_set(dev, B43_PHY_G_CRS, 0x8000);
|
||||
b43_set_original_gains(dev);
|
||||
for (i = 0; i < 13; i++) {
|
||||
|
@ -62,8 +62,7 @@ void b43_wa_initgains(struct b43_wldev *dev)
|
||||
struct b43_phy *phy = &dev->phy;
|
||||
|
||||
b43_phy_write(dev, B43_PHY_LNAHPFCTL, 0x1FF9);
|
||||
b43_phy_write(dev, B43_PHY_LPFGAINCTL,
|
||||
b43_phy_read(dev, B43_PHY_LPFGAINCTL) & 0xFF0F);
|
||||
b43_phy_mask(dev, B43_PHY_LPFGAINCTL, 0xFF0F);
|
||||
if (phy->rev <= 2)
|
||||
b43_ofdmtab_write16(dev, B43_OFDMTAB_LPFGAIN, 0, 0x1FBF);
|
||||
b43_radio_write16(dev, 0x0002, 0x1FBF);
|
||||
@ -86,7 +85,7 @@ void b43_wa_initgains(struct b43_wldev *dev)
|
||||
|
||||
static void b43_wa_divider(struct b43_wldev *dev)
|
||||
{
|
||||
b43_phy_write(dev, 0x002B, b43_phy_read(dev, 0x002B) & ~0x0100);
|
||||
b43_phy_mask(dev, 0x002B, ~0x0100);
|
||||
b43_phy_write(dev, 0x008E, 0x58C1);
|
||||
}
|
||||
|
||||
@ -433,8 +432,7 @@ static void b43_wa_altagc(struct b43_wldev *dev)
|
||||
b43_phy_write(dev, B43_PHY_OFDM(0x1B),
|
||||
(b43_phy_read(dev, B43_PHY_OFDM(0x1B)) & ~0x001E) | 0x0002);
|
||||
} else {
|
||||
b43_phy_write(dev, B43_PHY_OFDM(0x1B),
|
||||
b43_phy_read(dev, B43_PHY_OFDM(0x1B)) & ~0x001E);
|
||||
b43_phy_mask(dev, B43_PHY_OFDM(0x1B), ~0x001E);
|
||||
b43_phy_write(dev, B43_PHY_OFDM(0x1F), 0x287A);
|
||||
b43_phy_write(dev, B43_PHY_LPFGAINCTL,
|
||||
(b43_phy_read(dev, B43_PHY_LPFGAINCTL) & ~0x000F) | 0x0004);
|
||||
@ -465,10 +463,8 @@ static void b43_wa_altagc(struct b43_wldev *dev)
|
||||
b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 3, 28);
|
||||
}
|
||||
if (phy->rev >= 6) {
|
||||
b43_phy_write(dev, B43_PHY_OFDM(0x26),
|
||||
b43_phy_read(dev, B43_PHY_OFDM(0x26)) & ~0x0003);
|
||||
b43_phy_write(dev, B43_PHY_OFDM(0x26),
|
||||
b43_phy_read(dev, B43_PHY_OFDM(0x26)) & ~0x1000);
|
||||
b43_phy_mask(dev, B43_PHY_OFDM(0x26), ~0x0003);
|
||||
b43_phy_mask(dev, B43_PHY_OFDM(0x26), ~0x1000);
|
||||
}
|
||||
b43_phy_read(dev, B43_PHY_VERSION_OFDM); /* Dummy read */
|
||||
}
|
||||
@ -534,8 +530,7 @@ static void b43_wa_boards_g(struct b43_wldev *dev)
|
||||
b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 2, 0x0001);
|
||||
if ((bus->sprom.boardflags_lo & B43_BFL_EXTLNA) &&
|
||||
(phy->rev >= 7)) {
|
||||
b43_phy_write(dev, B43_PHY_EXTG(0x11),
|
||||
b43_phy_read(dev, B43_PHY_EXTG(0x11)) & 0xF7FF);
|
||||
b43_phy_mask(dev, B43_PHY_EXTG(0x11), 0xF7FF);
|
||||
b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0020, 0x0001);
|
||||
b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0021, 0x0001);
|
||||
b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0022, 0x0001);
|
||||
|
Loading…
Reference in New Issue
Block a user