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i2c: piix4: Add support for secondary SMBus on AMD SB800 and AMD FCH chipsets
Add support for the secondary SMBus controller on the AMD SB800 and AMD FCH chipsets. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Tested-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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@ -73,9 +73,10 @@ this driver on those mainboards.
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The ServerWorks Southbridges, the Intel 440MX, and the Victory66 are
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identical to the PIIX4 in I2C/SMBus support.
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The AMD SB700 and SP5100 chipsets implement two PIIX4-compatible SMBus
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controllers. If your BIOS initializes the secondary controller, it will
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be detected by this driver as an "Auxiliary SMBus Host Controller".
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The AMD SB700, SB800, SP5100 and Hudson-2 chipsets implement two
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PIIX4-compatible SMBus controllers. If your BIOS initializes the
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secondary controller, it will be detected by this driver as
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an "Auxiliary SMBus Host Controller".
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If you own Force CPCI735 motherboard or other OSB4 based systems you may need
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to change the SMBus Interrupt Select register so the SMBus controller uses
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@ -231,11 +231,11 @@ static int piix4_setup(struct pci_dev *PIIX4_dev,
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}
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static int piix4_setup_sb800(struct pci_dev *PIIX4_dev,
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const struct pci_device_id *id)
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const struct pci_device_id *id, u8 aux)
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{
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unsigned short piix4_smba;
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unsigned short smba_idx = 0xcd6;
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u8 smba_en_lo, smba_en_hi, i2ccfg, i2ccfg_offset = 0x10, smb_en = 0x2c;
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u8 smba_en_lo, smba_en_hi, i2ccfg, i2ccfg_offset = 0x10, smb_en;
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/* SB800 and later SMBus does not support forcing address */
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if (force || force_addr) {
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@ -245,6 +245,8 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev,
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}
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/* Determine the address of the SMBus areas */
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smb_en = (aux) ? 0x28 : 0x2c;
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if (!request_region(smba_idx, 2, "smba_idx")) {
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dev_err(&PIIX4_dev->dev, "SMBus base address index region "
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"0x%x already in use!\n", smba_idx);
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@ -272,6 +274,13 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev,
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return -EBUSY;
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}
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/* Aux SMBus does not support IRQ information */
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if (aux) {
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dev_info(&PIIX4_dev->dev,
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"SMBus Host Controller at 0x%x\n", piix4_smba);
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return piix4_smba;
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}
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/* Request the SMBus I2C bus config region */
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if (!request_region(piix4_smba + i2ccfg_offset, 1, "i2ccfg")) {
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dev_err(&PIIX4_dev->dev, "SMBus I2C bus config region "
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@ -597,7 +606,7 @@ static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id)
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dev->revision >= 0x40) ||
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dev->vendor == PCI_VENDOR_ID_AMD)
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/* base address location etc changed in SB800 */
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retval = piix4_setup_sb800(dev, id);
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retval = piix4_setup_sb800(dev, id, 0);
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else
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retval = piix4_setup(dev, id);
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@ -611,17 +620,29 @@ static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id)
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return retval;
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/* Check for auxiliary SMBus on some AMD chipsets */
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retval = -ENODEV;
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if (dev->vendor == PCI_VENDOR_ID_ATI &&
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dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
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dev->revision < 0x40) {
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retval = piix4_setup_aux(dev, id, 0x58);
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if (retval > 0) {
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/* Try to add the aux adapter if it exists,
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* piix4_add_adapter will clean up if this fails */
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piix4_add_adapter(dev, retval, &piix4_aux_adapter);
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dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS) {
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if (dev->revision < 0x40) {
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retval = piix4_setup_aux(dev, id, 0x58);
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} else {
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/* SB800 added aux bus too */
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retval = piix4_setup_sb800(dev, id, 1);
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}
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}
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if (dev->vendor == PCI_VENDOR_ID_AMD &&
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dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) {
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retval = piix4_setup_sb800(dev, id, 1);
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}
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if (retval > 0) {
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/* Try to add the aux adapter if it exists,
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* piix4_add_adapter will clean up if this fails */
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piix4_add_adapter(dev, retval, &piix4_aux_adapter);
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}
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return 0;
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}
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