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gpu: ipu-v3: initially clear all interrupts

If we want to stop resetting the IPU in the future, masking all
interrupts before registering the irq handlers will not be enough to
avoid spurious interrupts. We also have to clear them.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Liu Ying <gnuiyl@gmail.com>
This commit is contained in:
Philipp Zabel 2016-08-29 08:32:03 +02:00
parent eae13c9337
commit a92d81456c

View File

@ -1286,8 +1286,11 @@ static int ipu_irq_init(struct ipu_soc *ipu)
return ret;
}
for (i = 0; i < IPU_NUM_IRQS; i += 32)
/* Mask and clear all interrupts */
for (i = 0; i < IPU_NUM_IRQS; i += 32) {
ipu_cm_write(ipu, 0, IPU_INT_CTRL(i / 32));
ipu_cm_write(ipu, ~unused[i / 32], IPU_INT_STAT(i / 32));
}
for (i = 0; i < IPU_NUM_IRQS; i += 32) {
gc = irq_get_domain_generic_chip(ipu->domain, i);