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drm/radeon: fix endian swap on hawaii clear state buffer setup

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Need to swap on BE.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
This commit is contained in:
Alex Deucher 2014-04-02 08:42:48 -04:00 committed by Christian König
parent 1608627935
commit a8947f5767
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/radeon/cik.c
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@ -6542,8 +6542,8 @@ void cik_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer)
buffer[count++] = cpu_to_le32(0x00000000);
break;
case CHIP_HAWAII:
buffer[count++] = 0x3a00161a;
buffer[count++] = 0x0000002e;
buffer[count++] = cpu_to_le32(0x3a00161a);
buffer[count++] = cpu_to_le32(0x0000002e);
break;
default:
buffer[count++] = cpu_to_le32(0x00000000);